From ef7d4277e3df8771a59a4facbc5667e201b43604 Mon Sep 17 00:00:00 2001 From: Shawn Lin Date: Fri, 18 Feb 2022 18:08:54 +0800 Subject: [PATCH] arm64: dts: rockchip: rk3588(s): Add periph reset for PCIe Signed-off-by: Shawn Lin Change-Id: I4e5954a2ea63b53547365eab20fd2d262260a23a --- arch/arm64/boot/dts/rockchip/rk3588.dtsi | 12 ++++++------ arch/arm64/boot/dts/rockchip/rk3588s.dtsi | 8 ++++---- 2 files changed, 10 insertions(+), 10 deletions(-) diff --git a/arch/arm64/boot/dts/rockchip/rk3588.dtsi b/arch/arm64/boot/dts/rockchip/rk3588.dtsi index 5793122013af..1152f824d0c3 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3588.dtsi @@ -529,8 +529,8 @@ reg = <0x0 0xfe150000 0x0 0x10000>, <0xa 0x40000000 0x0 0x400000>; reg-names = "pcie-apb", "pcie-dbi"; - resets = <&cru SRST_PCIE0_POWER_UP>; - reset-names = "pipe"; + resets = <&cru SRST_PCIE0_POWER_UP>, <&cru SRST_P_PCIE0>; + reset-names = "pcie", "periph"; rockchip,pipe-grf = <&php_grf>; status = "disabled"; @@ -584,8 +584,8 @@ reg = <0x0 0xfe160000 0x0 0x10000>, <0xa 0x40400000 0x0 0x400000>; reg-names = "pcie-apb", "pcie-dbi"; - resets = <&cru SRST_PCIE1_POWER_UP>; - reset-names = "pipe"; + resets = <&cru SRST_PCIE1_POWER_UP>, <&cru SRST_P_PCIE1>; + reset-names = "pcie", "periph"; rockchip,pipe-grf = <&php_grf>; status = "disabled"; @@ -638,8 +638,8 @@ reg = <0x0 0xfe170000 0x0 0x10000>, <0xa 0x40800000 0x0 0x400000>; reg-names = "pcie-apb", "pcie-dbi"; - resets = <&cru SRST_PCIE2_POWER_UP>; - reset-names = "pipe"; + resets = <&cru SRST_PCIE2_POWER_UP>, <&cru SRST_P_PCIE2>; + reset-names = "pcie", "periph"; rockchip,pipe-grf = <&php_grf>; status = "disabled"; diff --git a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi index 401114b5d935..d7801a6e8922 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi @@ -3743,8 +3743,8 @@ reg = <0x0 0xfe180000 0x0 0x10000>, <0xa 0x40c00000 0x0 0x400000>; reg-names = "pcie-apb", "pcie-dbi"; - resets = <&cru SRST_PCIE3_POWER_UP>; - reset-names = "pipe"; + resets = <&cru SRST_PCIE3_POWER_UP>, <&cru SRST_P_PCIE3>; + reset-names = "pcie", "periph"; rockchip,pipe-grf = <&php_grf>; status = "disabled"; @@ -3797,8 +3797,8 @@ reg = <0x0 0xfe190000 0x0 0x10000>, <0xa 0x41000000 0x0 0x400000>; reg-names = "pcie-apb", "pcie-dbi"; - resets = <&cru SRST_PCIE4_POWER_UP>; - reset-names = "pipe"; + resets = <&cru SRST_PCIE4_POWER_UP>, <&cru SRST_P_PCIE4>; + reset-names = "pcie", "periph"; rockchip,pipe-grf = <&php_grf>; status = "disabled";