From 59adf53367524661f065953c8501b330b24de968 Mon Sep 17 00:00:00 2001
From: Liang Chen <cl@rock-chips.com>
Date: Mon, 11 Sep 2023 15:50:03 +0800
Subject: [PATCH] arm64: dts: rockchip: add core dtsi for RK3567 Soc

Change-Id: I8af6a967f6c38abdeb6ae26280423fc594d08b3b
Signed-off-by: Liang Chen <cl@rock-chips.com>
---
 arch/arm64/boot/dts/rockchip/rk3567.dtsi | 32 ++++++++++++++++++++++++
 1 file changed, 32 insertions(+)
 create mode 100644 arch/arm64/boot/dts/rockchip/rk3567.dtsi

diff --git a/arch/arm64/boot/dts/rockchip/rk3567.dtsi b/arch/arm64/boot/dts/rockchip/rk3567.dtsi
new file mode 100644
index 000000000000..60ef55b751f2
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3567.dtsi
@@ -0,0 +1,32 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2023 Rockchip Electronics Co., Ltd.
+ */
+
+#include "rk3568.dtsi"
+
+&power {
+	pd_pipe@RK3568_PD_PIPE {
+		reg = <RK3568_PD_PIPE>;
+		clocks = <&cru PCLK_PIPE>;
+		pm_qos = <&qos_pcie2x1>,
+			 <&qos_usb3_0>,
+			 <&qos_usb3_1>;
+	};
+};
+
+/delete-node/ &can0;
+/delete-node/ &can1;
+/delete-node/ &can2;
+/delete-node/ &pcie30_phy_grf;
+/delete-node/ &pcie30phy;
+/delete-node/ &pcie3x1;
+/delete-node/ &pcie3x2;
+/delete-node/ &qos_pcie3x1;
+/delete-node/ &qos_pcie3x2;
+/delete-node/ &qos_sata0;
+/delete-node/ &qos_sata1;
+/delete-node/ &qos_sata2;
+/delete-node/ &sata0;
+/delete-node/ &sata1;
+/delete-node/ &sata2;