diff --git a/arch/arm/boot/dts/rv1106.dtsi b/arch/arm/boot/dts/rv1106.dtsi index 4bb093b80aa3..1cf580756db0 100644 --- a/arch/arm/boot/dts/rv1106.dtsi +++ b/arch/arm/boot/dts/rv1106.dtsi @@ -239,6 +239,18 @@ }; }; + mipi0_csi2: mipi0-csi2 { + compatible = "rockchip,rv1106-mipi-csi2"; + rockchip,hw = <&mipi0_csi2_hw>, <&mipi1_csi2_hw>; + status = "disabled"; + }; + + mipi1_csi2: mipi1-csi2 { + compatible = "rockchip,rv1106-mipi-csi2"; + rockchip,hw = <&mipi0_csi2_hw>, <&mipi1_csi2_hw>; + status = "disabled"; + }; + mpp_srv: mpp-srv { compatible = "rockchip,mpp-service"; rockchip,taskqueue-count = <2>; @@ -1175,8 +1187,8 @@ status = "disabled"; }; - mipi0_csi2: mipi-csi2@ffa20000 { - compatible = "rockchip,rk3588-mipi-csi2"; + mipi0_csi2_hw: mipi-csi2-hw@ffa20000 { + compatible = "rockchip,rv1106-mipi-csi2-hw"; reg = <0xffa20000 0x10000>; reg-names = "csihost_regs"; interrupts = , @@ -1186,11 +1198,11 @@ clock-names = "pclk_csi2host", "clk_rxbyte_hs"; resets = <&cru SRST_P_CSIHOST0>; reset-names = "srst_csihost_p"; - status = "disabled"; + status = "okay"; }; - mipi1_csi2: mipi-csi2@ffa30000 { - compatible = "rockchip,rk3588-mipi-csi2"; + mipi1_csi2_hw: mipi-csi2-hw@ffa30000 { + compatible = "rockchip,rv1106-mipi-csi2-hw"; reg = <0xffa30000 0x10000>; reg-names = "csihost_regs"; interrupts = , @@ -1200,7 +1212,7 @@ clock-names = "pclk_csi2host", "clk_rxbyte_hs"; resets = <&cru SRST_P_CSIHOST1>; reset-names = "srst_csihost_p"; - status = "disabled"; + status = "okay"; }; rkvenc: rkvenc@ffa50000 { diff --git a/arch/arm/boot/dts/rv1126.dtsi b/arch/arm/boot/dts/rv1126.dtsi index 26ae7b06fbd1..1474f438074f 100644 --- a/arch/arm/boot/dts/rv1126.dtsi +++ b/arch/arm/boot/dts/rv1126.dtsi @@ -353,6 +353,12 @@ }; }; + mipi_csi2: mipi-csi2 { + compatible = "rockchip,rv1126-mipi-csi2"; + rockchip,hw = <&mipi_csi2_hw>; + status = "disabled"; + }; + mpp_srv: mpp-srv { compatible = "rockchip,mpp-service"; rockchip,taskqueue-count = <4>; @@ -1861,8 +1867,8 @@ status = "disabled"; }; - mipi_csi2: mipi-csi2@ffb10000 { - compatible = "rockchip,rv1126-mipi-csi2"; + mipi_csi2_hw: mipi-csi2-hw@ffb10000 { + compatible = "rockchip,rv1126-mipi-csi2-hw"; reg = <0xffb10000 0x10000>; reg-names = "csihost_regs"; interrupts = , diff --git a/arch/arm64/boot/dts/rockchip/rk1808.dtsi b/arch/arm64/boot/dts/rockchip/rk1808.dtsi index 297b41269efb..3401beb0837b 100644 --- a/arch/arm64/boot/dts/rockchip/rk1808.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk1808.dtsi @@ -247,6 +247,12 @@ #clock-cells = <0>; }; + mipi_csi2: mipi-csi2 { + compatible = "rockchip,rk1808-mipi-csi2"; + rockchip,hw = <&mipi_csi2_hw>; + status = "disabled"; + }; + psci { compatible = "arm,psci-1.0"; method = "smc"; @@ -1525,8 +1531,8 @@ status = "disabled"; }; - mipi_csi2: mipi-csi2@ffb10000 { - compatible = "rockchip,rk1808-mipi-csi2"; + mipi_csi2_hw: mipi-csi2-hw@ffb10000 { + compatible = "rockchip,rk1808-mipi-csi2-hw"; reg = <0x0 0xffb10000 0x0 0x100>; reg-names = "csihost_regs"; interrupts = , diff --git a/arch/arm64/boot/dts/rockchip/rk3562.dtsi b/arch/arm64/boot/dts/rockchip/rk3562.dtsi index eb5e06d0150e..d9811ea34c37 100644 --- a/arch/arm64/boot/dts/rockchip/rk3562.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3562.dtsi @@ -384,42 +384,42 @@ /* dphy0 full mode */ csi2_dphy0: csi2-dphy0 { compatible = "rockchip,rk3562-csi2-dphy"; - rockchip,hw = <&csi2_dphy0_hw>; + rockchip,hw = <&csi2_dphy0_hw>, <&csi2_dphy1_hw>; status = "disabled"; }; /* dphy0 split mode 01 */ csi2_dphy1: csi2-dphy1 { compatible = "rockchip,rk3562-csi2-dphy"; - rockchip,hw = <&csi2_dphy0_hw>; + rockchip,hw = <&csi2_dphy0_hw>, <&csi2_dphy1_hw>; status = "disabled"; }; /* dphy0 split mode 23 */ csi2_dphy2: csi2-dphy2 { compatible = "rockchip,rk3562-csi2-dphy"; - rockchip,hw = <&csi2_dphy0_hw>; + rockchip,hw = <&csi2_dphy0_hw>, <&csi2_dphy1_hw>; status = "disabled"; }; /* dphy1 full mode */ csi2_dphy3: csi2-dphy3 { compatible = "rockchip,rk3562-csi2-dphy"; - rockchip,hw = <&csi2_dphy1_hw>; + rockchip,hw = <&csi2_dphy0_hw>, <&csi2_dphy1_hw>; status = "disabled"; }; /* dphy1 split mode 01 */ csi2_dphy4: csi2-dphy4 { compatible = "rockchip,rk3562-csi2-dphy"; - rockchip,hw = <&csi2_dphy1_hw>; + rockchip,hw = <&csi2_dphy0_hw>, <&csi2_dphy1_hw>; status = "disabled"; }; /* dphy1 split mode 23 */ csi2_dphy5: csi2-dphy5 { compatible = "rockchip,rk3562-csi2-dphy"; - rockchip,hw = <&csi2_dphy1_hw>; + rockchip,hw = <&csi2_dphy0_hw>, <&csi2_dphy1_hw>; status = "disabled"; }; @@ -536,6 +536,34 @@ status = "disabled"; }; + mipi0_csi2: mipi0-csi2 { + compatible = "rockchip,rk3562-mipi-csi2"; + rockchip,hw = <&mipi0_csi2_hw>, <&mipi1_csi2_hw>, + <&mipi2_csi2_hw>, <&mipi3_csi2_hw>; + status = "disabled"; + }; + + mipi1_csi2: mipi1-csi2 { + compatible = "rockchip,rk3562-mipi-csi2"; + rockchip,hw = <&mipi0_csi2_hw>, <&mipi1_csi2_hw>, + <&mipi2_csi2_hw>, <&mipi3_csi2_hw>; + status = "disabled"; + }; + + mipi2_csi2: mipi2-csi2 { + compatible = "rockchip,rk3562-mipi-csi2"; + rockchip,hw = <&mipi0_csi2_hw>, <&mipi1_csi2_hw>, + <&mipi2_csi2_hw>, <&mipi3_csi2_hw>; + status = "disabled"; + }; + + mipi3_csi2: mipi3-csi2 { + compatible = "rockchip,rk3562-mipi-csi2"; + rockchip,hw = <&mipi0_csi2_hw>, <&mipi1_csi2_hw>, + <&mipi2_csi2_hw>, <&mipi3_csi2_hw>; + status = "disabled"; + }; + psci { compatible = "arm,psci-1.0"; method = "smc"; @@ -1554,8 +1582,8 @@ status = "disabled"; }; - mipi0_csi2: mipi0-csi2@ff380000 { - compatible = "rockchip,rk3562-mipi-csi2"; + mipi0_csi2_hw: mipi0-csi2-hw@ff380000 { + compatible = "rockchip,rk3562-mipi-csi2-hw"; reg = <0x0 0xff380000 0x0 0x10000>; reg-names = "csihost_regs"; interrupts = , @@ -1565,11 +1593,11 @@ clock-names = "pclk_csi2host"; resets = <&cru SRST_P_CSIHOST0>; reset-names = "srst_csihost_p"; - status = "disabled"; + status = "okay"; }; - mipi1_csi2: mipi1-csi2@ff390000 { - compatible = "rockchip,rk3562-mipi-csi2"; + mipi1_csi2_hw: mipi1-csi2-hw@ff390000 { + compatible = "rockchip,rk3562-mipi-csi2-hw"; reg = <0x0 0xff390000 0x0 0x10000>; reg-names = "csihost_regs"; interrupts = , @@ -1579,11 +1607,11 @@ clock-names = "pclk_csi2host"; resets = <&cru SRST_P_CSIHOST1>; reset-names = "srst_csihost_p"; - status = "disabled"; + status = "okay"; }; - mipi2_csi2: mipi2-csi2@ff3a0000 { - compatible = "rockchip,rk3562-mipi-csi2"; + mipi2_csi2_hw: mipi2-csi2-hw@ff3a0000 { + compatible = "rockchip,rk3562-mipi-csi2-hw"; reg = <0x0 0xff3a0000 0x0 0x10000>; reg-names = "csihost_regs"; interrupts = , @@ -1593,11 +1621,11 @@ clock-names = "pclk_csi2host"; resets = <&cru SRST_P_CSIHOST2>; reset-names = "srst_csihost_p"; - status = "disabled"; + status = "okay"; }; - mipi3_csi2: mipi3-csi2@ff3b0000 { - compatible = "rockchip,rk3562-mipi-csi2"; + mipi3_csi2_hw: mipi3-csi2-hw@ff3b0000 { + compatible = "rockchip,rk3562-mipi-csi2-hw"; reg = <0x0 0xff3b0000 0x0 0x10000>; reg-names = "csihost_regs"; interrupts = , @@ -1607,7 +1635,7 @@ clock-names = "pclk_csi2host"; resets = <&cru SRST_P_CSIHOST3>; reset-names = "srst_csihost_p"; - status = "disabled"; + status = "okay"; }; csi2_dphy0_hw: csi2-dphy0-hw@ff3c0000 { @@ -1618,7 +1646,7 @@ resets = <&cru SRST_P_CSIPHY0>; reset-names = "srst_p_csiphy0"; rockchip,grf = <&sys_grf>; - status = "disabled"; + status = "okay"; }; csi2_dphy1_hw: csi2-dphy1-hw@ff3d0000 { @@ -1629,7 +1657,7 @@ resets = <&cru SRST_P_CSIPHY1>; reset-names = "srst_p_csiphy1"; rockchip,grf = <&sys_grf>; - status = "disabled"; + status = "okay"; }; rkcif: rkcif@ff3e0000 { diff --git a/arch/arm64/boot/dts/rockchip/rk3588.dtsi b/arch/arm64/boot/dts/rockchip/rk3588.dtsi index 45d8ae830020..2d82c25f9899 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3588.dtsi @@ -9,9 +9,6 @@ / { aliases { - csi2dphy3 = &csi2_dphy3; - csi2dphy4 = &csi2_dphy4; - csi2dphy5 = &csi2_dphy5; dp0 = &dp0; dp1 = &dp1; edp0 = &edp0; @@ -30,27 +27,6 @@ usbdp1 = &usbdp_phy1; }; - /* dphy1 full mode */ - csi2_dphy3: csi2-dphy3 { - compatible = "rockchip,rk3568-csi2-dphy"; - rockchip,hw = <&csi2_dphy1_hw>; - status = "disabled"; - }; - - /* dphy1 split mode 01 */ - csi2_dphy4: csi2-dphy4 { - compatible = "rockchip,rk3568-csi2-dphy"; - rockchip,hw = <&csi2_dphy1_hw>; - status = "disabled"; - }; - - /* dphy1 split mode 23 */ - csi2_dphy5: csi2-dphy5 { - compatible = "rockchip,rk3568-csi2-dphy"; - rockchip,hw = <&csi2_dphy1_hw>; - status = "disabled"; - }; - rkcif_mipi_lvds4: rkcif-mipi-lvds4 { compatible = "rockchip,rkcif-mipi-lvds"; rockchip,hw = <&rkcif>; @@ -192,34 +168,6 @@ reg = <0x0 0xfd5e4000 0x0 0x100>; }; - mipi4_csi2: mipi4-csi2@fdd50000 { - compatible = "rockchip,rk3588-mipi-csi2"; - reg = <0x0 0xfdd50000 0x0 0x10000>; - reg-names = "csihost_regs"; - interrupts = , - ; - interrupt-names = "csi-intr1", "csi-intr2"; - clocks = <&cru PCLK_CSI_HOST_4>; - clock-names = "pclk_csi2host"; - resets = <&cru SRST_P_CSI_HOST_4>; - reset-names = "srst_csihost_p"; - status = "disabled"; - }; - - mipi5_csi2: mipi5-csi2@fdd60000 { - compatible = "rockchip,rk3588-mipi-csi2"; - reg = <0x0 0xfdd60000 0x0 0x10000>; - reg-names = "csihost_regs"; - interrupts = , - ; - interrupt-names = "csi-intr1", "csi-intr2"; - clocks = <&cru PCLK_CSI_HOST_5>; - clock-names = "pclk_csi2host"; - resets = <&cru SRST_P_CSI_HOST_5>; - reset-names = "srst_csihost_p"; - status = "disabled"; - }; - spdif_tx5: spdif-tx@fddb8000 { compatible = "rockchip,rk3588-spdif", "rockchip,rk3568-spdif"; reg = <0x0 0xfddb8000 0x0 0x1000>; @@ -868,18 +816,6 @@ }; }; - csi2_dphy1_hw: csi2-dphy1-hw@fedc8000 { - compatible = "rockchip,rk3588-csi2-dphy-hw"; - reg = <0x0 0xfedc8000 0x0 0x8000>; - clocks = <&cru PCLK_CSIPHY1>; - clock-names = "pclk"; - resets = <&cru SRST_CSIPHY1>, <&cru SRST_P_CSIPHY1>; - reset-names = "srst_csiphy1", "srst_p_csiphy1"; - rockchip,grf = <&mipidphy1_grf>; - rockchip,sys_grf = <&sys_grf>; - status = "disabled"; - }; - combphy1_ps: phy@fee10000 { compatible = "rockchip,rk3588-naneng-combphy"; reg = <0x0 0xfee10000 0x0 0x100>; diff --git a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi index e9c13ed405fe..f8eb3e0cd8ba 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi @@ -26,6 +26,9 @@ csi2dphy0 = &csi2_dphy0; csi2dphy1 = &csi2_dphy1; csi2dphy2 = &csi2_dphy2; + csi2dphy3 = &csi2_dphy3; + csi2dphy4 = &csi2_dphy4; + csi2dphy5 = &csi2_dphy5; dsi0 = &dsi0; dsi1 = &dsi1; ethernet1 = &gmac1; @@ -1586,37 +1589,66 @@ }; csi2_dcphy0: csi2-dcphy0 { - compatible = "rockchip,rk3588-csi2-dcphy"; - phys = <&mipi_dcphy0>; - phy-names = "dcphy"; + compatible = "rockchip,rk3588-csi2-dphy"; + rockchip,hw = <&csi2_dphy0_hw>, <&csi2_dphy1_hw>; + phys = <&mipidcphy0>, <&mipidcphy1>; + phy-names = "dcphy0", "dcphy1"; status = "disabled"; }; csi2_dcphy1: csi2-dcphy1 { - compatible = "rockchip,rk3588-csi2-dcphy"; - phys = <&mipi_dcphy1>; - phy-names = "dcphy"; + compatible = "rockchip,rk3588-csi2-dphy"; + rockchip,hw = <&csi2_dphy0_hw>, <&csi2_dphy1_hw>; + phys = <&mipidcphy0>, <&mipidcphy1>; + phy-names = "dcphy0", "dcphy1"; status = "disabled"; }; - /* dphy0 full mode */ csi2_dphy0: csi2-dphy0 { - compatible = "rockchip,rk3568-csi2-dphy"; - rockchip,hw = <&csi2_dphy0_hw>; + compatible = "rockchip,rk3588-csi2-dphy"; + rockchip,hw = <&csi2_dphy0_hw>, <&csi2_dphy1_hw>; + phys = <&mipidcphy0>, <&mipidcphy1>; + phy-names = "dcphy0", "dcphy1"; status = "disabled"; }; - /* dphy0 split mode 01 */ csi2_dphy1: csi2-dphy1 { - compatible = "rockchip,rk3568-csi2-dphy"; - rockchip,hw = <&csi2_dphy0_hw>; + compatible = "rockchip,rk3588-csi2-dphy"; + rockchip,hw = <&csi2_dphy0_hw>, <&csi2_dphy1_hw>; + phys = <&mipidcphy0>, <&mipidcphy1>; + phy-names = "dcphy0", "dcphy1"; status = "disabled"; }; - /* dphy0 split mode 23 */ csi2_dphy2: csi2-dphy2 { - compatible = "rockchip,rk3568-csi2-dphy"; - rockchip,hw = <&csi2_dphy0_hw>; + compatible = "rockchip,rk3588-csi2-dphy"; + rockchip,hw = <&csi2_dphy0_hw>, <&csi2_dphy1_hw>; + phys = <&mipidcphy0>, <&mipidcphy1>; + phy-names = "dcphy0", "dcphy1"; + status = "disabled"; + }; + + csi2_dphy3: csi2-dphy3 { + compatible = "rockchip,rk3588-csi2-dphy"; + rockchip,hw = <&csi2_dphy0_hw>, <&csi2_dphy1_hw>; + phys = <&mipidcphy0>, <&mipidcphy1>; + phy-names = "dcphy0", "dcphy1"; + status = "disabled"; + }; + + csi2_dphy4: csi2-dphy4 { + compatible = "rockchip,rk3588-csi2-dphy"; + rockchip,hw = <&csi2_dphy0_hw>, <&csi2_dphy1_hw>; + phys = <&mipidcphy0>, <&mipidcphy1>; + phy-names = "dcphy0", "dcphy1"; + status = "disabled"; + }; + + csi2_dphy5: csi2-dphy5 { + compatible = "rockchip,rk3588-csi2-dphy"; + rockchip,hw = <&csi2_dphy0_hw>, <&csi2_dphy1_hw>; + phys = <&mipidcphy0>, <&mipidcphy1>; + phy-names = "dcphy0", "dcphy1"; status = "disabled"; }; @@ -1860,6 +1892,58 @@ status = "disabled"; }; + /omit-if-no-ref/ + mipi_dcphy1: mipi_dcphy0: mipi-dcphy-dummy { + }; + + mipi0_csi2: mipi0-csi2 { + compatible = "rockchip,rk3588-mipi-csi2"; + rockchip,hw = <&mipi0_csi2_hw>, <&mipi1_csi2_hw>, + <&mipi2_csi2_hw>, <&mipi3_csi2_hw>, + <&mipi4_csi2_hw>, <&mipi5_csi2_hw>; + status = "disabled"; + }; + + mipi1_csi2: mipi1-csi2 { + compatible = "rockchip,rk3588-mipi-csi2"; + rockchip,hw = <&mipi0_csi2_hw>, <&mipi1_csi2_hw>, + <&mipi2_csi2_hw>, <&mipi3_csi2_hw>, + <&mipi4_csi2_hw>, <&mipi5_csi2_hw>; + status = "disabled"; + }; + + mipi2_csi2: mipi2-csi2 { + compatible = "rockchip,rk3588-mipi-csi2"; + rockchip,hw = <&mipi0_csi2_hw>, <&mipi1_csi2_hw>, + <&mipi2_csi2_hw>, <&mipi3_csi2_hw>, + <&mipi4_csi2_hw>, <&mipi5_csi2_hw>; + status = "disabled"; + }; + + mipi3_csi2: mipi3-csi2 { + compatible = "rockchip,rk3588-mipi-csi2"; + rockchip,hw = <&mipi0_csi2_hw>, <&mipi1_csi2_hw>, + <&mipi2_csi2_hw>, <&mipi3_csi2_hw>, + <&mipi4_csi2_hw>, <&mipi5_csi2_hw>; + status = "disabled"; + }; + + mipi4_csi2: mipi4-csi2 { + compatible = "rockchip,rk3588-mipi-csi2"; + rockchip,hw = <&mipi0_csi2_hw>, <&mipi1_csi2_hw>, + <&mipi2_csi2_hw>, <&mipi3_csi2_hw>, + <&mipi4_csi2_hw>, <&mipi5_csi2_hw>; + status = "disabled"; + }; + + mipi5_csi2: mipi5-csi2 { + compatible = "rockchip,rk3588-mipi-csi2"; + rockchip,hw = <&mipi0_csi2_hw>, <&mipi1_csi2_hw>, + <&mipi2_csi2_hw>, <&mipi3_csi2_hw>, + <&mipi4_csi2_hw>, <&mipi5_csi2_hw>; + status = "disabled"; + }; + mpp_srv: mpp-srv { compatible = "rockchip,mpp-service"; rockchip,taskqueue-count = <12>; @@ -4432,8 +4516,8 @@ status = "disabled"; }; - mipi0_csi2: mipi0-csi2@fdd10000 { - compatible = "rockchip,rk3588-mipi-csi2"; + mipi0_csi2_hw: mipi0-csi2-hw@fdd10000 { + compatible = "rockchip,rk3588-mipi-csi2-hw"; reg = <0x0 0xfdd10000 0x0 0x10000>; reg-names = "csihost_regs"; interrupts = , @@ -4443,11 +4527,11 @@ clock-names = "pclk_csi2host"; resets = <&cru SRST_P_CSI_HOST_0>; reset-names = "srst_csihost_p"; - status = "disabled"; + status = "okay"; }; - mipi1_csi2: mipi1-csi2@fdd20000 { - compatible = "rockchip,rk3588-mipi-csi2"; + mipi1_csi2_hw: mipi1-csi2-hw@fdd20000 { + compatible = "rockchip,rk3588-mipi-csi2-hw"; reg = <0x0 0xfdd20000 0x0 0x10000>; reg-names = "csihost_regs"; interrupts = , @@ -4456,12 +4540,12 @@ clocks = <&cru PCLK_CSI_HOST_1>; clock-names = "pclk_csi2host"; resets = <&cru SRST_P_CSI_HOST_1>; - reset-names = "srst_csihost_p", "srst_csihost_vicap"; - status = "disabled"; + reset-names = "srst_csihost_p"; + status = "okay"; }; - mipi2_csi2: mipi2-csi2@fdd30000 { - compatible = "rockchip,rk3588-mipi-csi2"; + mipi2_csi2_hw: mipi2-csi2-hw@fdd30000 { + compatible = "rockchip,rk3588-mipi-csi2-hw"; reg = <0x0 0xfdd30000 0x0 0x10000>; reg-names = "csihost_regs"; interrupts = , @@ -4471,11 +4555,11 @@ clock-names = "pclk_csi2host"; resets = <&cru SRST_P_CSI_HOST_2>; reset-names = "srst_csihost_p"; - status = "disabled"; + status = "okay"; }; - mipi3_csi2: mipi3-csi2@fdd40000 { - compatible = "rockchip,rk3588-mipi-csi2"; + mipi3_csi2_hw: mipi3-csi2-hw@fdd40000 { + compatible = "rockchip,rk3588-mipi-csi2-hw"; reg = <0x0 0xfdd40000 0x0 0x10000>; reg-names = "csihost_regs"; interrupts = , @@ -4485,7 +4569,35 @@ clock-names = "pclk_csi2host"; resets = <&cru SRST_P_CSI_HOST_3>; reset-names = "srst_csihost_p"; - status = "disabled"; + status = "okay"; + }; + + mipi4_csi2_hw: mipi4-csi2-hw@fdd50000 { + compatible = "rockchip,rk3588-mipi-csi2-hw"; + reg = <0x0 0xfdd50000 0x0 0x10000>; + reg-names = "csihost_regs"; + interrupts = , + ; + interrupt-names = "csi-intr1", "csi-intr2"; + clocks = <&cru PCLK_CSI_HOST_4>; + clock-names = "pclk_csi2host"; + resets = <&cru SRST_P_CSI_HOST_4>; + reset-names = "srst_csihost_p"; + status = "okay"; + }; + + mipi5_csi2_hw: mipi5-csi2-hw@fdd60000 { + compatible = "rockchip,rk3588-mipi-csi2-hw"; + reg = <0x0 0xfdd60000 0x0 0x10000>; + reg-names = "csihost_regs"; + interrupts = , + ; + interrupt-names = "csi-intr1", "csi-intr2"; + clocks = <&cru PCLK_CSI_HOST_5>; + clock-names = "pclk_csi2host"; + resets = <&cru SRST_P_CSI_HOST_5>; + reset-names = "srst_csihost_p"; + status = "okay"; }; vop: vop@fdd90000 { @@ -4764,7 +4876,7 @@ resets = <&cru SRST_P_DSIHOST0>; reset-names = "apb"; power-domains = <&power RK3588_PD_VOP>; - phys = <&mipi_dcphy0>; + phys = <&mipidcphy0>; phy-names = "dcphy"; rockchip,grf = <&vop_grf>; #address-cells = <1>; @@ -4804,7 +4916,7 @@ resets = <&cru SRST_P_DSIHOST1>; reset-names = "apb"; power-domains = <&power RK3588_PD_VOP>; - phys = <&mipi_dcphy1>; + phys = <&mipidcphy1>; phy-names = "dcphy"; rockchip,grf = <&vop_grf>; #address-cells = <1>; @@ -6588,7 +6700,7 @@ }; }; - mipi_dcphy0: phy@feda0000 { + mipidcphy0: phy@feda0000 { compatible = "rockchip,rk3588-mipi-dcphy"; reg = <0x0 0xfeda0000 0x0 0x10000>; rockchip,grf = <&mipidcphy0_grf>; @@ -6601,10 +6713,10 @@ <&cru SRST_S_MIPI_DCPHY0>; reset-names = "m_phy", "apb", "grf", "s_phy"; #phy-cells = <0>; - status = "disabled"; + status = "okay"; }; - mipi_dcphy1: phy@fedb0000 { + mipidcphy1: phy@fedb0000 { compatible = "rockchip,rk3588-mipi-dcphy"; reg = <0x0 0xfedb0000 0x0 0x10000>; rockchip,grf = <&mipidcphy1_grf>; @@ -6617,7 +6729,7 @@ <&cru SRST_S_MIPI_DCPHY1>; reset-names = "m_phy", "apb", "grf", "s_phy"; #phy-cells = <0>; - status = "disabled"; + status = "okay"; }; csi2_dphy0_hw: csi2-dphy0-hw@fedc0000 { @@ -6629,7 +6741,19 @@ reset-names = "srst_csiphy0", "srst_p_csiphy0"; rockchip,grf = <&mipidphy0_grf>; rockchip,sys_grf = <&sys_grf>; - status = "disabled"; + status = "okay"; + }; + + csi2_dphy1_hw: csi2-dphy1-hw@fedc8000 { + compatible = "rockchip,rk3588-csi2-dphy-hw"; + reg = <0x0 0xfedc8000 0x0 0x8000>; + clocks = <&cru PCLK_CSIPHY1>; + clock-names = "pclk"; + resets = <&cru SRST_CSIPHY1>, <&cru SRST_P_CSIPHY1>; + reset-names = "srst_csiphy1", "srst_p_csiphy1"; + rockchip,grf = <&mipidphy1_grf>; + rockchip,sys_grf = <&sys_grf>; + status = "okay"; }; combphy0_ps: phy@fee00000 { diff --git a/include/uapi/linux/rk-camera-module.h b/include/uapi/linux/rk-camera-module.h index fd0416141011..b1204b09cdca 100644 --- a/include/uapi/linux/rk-camera-module.h +++ b/include/uapi/linux/rk-camera-module.h @@ -58,6 +58,7 @@ RKMODULE_CAMERA_BT656_CHANNEL_3) #define DPHY_MAX_LANE 4 +#define RKMODULE_MULTI_DEV_NUM 4 #define RKMODULE_GET_MODULE_INFO \ _IOR('V', BASE_VIDIOC_PRIVATE + 0, struct rkmodule_inf) @@ -176,6 +177,12 @@ #define RKMODULE_SET_GROUP_ID \ _IOW('V', BASE_VIDIOC_PRIVATE + 38, __u32) +#define RKMODULE_GET_CAPTURE_MODE \ + _IOR('V', BASE_VIDIOC_PRIVATE + 39, struct rkmodule_capture_info) + +#define RKMODULE_SET_CAPTURE_MODE \ + _IOW('V', BASE_VIDIOC_PRIVATE + 40, struct rkmodule_capture_info) + struct rkmodule_i2cdev_info { __u8 slave_addr; } __attribute__ ((packed)); @@ -766,4 +773,39 @@ struct rkmodule_sensor_infos { struct rkmodule_sensor_fmt sensor_fmt[RKMODULE_MAX_SENSOR_NUM]; }; +enum rkmodule_capture_mode { + RKMODULE_CAPTURE_MODE_NONE = 0, + RKMODULE_MULTI_DEV_COMBINE_ONE, + RKMODULE_ONE_CH_TO_MULTI_ISP, + RKMODULE_MULTI_CH_TO_MULTI_ISP, + RKMODULE_MULTI_CH_COMBINE_SQUARE, +}; + +struct rkmodule_multi_dev_info { + __u32 dev_idx[RKMODULE_MULTI_DEV_NUM]; + __u32 combine_idx[RKMODULE_MULTI_DEV_NUM]; + __u32 pixel_offset; + __u32 dev_num; + __u32 reserved[8]; +}; + +struct rkmodule_one_to_multi_info { + __u32 isp_num; + __u32 frame_pattern[RKMODULE_MULTI_DEV_NUM]; +}; + +struct rkmodule_multi_combine_info { + __u32 combine_num; + __u32 combine_index[RKMODULE_MULTI_DEV_NUM]; +}; + +struct rkmodule_capture_info { + __u32 mode; + union { + struct rkmodule_multi_dev_info multi_dev; + struct rkmodule_one_to_multi_info one_to_multi; + struct rkmodule_multi_combine_info multi_combine_info; + }; +}; + #endif /* _UAPI_RKMODULE_CAMERA_H */ diff --git a/include/uapi/linux/rkcif-config.h b/include/uapi/linux/rkcif-config.h index eed947319dcc..a65b5b16d242 100644 --- a/include/uapi/linux/rkcif-config.h +++ b/include/uapi/linux/rkcif-config.h @@ -9,7 +9,9 @@ #include #include -#define RKCIF_API_VERSION KERNEL_VERSION(0, 1, 0xa) +#define RKCIF_MAX_CSI_NUM 4 + +#define RKCIF_API_VERSION KERNEL_VERSION(0, 2, 0) #define V4L2_EVENT_RESET_DEV 0X1001 @@ -32,7 +34,7 @@ _IOW('V', BASE_VIDIOC_PRIVATE + 6, int) #define RKCIF_CMD_SET_CSI_IDX \ - _IOW('V', BASE_VIDIOC_PRIVATE + 7, unsigned int) + _IOW('V', BASE_VIDIOC_PRIVATE + 7, struct rkcif_csi_info) /* cif memory mode * 0: raw12/raw10/raw8 8bit memory compact @@ -71,4 +73,10 @@ struct rkcif_fps { int fps; }; +struct rkcif_csi_info { + int csi_num; + int csi_idx[RKCIF_MAX_CSI_NUM]; + int dphy_vendor[RKCIF_MAX_CSI_NUM]; +}; + #endif