From 440bdcdbfa429b2ef14055bc934c8ab5c72a3bb1 Mon Sep 17 00:00:00 2001 From: Martin Blumenstingl Date: Wed, 12 Jul 2017 00:20:14 +0200 Subject: [PATCH 1/6] ARM: dts: move the pwm_ab and pwm_cd nodes to meson.dtsi According to the vendor kernel sources these also exist (at the same address) on Meson6 and Meson8. This can be found by running $ grep -R "define PWM_PWM_[A-D]" arch/arm/ in the Amlogic GPL kernel tree (arm-src-kernel-2015-01-15-321cfb5a46). pwm_ef does not seem to exist on older SoCs, so we keep it in meson8b.dtsi for now. Signed-off-by: Martin Blumenstingl Signed-off-by: Kevin Hilman --- arch/arm/boot/dts/meson.dtsi | 14 ++++++++++++++ arch/arm/boot/dts/meson8b.dtsi | 22 ++++++++-------------- 2 files changed, 22 insertions(+), 14 deletions(-) diff --git a/arch/arm/boot/dts/meson.dtsi b/arch/arm/boot/dts/meson.dtsi index 15204e44161d..4c27ca083afb 100644 --- a/arch/arm/boot/dts/meson.dtsi +++ b/arch/arm/boot/dts/meson.dtsi @@ -108,6 +108,20 @@ status = "disabled"; }; + pwm_ab: pwm@8550 { + compatible = "amlogic,meson-pwm"; + reg = <0x8550 0x10>; + #pwm-cells = <3>; + status = "disabled"; + }; + + pwm_cd: pwm@8650 { + compatible = "amlogic,meson-pwm"; + reg = <0x8650 0x10>; + #pwm-cells = <3>; + status = "disabled"; + }; + saradc: adc@8680 { compatible = "amlogic,meson-saradc"; reg = <0x8680 0x34>; diff --git a/arch/arm/boot/dts/meson8b.dtsi b/arch/arm/boot/dts/meson8b.dtsi index 72e4f425f190..65b36c944b45 100644 --- a/arch/arm/boot/dts/meson8b.dtsi +++ b/arch/arm/boot/dts/meson8b.dtsi @@ -129,20 +129,6 @@ #reset-cells = <1>; }; - pwm_ab: pwm@8550 { - compatible = "amlogic,meson8b-pwm"; - reg = <0x8550 0x10>; - #pwm-cells = <3>; - status = "disabled"; - }; - - pwm_cd: pwm@8650 { - compatible = "amlogic,meson8b-pwm"; - reg = <0x8650 0x10>; - #pwm-cells = <3>; - status = "disabled"; - }; - pwm_ef: pwm@86c0 { compatible = "amlogic,meson8b-pwm"; reg = <0x86c0 0x10>; @@ -193,6 +179,14 @@ arm,filter-ranges = <0x100000 0xc0000000>; }; +&pwm_ab { + compatible = "amlogic,meson8b-pwm"; +}; + +&pwm_cd { + compatible = "amlogic,meson8b-pwm"; +}; + &saradc { compatible = "amlogic,meson8b-saradc", "amlogic,meson-saradc"; clocks = <&clkc CLKID_XTAL>, From 43d91c587fc07da5e007d8e0c9cfa1371dab0a11 Mon Sep 17 00:00:00 2001 From: Martin Blumenstingl Date: Wed, 12 Jul 2017 00:20:15 +0200 Subject: [PATCH 2/6] ARM: dts: meson8: add the PWM controller nodes pwm_ab and pwm_cd are already inherited from meson.dtsi, we only need to define the correct "compatible" string so the pwm-meson driver can choose the parent clocks correctly. pwm_ef is added to meson8.dtsi directly (similar to how it's done in meson8b.dtsi) as this controller only exists on Meson8 and Meson8b. Signed-off-by: Martin Blumenstingl Signed-off-by: Kevin Hilman --- arch/arm/boot/dts/meson8.dtsi | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/arch/arm/boot/dts/meson8.dtsi b/arch/arm/boot/dts/meson8.dtsi index cada35828931..6fe6a159e960 100644 --- a/arch/arm/boot/dts/meson8.dtsi +++ b/arch/arm/boot/dts/meson8.dtsi @@ -172,6 +172,13 @@ reg = <0x8000 0x4>, <0x4000 0x460>; }; + pwm_ef: pwm@86c0 { + compatible = "amlogic,meson8-pwm", "amlogic,meson8b-pwm"; + reg = <0x86c0 0x10>; + #pwm-cells = <3>; + status = "disabled"; + }; + pinctrl_cbus: pinctrl@9880 { compatible = "amlogic,meson8-cbus-pinctrl"; reg = <0x9880 0x10>; @@ -270,6 +277,14 @@ arm,filter-ranges = <0x100000 0xc0000000>; }; +&pwm_ab { + compatible = "amlogic,meson8-pwm", "amlogic,meson8b-pwm"; +}; + +&pwm_cd { + compatible = "amlogic,meson8-pwm", "amlogic,meson8b-pwm"; +}; + &saradc { compatible = "amlogic,meson8-saradc", "amlogic,meson-saradc"; clocks = <&clkc CLKID_XTAL>, From 2eca2a161ae163c3c4bc3f6dda6339c9f8bc71bd Mon Sep 17 00:00:00 2001 From: Martin Blumenstingl Date: Wed, 12 Jul 2017 00:22:22 +0200 Subject: [PATCH 3/6] ARM: dts: meson8b: use the existing wdt node to override the compatible Meson8b has to define it's own compatible string for the watchdog. This patch removes the duplicate resource (register region and interrupt) definition from meson8b.dtsi and simply re-uses these values from meson.dtsi (as the register offset, size and interrupt are identical). This is purely cosmetic and does not change any functionality. Signed-off-by: Martin Blumenstingl Signed-off-by: Kevin Hilman --- arch/arm/boot/dts/meson8b.dtsi | 10 ++++------ 1 file changed, 4 insertions(+), 6 deletions(-) diff --git a/arch/arm/boot/dts/meson8b.dtsi b/arch/arm/boot/dts/meson8b.dtsi index 65b36c944b45..8fce13844b0c 100644 --- a/arch/arm/boot/dts/meson8b.dtsi +++ b/arch/arm/boot/dts/meson8b.dtsi @@ -136,12 +136,6 @@ status = "disabled"; }; - wdt: watchdog@9900 { - compatible = "amlogic,meson8b-wdt"; - reg = <0x9900 0x8>; - interrupts = <0 0 1>; - }; - pinctrl_cbus: pinctrl@9880 { compatible = "amlogic,meson8b-cbus-pinctrl"; reg = <0x9880 0x10>; @@ -236,3 +230,7 @@ clock-names = "usb_general", "usb"; resets = <&reset RESET_USB_OTG>; }; + +&wdt { + compatible = "amlogic,meson8b-wdt"; +}; From 40b5c4f30c7f93c63836521d5be4e66eeb864539 Mon Sep 17 00:00:00 2001 From: Martin Blumenstingl Date: Wed, 12 Jul 2017 00:26:55 +0200 Subject: [PATCH 4/6] ARM: dts: meson: add a node which describes the SRAM All 32bit Meson SoCs contain 128KiB SRAM. This SRAM is used when suspending the device (the the ARM Power Firmware on Meson8/Meson8b/Meson8m2 saves the DDR settings there) and to boot the secondary CPU cores. Signed-off-by: Martin Blumenstingl Signed-off-by: Kevin Hilman --- arch/arm/boot/dts/meson.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/arm/boot/dts/meson.dtsi b/arch/arm/boot/dts/meson.dtsi index 4c27ca083afb..7e136991a4b9 100644 --- a/arch/arm/boot/dts/meson.dtsi +++ b/arch/arm/boot/dts/meson.dtsi @@ -244,5 +244,13 @@ interrupt-names = "macirq"; status = "disabled"; }; + + ahb_sram: sram@d9000000 { + compatible = "mmio-sram"; + reg = <0xd9000000 0x20000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0xd9000000 0x20000>; + }; }; }; /* end of / */ From 45631ea8b5d814845a9e3a246ea79c89d63bf786 Mon Sep 17 00:00:00 2001 From: Martin Blumenstingl Date: Fri, 28 Jul 2017 23:13:13 +0200 Subject: [PATCH 5/6] ARM: dts: meson: mark the clock controller also as reset controller The clock controller provides a few reset lines as well. Add the corresponding CPU cores. Signed-off-by: Martin Blumenstingl Reviewed-by: Neil Armstrong Signed-off-by: Kevin Hilman --- arch/arm/boot/dts/meson8.dtsi | 1 + arch/arm/boot/dts/meson8b.dtsi | 1 + 2 files changed, 2 insertions(+) diff --git a/arch/arm/boot/dts/meson8.dtsi b/arch/arm/boot/dts/meson8.dtsi index 6fe6a159e960..b98d44fde6b6 100644 --- a/arch/arm/boot/dts/meson8.dtsi +++ b/arch/arm/boot/dts/meson8.dtsi @@ -168,6 +168,7 @@ &cbus { clkc: clock-controller@4000 { #clock-cells = <1>; + #reset-cells = <1>; compatible = "amlogic,meson8-clkc"; reg = <0x8000 0x4>, <0x4000 0x460>; }; diff --git a/arch/arm/boot/dts/meson8b.dtsi b/arch/arm/boot/dts/meson8b.dtsi index 8fce13844b0c..bc278da7df0d 100644 --- a/arch/arm/boot/dts/meson8b.dtsi +++ b/arch/arm/boot/dts/meson8b.dtsi @@ -119,6 +119,7 @@ &cbus { clkc: clock-controller@4000 { #clock-cells = <1>; + #reset-cells = <1>; compatible = "amlogic,meson8b-clkc"; reg = <0x8000 0x4>, <0x4000 0x460>; }; From ec9b59162fd8317933e362f347a7ed6da7d85618 Mon Sep 17 00:00:00 2001 From: Neil Armstrong Date: Wed, 21 Jun 2017 16:42:12 +0200 Subject: [PATCH 6/6] ARM: dts: meson6: use stable UART bindings The UART bindings needs specifying a SoC family, use the meson6 family for the UART nodes like the other nodes. Switch to the stable UART bindings for meson6 by adding a XTAL node and using the proper compatible strings. Signed-off-by: Neil Armstrong Signed-off-by: Kevin Hilman --- arch/arm/boot/dts/meson.dtsi | 8 ++++---- arch/arm/boot/dts/meson6.dtsi | 28 ++++++++++++++++++++++++++++ 2 files changed, 32 insertions(+), 4 deletions(-) diff --git a/arch/arm/boot/dts/meson.dtsi b/arch/arm/boot/dts/meson.dtsi index 7e136991a4b9..cd6ad072e72c 100644 --- a/arch/arm/boot/dts/meson.dtsi +++ b/arch/arm/boot/dts/meson.dtsi @@ -86,14 +86,14 @@ }; uart_A: serial@84c0 { - compatible = "amlogic,meson-uart"; + compatible = "amlogic,meson6-uart", "amlogic,meson-uart"; reg = <0x84c0 0x18>; interrupts = ; status = "disabled"; }; uart_B: serial@84dc { - compatible = "amlogic,meson-uart"; + compatible = "amlogic,meson6-uart", "amlogic,meson-uart"; reg = <0x84dc 0x18>; interrupts = ; status = "disabled"; @@ -131,7 +131,7 @@ }; uart_C: serial@8700 { - compatible = "amlogic,meson-uart"; + compatible = "amlogic,meson6-uart", "amlogic,meson-uart"; reg = <0x8700 0x18>; interrupts = ; status = "disabled"; @@ -196,7 +196,7 @@ }; uart_AO: serial@4c0 { - compatible = "amlogic,meson-uart"; + compatible = "amlogic,meson6-uart", "amlogic,meson-ao-uart", "amlogic,meson-uart"; reg = <0x4c0 0x18>; interrupts = ; status = "disabled"; diff --git a/arch/arm/boot/dts/meson6.dtsi b/arch/arm/boot/dts/meson6.dtsi index 8557b6117a4b..ef281d290052 100644 --- a/arch/arm/boot/dts/meson6.dtsi +++ b/arch/arm/boot/dts/meson6.dtsi @@ -70,9 +70,37 @@ }; }; + xtal: xtal-clk { + compatible = "fixed-clock"; + clock-frequency = <24000000>; + clock-output-names = "xtal"; + #clock-cells = <0>; + }; + clk81: clk@0 { #clock-cells = <0>; compatible = "fixed-clock"; clock-frequency = <200000000>; }; }; /* end of / */ + + +&uart_AO { + clocks = <&xtal>, <&clk81>, <&clk81>; + clock-names = "xtal", "pclk", "baud"; +}; + +&uart_A { + clocks = <&xtal>, <&clk81>, <&clk81>; + clock-names = "xtal", "pclk", "baud"; +}; + +&uart_B { + clocks = <&xtal>, <&clk81>, <&clk81>; + clock-names = "xtal", "pclk", "baud"; +}; + +&uart_C { + clocks = <&xtal>, <&clk81>, <&clk81>; + clock-names = "xtal", "pclk", "baud"; +};