From f28451cf39ae3a3c01cb4144fc507ba0b30d2416 Mon Sep 17 00:00:00 2001
From: Shawn Lin <shawn.lin@rock-chips.com>
Date: Sat, 6 Feb 2021 09:25:44 +0800
Subject: [PATCH] phy: rockchip: naneng-combphy: Add ssc enable option from
 firmware

Change-Id: I0f620b6ff000ff4e7b9bc997ca2c30c14d3f8cde
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
---
 drivers/phy/rockchip/phy-rockchip-naneng-combphy.c | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/drivers/phy/rockchip/phy-rockchip-naneng-combphy.c b/drivers/phy/rockchip/phy-rockchip-naneng-combphy.c
index 6ec10ca797b2..9b4f72503bdb 100644
--- a/drivers/phy/rockchip/phy-rockchip-naneng-combphy.c
+++ b/drivers/phy/rockchip/phy-rockchip-naneng-combphy.c
@@ -537,6 +537,12 @@ static int rk3568_combphy_cfg(struct rockchip_combphy_priv *priv)
 		}
 	}
 
+	if (device_property_read_bool(priv->dev, "rockchip,enable-ssc")) {
+		val = readl(priv->mmio + (0x7 << 2));
+		val |= BIT(4);
+		writel(val, priv->mmio + (0x7 << 2));
+	}
+
 	return 0;
 }