From f37e79b2d7fb7091ee4f43b49fe42fa6f9136a90 Mon Sep 17 00:00:00 2001 From: MingLiang Dong Date: Tue, 26 Mar 2019 08:38:56 -0400 Subject: [PATCH] hdr: TL1 HDR gamut bug fix [1/1] PD#SWPL-5248 Problem: 1. finetune TL1 HDR. 2. workaround fix ootf overwrite 3. workaround fix gamut bug Solution: TL1 HDR gamut bug fix Verify: verify on TL1 Change-Id: Iaf9535f3b6d096967f67ba118ff54eeb2c5c01c5 Signed-off-by: MingLiang Dong --- .../media/enhancement/amvecm/set_hdr2_v0.c | 149 ++++++++++++------ 1 file changed, 97 insertions(+), 52 deletions(-) diff --git a/drivers/amlogic/media/enhancement/amvecm/set_hdr2_v0.c b/drivers/amlogic/media/enhancement/amvecm/set_hdr2_v0.c index cbaf7f3d1347..f28f66561c79 100644 --- a/drivers/amlogic/media/enhancement/amvecm/set_hdr2_v0.c +++ b/drivers/amlogic/media/enhancement/amvecm/set_hdr2_v0.c @@ -93,22 +93,24 @@ int cgain_lut2[65] = { static int num_eo_y_lut_hdr = 143; int eo_y_lut_hdr[143] = { - 132288, 136832, 165440, 181832, 193440, 202088, 210400, 216476, 221882, - 227920, 231986, 235648, 239639, 243964, 247193, 249698, 252377, 271330, - 285261, 297148, 306377, 314682, 321922, 329204, 334486, 340750, 346085, - 350369, 355325, 360734, 363991, 367697, 371896, 376636, 379400, 382389, - 385731, 389458, 393410, 395711, 398260, 401078, 404188, 407615, 410492, - 412562, 414834, 417322, 420045, 423021, 426127, 427900, 429831, 431934, - 434222, 436709, 439410, 442342, 443945, 445668, 447230, 448187, 449224, - 450344, 451555, 452864, 454277, 455803, 457449, 458988, 459945, 460977, - 462089, 463286, 464576, 465964, 467458, 469066, 470795, 472655, 474655, - 475971, 477126, 478368, 479702, 481136, 482676, 484330, 486107, 488015, - 490063, 491891, 493071, 494339, 495699, 497159, 498727, 500409, 502262, - 504308, 506503, 508381, 509646, 511003, 512460, 512934, 513098, 513279, - 513477, 513691, 513923, 514172, 514438, 514720, 515017, 515328, 515650, - 515981, 516320, 516662, 517006, 517349, 517689, 518022, 518347, 518662, - 518968, 519263, 519549, 519827, 520097, 520363, 520625, 520888, 521155, - 521431, 521727, 522054, 522431, 522871, 523371, 523881, 524287 + 1032192, 1032192, 1032192, 1032192, 16384, 16384, 16384, 16384, + 32768, 32768, 32768, 32768, 40960, 40960, 40960, 49152, 49152, + 73728, 86016, 94208, 100352, 104448, 108544, 112640, 117760, 123904, + 128000, 133632, 137728, 141824, 146944, 150272, 153344, 157440, + 161536, 165248, 167808, 170880, 174208, 177792, 181056, 183360, + 185792, 188480, 191552, 194880, 197536, 199520, 201696, 204128, + 206688, 209568, 212640, 214480, 216336, 218320, 220464, 222832, + 225360, 228112, 230248, 231864, 233608, 235496, 237544, 239752, + 242136, 244712, 246628, 248132, 249748, 251492, 253364, 255388, + 257564, 259908, 262290, 263646, 265106, 266678, 268366, 270182, + 272134, 274230, 276486, 278717, 280017, 281415, 282915, 284525, + 286255, 288113, 290107, 292247, 294545, 295961, 297284, 298705, + 300229, 301866, 303622, 305507, 307530, 309701, 311664, 312915, + 314257, 315698, 317246, 318907, 320690, 322605, 324662, 326871, + 328461, 329735, 331104, 332575, 334155, 335853, 337679, 339642, + 341752, 344021, 345263, 346576, 347989, 349509, 351145, 352907, + 354805, 356848, 359050, 360935, 362214, 363593, 365080, 366684, + 368414, 370283, 372300, 374478, 376832 }; module_param_array(eo_y_lut_hdr, int, &num_eo_y_lut_hdr, 0664); MODULE_PARM_DESC(eo_y_lut_hdr, "\n eo_y_lut_hdr\n"); @@ -245,18 +247,19 @@ int oo_y_lut_hdr_hlg[149] = { static int num_hdr_sdr_lut = 149; int oo_y_lut_hdr_sdr[149] = { - 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, - 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, - 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, - 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, - 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, - 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, - 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, - 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, - 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, - 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, - 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, - 255, 255, 255, 255, 255, 255 + 2844, 2844, 2844, 2844, 2844, 2844, 2844, 2844, 2844, 2844, 2844, + 2844, 2844, 2844, 2844, 2844, 2844, 2844, 2844, 2844, 2844, 2844, + 2844, 2844, 2844, 2844, 2844, 2844, 2844, 2844, 2844, 2844, 2844, + 2844, 2844, 2844, 2844, 2844, 2844, 2844, 2844, 2844, 2844, 2844, + 2844, 2844, 2844, 2844, 2844, 2844, 2844, 2844, 2844, 2844, 2844, + 2844, 2844, 2844, 2844, 2844, 2844, 2844, 2844, 2844, 2844, 2844, + 2844, 2844, 2844, 2844, 2844, 2844, 2844, 2844, 2844, 2844, 2844, + 2844, 2844, 2844, 2844, 2844, 2844, 2844, 2844, 2844, 2844, 2844, + 2844, 2844, 2844, 2844, 2844, 2844, 2844, 2844, 2844, 2844, 2810, + 2635, 2481, 2225, 2020, 1852, 1712, 1593, 1491, 1403, 1325, 1196, + 1092, 1006, 935, 874, 822, 776, 736, 668, 614, 568, 530, 497, 468, + 442, 419, 381, 349, 322, 299, 279, 261, 246, 233, 221, 210, 201, + 192, 184, 177, 170, 164, 158, 153, 148, 143, 139, 135, 131, 128 }; module_param_array(oo_y_lut_hdr_sdr, int, &num_hdr_sdr_lut, 0664); MODULE_PARM_DESC(oo_y_lut_hdr_sdr, "\n num_hdr_sdr_lut\n"); @@ -713,7 +716,11 @@ int ncl_2020_709[9] = { /*int ncl_2020_709[9] = {*/ /*2543, -459, -36, -88, 2133, 3, -41, -161, 2250};*/ -/* special primary->709rgb*/ +/* standard2020->dcip3-d65 8bit*/ +int ncl_2020_p3[9] = { + 368, -96, -16, -16, 275, -3, 1, -8, 263}; + +/*for iptv special primary->709rgb*/ int ncl_sp_709[9] = { 2684, -489, -147, -201, 2266, -17, -29, -171, 2248}; @@ -757,6 +764,16 @@ static int bypass_coeff[15] = { 0, 0, 0, }; +unsigned int _log2(unsigned int value) +{ + unsigned int ret; + + for (ret = 0; value > 1; ret++) + value >>= 1; + + return ret; +} + /*in/out matrix*/ void set_hdr_matrix( enum hdr_module_sel module_sel, @@ -1244,8 +1261,12 @@ void set_hdr_matrix( (hdr_mtx_param->p_sel & HDR_BYPASS) && (module_sel & OSD1_HDR)) gmut_shift = 10; + else if (hdr_mtx_param->p_sel & HDR_SDR) + /*work around for gamut bug*/ + gmut_shift = 0;/*11*/ else - gmut_shift = 11; + /*default 11, set 12 avoid gamut overwrite*/ + gmut_shift = 12; for (i = 0; i < 3; i++) c_gain_lim_coef[i] = @@ -1280,26 +1301,29 @@ void set_hdr_matrix( adpscl_alpha[i] = 10 * in_luma * (1 << adp_scal_shift) / out_luma; - if (hdr_mtx_param->p_sel & HDR_SDR) { - if (i == 0) - adpscl_shift[i] = adp_scal_shift; - else - adpscl_shift[i] = adp_scal_shift - 2; - } else - adpscl_shift[i] = adp_scal_shift; - adpscl_ys_coef[i] = 1 << adp_scal_shift; adpscl_beta_s[i] = 0; adpscl_beta[i] = 0; } + /*shift0 is for x coordinate*/ + adpscl_shift[0] = adp_scal_shift; + /*shift1 is for scale multiple*/ + if (hdr_mtx_param->p_sel & HDR_SDR) + adpscl_shift[1] = adp_scal_shift - + _log2((1 << adp_scal_shift) / oo_y_lut_hdr_sdr[148]); + else + adpscl_shift[1] = adp_scal_shift - 1; + /*shift2 is not used, set default*/ + adpscl_shift[2] = adp_scal_shift; + /*gamut mode: 1->gamut before ootf*/ /*2->gamut after ootf*/ /*other->disable gamut*/ if ((is_meson_g12b_cpu() && is_meson_rev_b()) && (module_sel & OSD1_HDR)) { - _VSYNC_WR_MPEG_REG_BITS(hdr_ctrl, 2, 6, 2); + _VSYNC_WR_MPEG_REG_BITS(hdr_ctrl, 1, 6, 2); _VSYNC_WR_MPEG_REG(GMUT_CTRL, gmut_shift); _VSYNC_WR_MPEG_REG(GMUT_COEF0, @@ -1320,8 +1344,8 @@ void set_hdr_matrix( _VSYNC_WR_MPEG_REG(CGAIN_COEF0, c_gain_lim_coef[1] << 16 | c_gain_lim_coef[0]); - _VSYNC_WR_MPEG_REG(CGAIN_COEF1, c_gain_lim_coef[2] | - 0x400 << 16); + _VSYNC_WR_MPEG_REG_BITS(CGAIN_COEF1, + c_gain_lim_coef[2], 0, 12); _VSYNC_WR_MPEG_REG(ADPS_CTRL, adpscl_enable[2] << 6 | @@ -1349,7 +1373,7 @@ void set_hdr_matrix( return; } - VSYNC_WR_MPEG_REG_BITS(hdr_ctrl, 2, 6, 2); + VSYNC_WR_MPEG_REG_BITS(hdr_ctrl, 1, 6, 2); VSYNC_WR_MPEG_REG(GMUT_CTRL, gmut_shift); VSYNC_WR_MPEG_REG(GMUT_COEF0, @@ -1370,8 +1394,8 @@ void set_hdr_matrix( VSYNC_WR_MPEG_REG(CGAIN_COEF0, c_gain_lim_coef[1] << 16 | c_gain_lim_coef[0]); - VSYNC_WR_MPEG_REG(CGAIN_COEF1, c_gain_lim_coef[2] | - 0x400 << 16); + VSYNC_WR_MPEG_REG_BITS(CGAIN_COEF1, c_gain_lim_coef[2], + 0, 12); VSYNC_WR_MPEG_REG(ADPS_CTRL, adpscl_enable[2] << 6 | adpscl_enable[1] << 5 | @@ -1657,7 +1681,10 @@ void set_oetf_lut( (lut[i * 2 + 1] << 16) + lut[i * 2]); } - _VSYNC_WR_MPEG_REG(oetf_lut_data_port, lut[148]); + if (hdr_lut_param->bitdepth == 10) + _VSYNC_WR_MPEG_REG(oetf_lut_data_port, lut[148] >> 2); + else + _VSYNC_WR_MPEG_REG(oetf_lut_data_port, lut[148]); return; } @@ -1678,7 +1705,11 @@ void set_oetf_lut( (lut[i * 2 + 1] << 16) + lut[i * 2]); } - VSYNC_WR_MPEG_REG(oetf_lut_data_port, lut[148]); + if (hdr_lut_param->bitdepth == 10) + VSYNC_WR_MPEG_REG(oetf_lut_data_port, lut[148] >> 2); + else + VSYNC_WR_MPEG_REG(oetf_lut_data_port, lut[148]); + } void set_c_gain( @@ -1689,32 +1720,39 @@ void set_c_gain( unsigned int cgain_lut_addr_port = 0; unsigned int cgain_lut_data_port = 0; unsigned int hdr_ctrl = 0; + unsigned int cgain_coef1 = 0; unsigned int i = 0; if (module_sel & VD1_HDR) { cgain_lut_addr_port = VD1_CGAIN_LUT_ADDR_PORT; cgain_lut_data_port = VD1_CGAIN_LUT_DATA_PORT; hdr_ctrl = VD1_HDR2_CTRL; + cgain_coef1 = VD1_HDR2_CGAIN_COEF1; } else if (module_sel & VD2_HDR) { cgain_lut_addr_port = VD2_CGAIN_LUT_ADDR_PORT; cgain_lut_data_port = VD2_CGAIN_LUT_DATA_PORT; hdr_ctrl = VD2_HDR2_CTRL; + cgain_coef1 = VD2_HDR2_CGAIN_COEF1; } else if (module_sel & OSD1_HDR) { cgain_lut_addr_port = OSD1_CGAIN_LUT_ADDR_PORT; cgain_lut_data_port = OSD1_CGAIN_LUT_DATA_PORT; hdr_ctrl = OSD1_HDR2_CTRL; + cgain_coef1 = OSD1_HDR2_CGAIN_COEF1; } else if (module_sel & DI_HDR) { cgain_lut_addr_port = DI_CGAIN_LUT_ADDR_PORT; cgain_lut_data_port = DI_CGAIN_LUT_DATA_PORT; hdr_ctrl = DI_HDR2_CTRL; + cgain_coef1 = DI_HDR2_CGAIN_COEF1; } else if (module_sel & VDIN0_HDR) { cgain_lut_addr_port = VDIN0_CGAIN_LUT_ADDR_PORT; cgain_lut_data_port = VDIN0_CGAIN_LUT_DATA_PORT; hdr_ctrl = VDIN0_HDR2_CTRL; + cgain_coef1 = VDIN0_HDR2_CGAIN_COEF1; } else if (module_sel & VDIN1_HDR) { cgain_lut_addr_port = VDIN1_CGAIN_LUT_ADDR_PORT; cgain_lut_data_port = VDIN1_CGAIN_LUT_DATA_PORT; hdr_ctrl = VDIN1_HDR2_CTRL; + cgain_coef1 = VDIN1_HDR2_CGAIN_COEF1; } for (i = 0; i < HDR2_CGAIN_LUT_SIZE; i++) @@ -1740,9 +1778,17 @@ void set_c_gain( return; } - VSYNC_WR_MPEG_REG_BITS(hdr_ctrl, hdr_lut_param->cgain_en, 12, 1); + /*cgain mode force 0*/ + VSYNC_WR_MPEG_REG_BITS(hdr_ctrl, 0, 12, 1); VSYNC_WR_MPEG_REG_BITS(hdr_ctrl, hdr_lut_param->cgain_en, 0, 1); + if (cpu_after_eq(MESON_CPU_MAJOR_ID_TL1)) { + if (hdr_lut_param->bitdepth == 10) + VSYNC_WR_MPEG_REG_BITS(cgain_coef1, 0x400, 16, 13); + else if (hdr_lut_param->bitdepth == 12) + VSYNC_WR_MPEG_REG_BITS(cgain_coef1, 0x1000, 16, 13); + } + if (!hdr_lut_param->cgain_en) return; @@ -1971,13 +2017,12 @@ void hdr_func(enum hdr_module_sel module_sel, hdr_mtx_param.mtx_ogain[i] = rgb2ycbcr_ncl2020[i]; hdr_mtx_param.mtx_out[i] = rgb2ycbcr_709[i]; if (i < 9) { - if (is_meson_g12a_cpu() || - is_meson_g12b_cpu()) - hdr_mtx_param.mtx_gamut[i] = - ncl_sp_709[i]; - else + if (hdr_process_select & HLG_SDR) hdr_mtx_param.mtx_gamut[i] = ncl_2020_709[i]; + else + hdr_mtx_param.mtx_gamut[i] = + ncl_2020_p3[i]; } } hdr_mtx_param.mtx_on = MTX_ON;