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kselftest/arm64: mte: Fix MTE feature detection

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[ Upstream commit 592432862c ]

To check whether the CPU and kernel support the MTE features we want
to test, we use an (emulated) CPU ID register read. However we only
check against a very particular feature version (0b0010), even though
the ARM ARM promises ID register features to be backwards compatible.

While this could be fixed by using ">=" instead of "==", we should
actually use the explicit HWCAP2_MTE hardware capability, exposed by the
kernel via the ELF auxiliary vectors.

That moves this responsibility to the kernel, and fixes running the
tests on machines with FEAT_MTE3 capability.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Mark Brown <broone@kernel.org>
Link: https://lore.kernel.org/r/20210319165334.29213-7-andre.przywara@arm.com
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
This commit is contained in:
Andre Przywara
2021-03-19 16:53:29 +00:00
committed by Greg Kroah-Hartman
parent d16749988d
commit f38f972e14
1 changed files with 2 additions and 11 deletions
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13
tools/testing/selftests/arm64/mte/mte_common_util.c
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@@ -278,22 +278,13 @@ int mte_switch_mode(int mte_option, unsigned long incl_mask)
return 0;
}
#define ID_AA64PFR1_MTE_SHIFT 8
#define ID_AA64PFR1_MTE 2
int mte_default_setup(void)
{
unsigned long hwcaps = getauxval(AT_HWCAP);
unsigned long hwcaps2 = getauxval(AT_HWCAP2);
unsigned long en = 0;
int ret;
if (!(hwcaps & HWCAP_CPUID)) {
ksft_print_msg("FAIL: CPUID registers unavailable\n");
return KSFT_FAIL;
}
/* Read ID_AA64PFR1_EL1 register */
asm volatile("mrs %0, id_aa64pfr1_el1" : "=r"(hwcaps) : : "memory");
if (((hwcaps >> ID_AA64PFR1_MTE_SHIFT) & MT_TAG_MASK) != ID_AA64PFR1_MTE) {
if (!(hwcaps2 & HWCAP2_MTE)) {
ksft_print_msg("FAIL: MTE features unavailable\n");
return KSFT_SKIP;
}