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PCI: Delay after FLR of Solidigm P44 Pro NVMe

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[ Upstream commit 0ac448e0d2 ]

Prevent KVM hang when a Solidgm P44 Pro NVMe is passed through to a guest
via IOMMU and the guest is subsequently rebooted.

A similar issue was identified and patched by 51ba09452d ("PCI: Delay
after FLR of Intel DC P3700 NVMe") and the same fix can be applied for this
case. (Intel spun off their NAND and SSD business as Solidigm and sold it
to SK Hynix in late 2021.)

Link: https://lore.kernel.org/r/20230507073519.9737-1-mike@oobak.org
Signed-off-by: Mike Pastore <mike@oobak.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
This commit is contained in:
Mike Pastore
2023-05-07 02:35:19 -05:00
committed by Greg Kroah-Hartman
parent 0fe6a97a5f
commit f4aae2afe2
2 changed files with 8 additions and 4 deletions
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10
drivers/pci/quirks.c
View File

@@ -4011,10 +4011,11 @@ static int nvme_disable_and_flr(struct pci_dev *dev, bool probe)
} }
/* /*
* Intel DC P3700 NVMe controller will timeout waiting for ready status * Some NVMe controllers such as Intel DC P3700 and Solidigm P44 Pro will
* to change after NVMe enable if the driver starts interacting with the * timeout waiting for ready status to change after NVMe enable if the driver
* device too soon after FLR. A 250ms delay after FLR has heuristically * starts interacting with the device too soon after FLR. A 250ms delay after
* proven to produce reliably working results for device assignment cases. * FLR has heuristically proven to produce reliably working results for device
* assignment cases.
*/ */
static int delay_250ms_after_flr(struct pci_dev *dev, bool probe) static int delay_250ms_after_flr(struct pci_dev *dev, bool probe)
{ {
@@ -4101,6 +4102,7 @@ static const struct pci_dev_reset_methods pci_dev_reset_methods[] = {
{ PCI_VENDOR_ID_SAMSUNG, 0xa804, nvme_disable_and_flr }, { PCI_VENDOR_ID_SAMSUNG, 0xa804, nvme_disable_and_flr },
{ PCI_VENDOR_ID_INTEL, 0x0953, delay_250ms_after_flr }, { PCI_VENDOR_ID_INTEL, 0x0953, delay_250ms_after_flr },
{ PCI_VENDOR_ID_INTEL, 0x0a54, delay_250ms_after_flr }, { PCI_VENDOR_ID_INTEL, 0x0a54, delay_250ms_after_flr },
{ PCI_VENDOR_ID_SOLIDIGM, 0xf1ac, delay_250ms_after_flr },
{ PCI_VENDOR_ID_CHELSIO, PCI_ANY_ID, { PCI_VENDOR_ID_CHELSIO, PCI_ANY_ID,
reset_chelsio_generic_dev }, reset_chelsio_generic_dev },
{ PCI_VENDOR_ID_HUAWEI, PCI_DEVICE_ID_HINIC_VF, { PCI_VENDOR_ID_HUAWEI, PCI_DEVICE_ID_HINIC_VF,

2
include/linux/pci_ids.h
View File

@@ -158,6 +158,8 @@
#define PCI_VENDOR_ID_LOONGSON 0x0014 #define PCI_VENDOR_ID_LOONGSON 0x0014
#define PCI_VENDOR_ID_SOLIDIGM 0x025e
#define PCI_VENDOR_ID_TTTECH 0x0357 #define PCI_VENDOR_ID_TTTECH 0x0357
#define PCI_DEVICE_ID_TTTECH_MC322 0x000a #define PCI_DEVICE_ID_TTTECH_MC322 0x000a