From f561f2cf86b5cef349e8f991b9aaced5a1cb8d39 Mon Sep 17 00:00:00 2001
From: William Wu <william.wu@rock-chips.com>
Date: Tue, 23 Oct 2018 15:06:04 +0800
Subject: [PATCH] arm64: dts: rockchip: enable power domain for rk1808 dwc3

Change-Id: Ia18a03b3c68b560ee4c5e47a4a82f11b786c8964
Signed-off-by: William Wu <william.wu@rock-chips.com>
---
 arch/arm64/boot/dts/rockchip/rk1808.dtsi | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk1808.dtsi b/arch/arm64/boot/dts/rockchip/rk1808.dtsi
index 5700d18033c0..52d6c3eccc6c 100644
--- a/arch/arm64/boot/dts/rockchip/rk1808.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk1808.dtsi
@@ -143,6 +143,7 @@
 			      "suspend_clk";
 		assigned-clocks = <&cru SCLK_USB3_OTG0_SUSPEND>;
 		assigned-clock-rates = <24000000>;
+		power-domains = <&power RK1808_PD_PCIE>;
 		#address-cells = <2>;
 		#size-cells = <2>;
 		ranges;