From f56f097d958f79d878bcb5fc587dfece65ab38e1 Mon Sep 17 00:00:00 2001 From: Finley Xiao Date: Tue, 24 Aug 2021 17:31:33 +0800 Subject: [PATCH] arm64: dts: rockchip: rk3588: Add tsadc device node Change-Id: I9677dad752a4f380e984b42a8ee042eef924b6d1 Signed-off-by: Finley Xiao --- arch/arm64/boot/dts/rockchip/rk3588s.dtsi | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi index 1eed47425b88..f4c246868250 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi @@ -992,6 +992,26 @@ status = "disabled"; }; + tsadc: tsadc@fec00000 { + compatible = "rockchip,rk3588-tsadc"; + reg = <0x0 0xfec00000 0x0 0x400>; + interrupts = ; + clocks = <&cru CLK_TSADC>, <&cru PCLK_TSADC>; + clock-names = "tsadc", "apb_pclk"; + assigned-clocks = <&cru CLK_TSADC>; + assigned-clock-rates = <2000000>; + resets = <&cru SRST_TSADC>, <&cru SRST_P_TSADC>; + reset-names = "tsadc", "tsadc-apb"; + #thermal-sensor-cells = <1>; + rockchip,hw-tshut-temp = <120000>; + rockchip,hw-tshut-mode = <1>; /* tshut mode 0:CRU 1:GPIO */ + rockchip,hw-tshut-polarity = <0>; /* tshut polarity 0:LOW 1:HIGH */ + pinctrl-names = "gpio", "otpout"; + pinctrl-0 = <&tsadc_gpio_func>; + pinctrl-1 = <&tsadc_shut_org>; + status = "disabled"; + }; + otp: otp@fecc0000 { compatible = "rockchip,rk3588-otp"; reg = <0x0 0xfecc0000 0x0 0x400>;