From f5a4e5e984c32f65fe4eb52848974b35cb479ee2 Mon Sep 17 00:00:00 2001 From: Liang Chen Date: Thu, 4 Jul 2024 20:16:48 +0800 Subject: [PATCH] arm64: dts: rockchip: rk3562: auto select opps for rk3562j Also set the minimus voltage to 0.9V for rk3562j Signed-off-by: Liang Chen Change-Id: Ia30b1c3fd42f0d4d8eac18ee9ec3f93a7c6204d9 --- arch/arm64/boot/dts/rockchip/rk3562.dtsi | 153 ++++++++++++++++++++-- arch/arm64/boot/dts/rockchip/rk3562j.dtsi | 82 ------------ 2 files changed, 145 insertions(+), 90 deletions(-) diff --git a/arch/arm64/boot/dts/rockchip/rk3562.dtsi b/arch/arm64/boot/dts/rockchip/rk3562.dtsi index 3ed54f3a7859..f77cc830a61e 100644 --- a/arch/arm64/boot/dts/rockchip/rk3562.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3562.dtsi @@ -252,9 +252,12 @@ opp-shared; mbist-vmin = <825000 900000 975000>; - nvmem-cells = <&cpu_leakage>, <&cpu_opp_info>, <&mbist_vmin>, <&cpu_pvtpll>; - nvmem-cell-names = "leakage", "opp-info", "mbist-vmin", "pvtm"; + nvmem-cells = <&cpu_leakage>, <&cpu_opp_info>, <&mbist_vmin>, <&cpu_pvtpll>, + <&specification_serial_number>; + nvmem-cell-names = "leakage", "opp-info", "mbist-vmin", "pvtm", + "specification_serial_number"; + rockchip,supported-hw; rockchip,pvtm-voltage-sel = < 0 1280 0 1281 1350 1 @@ -276,22 +279,26 @@ rockchip,low-temp-min-volt = <1050000>; opp-408000000 { + opp-supported-hw = <0xf9 0xffff>; opp-hz = /bits/ 64 <408000000>; opp-microvolt = <825000 825000 1150000>; clock-latency-ns = <40000>; opp-suspend; }; opp-600000000 { + opp-supported-hw = <0xf9 0xffff>; opp-hz = /bits/ 64 <600000000>; opp-microvolt = <825000 825000 1150000>; clock-latency-ns = <40000>; }; opp-816000000 { + opp-supported-hw = <0xf9 0xffff>; opp-hz = /bits/ 64 <816000000>; opp-microvolt = <825000 825000 1150000>; clock-latency-ns = <40000>; }; opp-1008000000 { + opp-supported-hw = <0xf9 0xffff>; opp-hz = /bits/ 64 <1008000000>; opp-microvolt = <850000 850000 1150000>; opp-microvolt-L0 = <850000 850000 1150000>; @@ -302,6 +309,7 @@ clock-latency-ns = <40000>; }; opp-1200000000 { + opp-supported-hw = <0xf9 0xffff>; opp-hz = /bits/ 64 <1200000000>; opp-microvolt = <925000 925000 1150000>; opp-microvolt-L0 = <925000 925000 1150000>; @@ -312,6 +320,7 @@ clock-latency-ns = <40000>; }; opp-1416000000 { + opp-supported-hw = <0xf9 0xffff>; opp-hz = /bits/ 64 <1416000000>; opp-microvolt = <1000000 1000000 1150000>; opp-microvolt-L0 = <1000000 1000000 1150000>; @@ -322,6 +331,7 @@ clock-latency-ns = <40000>; }; opp-1608000000 { + opp-supported-hw = <0xf9 0xffff>; opp-hz = /bits/ 64 <1608000000>; opp-microvolt = <1037500 1037500 1150000>; opp-microvolt-L0 = <1037500 1037500 1150000>; @@ -332,6 +342,7 @@ clock-latency-ns = <40000>; }; opp-1800000000 { + opp-supported-hw = <0xf9 0xffff>; opp-hz = /bits/ 64 <1800000000>; opp-microvolt = <1125000 1125000 1150000>; opp-microvolt-L0 = <1125000 1125000 1150000>; @@ -342,6 +353,7 @@ clock-latency-ns = <40000>; }; opp-2016000000 { + opp-supported-hw = <0xf9 0xffff>; opp-hz = /bits/ 64 <2016000000>; opp-microvolt = <1150000 1150000 1150000>; opp-microvolt-L0 = <1150000 1150000 1150000>; @@ -351,6 +363,39 @@ opp-microvolt-L4 = <1075000 1075000 1150000>; clock-latency-ns = <40000>; }; + + /* RK3562J cpu OPPs */ + opp-j-408000000 { + opp-supported-hw = <0x04 0xffff>; + opp-hz = /bits/ 64 <408000000>; + opp-microvolt = <900000 900000 1150000>; + clock-latency-ns = <40000>; + }; + opp-j-600000000 { + opp-supported-hw = <0x04 0xffff>; + opp-hz = /bits/ 64 <600000000>; + opp-microvolt = <900000 900000 1150000>; + clock-latency-ns = <40000>; + }; + opp-j-816000000 { + opp-supported-hw = <0x04 0xffff>; + opp-hz = /bits/ 64 <816000000>; + opp-microvolt = <900000 900000 1150000>; + clock-latency-ns = <40000>; + }; + opp-j-1008000000 { + opp-supported-hw = <0x04 0xffff>; + opp-hz = /bits/ 64 <1008000000>; + opp-microvolt = <900000 900000 1150000>; + clock-latency-ns = <40000>; + }; + opp-j-1200000000 { + opp-supported-hw = <0x04 0xffff>; + opp-hz = /bits/ 64 <1200000000>; + opp-microvolt = <900000 900000 1150000>; + opp-microvolt-L0 = <925000 925000 1150000>; + clock-latency-ns = <40000>; + }; }; arm_pmu: arm-pmu { @@ -496,13 +541,16 @@ compatible = "operating-points-v2"; mbist-vmin = <850000 900000 925000>; - nvmem-cells = <&log_leakage>, <&dmc_opp_info>, <&log_mbist_vmin>; - nvmem-cell-names = "leakage", "opp-info", "mbist-vmin"; + nvmem-cells = <&log_leakage>, <&dmc_opp_info>, <&log_mbist_vmin>, + <&specification_serial_number>; + nvmem-cell-names = "leakage", "opp-info", "mbist-vmin", + "specification_serial_number"; rockchip,temp-hysteresis = <5000>; rockchip,low-temp = <10000>; rockchip,low-temp-min-volt = <950000>; + rockchip,supported-hw; rockchip,leakage-voltage-sel = < 1 15 0 16 20 1 @@ -510,12 +558,20 @@ >; opp-1560000000 { + opp-supported-hw = <0xf9 0xffff>; opp-hz = /bits/ 64 <1560000000>; opp-microvolt = <900000 900000 950000>; opp-microvolt-L0 = <900000 900000 950000>; opp-microvolt-L1 = <875000 875000 950000>; opp-microvolt-L2 = <850000 850000 950000>; }; + + /* RK3562J dmc OPPs */ + opp-j-1560000000 { + opp-supported-hw = <0x04 0xffff>; + opp-hz = /bits/ 64 <1560000000>; + opp-microvolt = <900000 900000 900000>; + }; }; firmware { @@ -1482,9 +1538,12 @@ compatible = "operating-points-v2"; mbist-vmin = <825000 900000 975000>; - nvmem-cells = <&npu_leakage>, <&npu_opp_info>, <&mbist_vmin>, <&npu_pvtpll>; - nvmem-cell-names = "leakage", "opp-info", "mbist-vmin", "pvtm"; + nvmem-cells = <&npu_leakage>, <&npu_opp_info>, <&mbist_vmin>, <&npu_pvtpll>, + <&specification_serial_number>; + nvmem-cell-names = "leakage", "opp-info", "mbist-vmin", "pvtm", + "specification_serial_number"; + rockchip,supported-hw; rockchip,pvtm-voltage-sel = < 0 760 0 761 800 1 @@ -1506,18 +1565,22 @@ rockchip,low-temp-min-volt = <925000>; opp-300000000 { + opp-supported-hw = <0xf9 0xffff>; opp-hz = /bits/ 64 <300000000>; opp-microvolt = <825000 825000 1000000>; }; opp-400000000 { + opp-supported-hw = <0xf9 0xffff>; opp-hz = /bits/ 64 <400000000>; opp-microvolt = <825000 825000 1000000>; }; opp-500000000 { + opp-supported-hw = <0xf9 0xffff>; opp-hz = /bits/ 64 <500000000>; opp-microvolt = <825000 825000 1000000>; }; opp-600000000 { + opp-supported-hw = <0xf9 0xffff>; opp-hz = /bits/ 64 <600000000>; opp-microvolt = <875000 875000 1000000>; opp-microvolt-L0 = <875000 875000 1000000>; @@ -1527,6 +1590,7 @@ opp-microvolt-L4 = <825000 825000 1000000>; }; opp-700000000 { + opp-supported-hw = <0xf9 0xffff>; opp-hz = /bits/ 64 <700000000>; opp-microvolt = <925000 925000 1000000>; opp-microvolt-L0 = <925000 925000 1000000>; @@ -1536,6 +1600,7 @@ opp-microvolt-L4 = <825000 825000 1000000>; }; opp-800000000 { + opp-supported-hw = <0xf9 0xffff>; opp-hz = /bits/ 64 <800000000>; opp-microvolt = <975000 975000 1000000>; opp-microvolt-L0 = <975000 975000 1000000>; @@ -1545,6 +1610,7 @@ opp-microvolt-L4 = <875000 875000 1000000>; }; opp-900000000 { + opp-supported-hw = <0xf9 0xffff>; opp-hz = /bits/ 64 <900000000>; opp-microvolt = <1000000 1000000 1000000>; opp-microvolt-L0 = <1000000 1000000 1000000>; @@ -1554,6 +1620,7 @@ opp-microvolt-L4 = <925000 925000 1000000>; }; opp-1000000000 { + opp-supported-hw = <0xf9 0xffff>; opp-hz = /bits/ 64 <1000000000>; opp-microvolt = <1000000 1000000 1000000>; opp-microvolt-L0 = <1000000 1000000 1000000>; @@ -1562,6 +1629,35 @@ opp-microvolt-L3 = <975000 975000 1000000>; opp-microvolt-L4 = <950000 950000 1000000>; }; + + /* RK3562J npu OPPs */ + opp-j-300000000 { + opp-supported-hw = <0x04 0xffff>; + opp-hz = /bits/ 64 <300000000>; + opp-microvolt = <900000 900000 1000000>; + }; + opp-j-400000000 { + opp-supported-hw = <0x04 0xffff>; + opp-hz = /bits/ 64 <400000000>; + opp-microvolt = <900000 900000 1000000>; + }; + opp-j-500000000 { + opp-supported-hw = <0x04 0xffff>; + opp-hz = /bits/ 64 <500000000>; + opp-microvolt = <900000 900000 1000000>; + }; + opp-j-600000000 { + opp-supported-hw = <0x04 0xffff>; + opp-hz = /bits/ 64 <600000000>; + opp-microvolt = <900000 900000 1000000>; + }; + opp-j-700000000 { + opp-supported-hw = <0x04 0xffff>; + opp-hz = /bits/ 64 <700000000>; + opp-microvolt = <925000 925000 1000000>; + opp-microvolt-L0 = <925000 925000 1000000>; + status = "disabled"; + }; }; rknpu_mmu: iommu@ff30a000 { @@ -1603,9 +1699,12 @@ compatible = "operating-points-v2"; mbist-vmin = <825000 900000 975000>; - nvmem-cells = <&gpu_leakage>, <&gpu_opp_info>, <&mbist_vmin>, <&gpu_pvtpll>; - nvmem-cell-names = "leakage", "opp-info", "mbist-vmin", "pvtm"; + nvmem-cells = <&gpu_leakage>, <&gpu_opp_info>, <&mbist_vmin>, <&gpu_pvtpll>, + <&specification_serial_number>; + nvmem-cell-names = "leakage", "opp-info", "mbist-vmin", "pvtm", + "specification_serial_number"; + rockchip,supported-hw; rockchip,pvtm-voltage-sel = < 0 780 0 781 820 1 @@ -1627,22 +1726,27 @@ rockchip,low-temp-min-volt = <925000>; opp-300000000 { + opp-supported-hw = <0xf9 0xffff>; opp-hz = /bits/ 64 <300000000>; opp-microvolt = <825000 825000 1000000>; }; opp-400000000 { + opp-supported-hw = <0xf9 0xffff>; opp-hz = /bits/ 64 <400000000>; opp-microvolt = <825000 825000 1000000>; }; opp-500000000 { + opp-supported-hw = <0xf9 0xffff>; opp-hz = /bits/ 64 <500000000>; opp-microvolt = <825000 825000 1000000>; }; opp-600000000 { + opp-supported-hw = <0xf9 0xffff>; opp-hz = /bits/ 64 <600000000>; opp-microvolt = <825000 825000 1000000>; }; opp-700000000 { + opp-supported-hw = <0xf9 0xffff>; opp-hz = /bits/ 64 <700000000>; opp-microvolt = <900000 900000 1000000>; opp-microvolt-L0 = <900000 900000 1000000>; @@ -1652,6 +1756,7 @@ opp-microvolt-L4 = <825000 825000 1000000>; }; opp-800000000 { + opp-supported-hw = <0xf9 0xffff>; opp-hz = /bits/ 64 <800000000>; opp-microvolt = <950000 950000 1000000>; opp-microvolt-L0 = <950000 950000 1000000>; @@ -1661,6 +1766,7 @@ opp-microvolt-L4 = <850000 850000 1000000>; }; opp-900000000 { + opp-supported-hw = <0xf9 0xffff>; opp-hz = /bits/ 64 <900000000>; opp-microvolt = <1000000 1000000 1000000>; opp-microvolt-L0 = <1000000 1000000 1000000>; @@ -1669,6 +1775,33 @@ opp-microvolt-L3 = <925000 925000 1000000>; opp-microvolt-L4 = <900000 900000 1000000>; }; + + /* RK3562J gpu OPPs */ + opp-j-300000000 { + opp-supported-hw = <0x04 0xffff>; + opp-hz = /bits/ 64 <300000000>; + opp-microvolt = <900000 900000 1000000>; + }; + opp-j-400000000 { + opp-supported-hw = <0x04 0xffff>; + opp-hz = /bits/ 64 <400000000>; + opp-microvolt = <900000 900000 1000000>; + }; + opp-j-500000000 { + opp-supported-hw = <0x04 0xffff>; + opp-hz = /bits/ 64 <500000000>; + opp-microvolt = <900000 900000 1000000>; + }; + opp-j-600000000 { + opp-supported-hw = <0x04 0xffff>; + opp-hz = /bits/ 64 <600000000>; + opp-microvolt = <900000 900000 1000000>; + }; + opp-j-700000000 { + opp-supported-hw = <0x04 0xffff>; + opp-hz = /bits/ 64 <700000000>; + opp-microvolt = <900000 900000 1000000>; + }; }; rkvdec: rkvdec@ff340100 { @@ -2632,6 +2765,10 @@ cpu_code: cpu-code@2 { reg = <0x02 0x2>; }; + specification_serial_number: specification-serial-number@7 { + reg = <0x07 0x1>; + bits = <0 5>; + }; otp_cpu_version: cpu-version@8 { reg = <0x08 0x1>; bits = <3 3>; diff --git a/arch/arm64/boot/dts/rockchip/rk3562j.dtsi b/arch/arm64/boot/dts/rockchip/rk3562j.dtsi index b2ec94fccda0..5b660f7f4a5d 100644 --- a/arch/arm64/boot/dts/rockchip/rk3562j.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3562j.dtsi @@ -28,85 +28,3 @@ status = "disabled"; }; }; - -&cpu0_opp_table { - /delete-node/ mbist-vmin; - /* - * Max CPU frequency is 1.8GHz for the overdrive mode, - * but it will reduce chip lifetime. - */ - /delete-node/ opp-1416000000; - /delete-node/ opp-1608000000; - /delete-node/ opp-1800000000; - /delete-node/ opp-2016000000; - opp-408000000 { - opp-microvolt = <850000 850000 1150000>; - }; - opp-600000000 { - opp-microvolt = <850000 850000 1150000>; - }; - opp-816000000 { - opp-microvolt = <850000 850000 1150000>; - }; - opp-1008000000 { - opp-microvolt = <850000 850000 1150000>; - }; - opp-1200000000 { - opp-microvolt-L4 = <850000 850000 1150000>; - }; -}; - -&gpu_opp_table { - /delete-node/ mbist-vmin; - /* - * Max GPU frequency is 900MHz for the overdrive mode, - * but it will reduce chip lifetime. - */ - /delete-node/ opp-800000000; - /delete-node/ opp-900000000; - opp-300000000 { - opp-microvolt = <850000 850000 1000000>; - }; - opp-400000000 { - opp-microvolt = <850000 850000 1000000>; - }; - opp-500000000 { - opp-microvolt = <850000 850000 1000000>; - }; - opp-600000000 { - opp-microvolt = <850000 850000 1000000>; - }; - opp-700000000 { - opp-microvolt-L3 = <850000 850000 1000000>; - opp-microvolt-L4 = <850000 850000 1000000>; - }; -}; - -&npu_opp_table { - /delete-node/ mbist-vmin; - /* - * Max NPU frequency is 900MHz for the overdrive mode, - * but it will reduce chip lifetime. - */ - /delete-node/ opp-800000000; - /delete-node/ opp-900000000; - /delete-node/ opp-1000000000; - opp-300000000 { - opp-microvolt = <850000 850000 1000000>; - }; - opp-400000000 { - opp-microvolt = <850000 850000 1000000>; - }; - opp-500000000 { - opp-microvolt = <850000 850000 1000000>; - }; - opp-600000000 { - opp-microvolt-L2 = <850000 850000 1000000>; - opp-microvolt-L3 = <850000 850000 1000000>; - opp-microvolt-L4 = <850000 850000 1000000>; - }; - opp-700000000 { - opp-microvolt-L4 = <850000 850000 1000000>; - status = "disabled"; - }; -};