From f6e5089748e6839f6316f7c6556d226d3c7bc3a2 Mon Sep 17 00:00:00 2001 From: Elaine Zhang Date: Fri, 18 May 2018 15:57:08 +0800 Subject: [PATCH] ARM64: dts: rockchip: rk3328: mark xin32k clk as fixed clk Change-Id: I25ab72ba7af64b7031fb02d30d0cb5cb6798d692 Signed-off-by: Elaine Zhang --- arch/arm64/boot/dts/rockchip/rk3328-evb.dts | 9 ++++++++- arch/arm64/boot/dts/rockchip/rk3328-rock64.dts | 9 ++++++++- 2 files changed, 16 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/rockchip/rk3328-evb.dts b/arch/arm64/boot/dts/rockchip/rk3328-evb.dts index abae709192b0..b82d5872b4ab 100644 --- a/arch/arm64/boot/dts/rockchip/rk3328-evb.dts +++ b/arch/arm64/boot/dts/rockchip/rk3328-evb.dts @@ -127,6 +127,13 @@ #sound-dai-cells = <0>; }; + xin32k: xin32k { + compatible = "fixed-clock"; + clock-frequency = <32768>; + clock-output-names = "xin32k"; + #clock-cells = <0>; + }; + wireless-wlan { compatible = "wlan-platdata"; rockchip,grf = <&grf>; @@ -264,7 +271,7 @@ interrupt-parent = <&gpio2>; interrupts = <6 IRQ_TYPE_LEVEL_LOW>; #clock-cells = <1>; - clock-output-names = "xin32k", "rk805-clkout2"; + clock-output-names = "rk805-clkout1", "rk805-clkout2"; gpio-controller; #gpio-cells = <2>; pinctrl-names = "default"; diff --git a/arch/arm64/boot/dts/rockchip/rk3328-rock64.dts b/arch/arm64/boot/dts/rockchip/rk3328-rock64.dts index 114e9d4d3991..a4c5f869f67d 100644 --- a/arch/arm64/boot/dts/rockchip/rk3328-rock64.dts +++ b/arch/arm64/boot/dts/rockchip/rk3328-rock64.dts @@ -62,6 +62,13 @@ regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; }; + + xin32k: xin32k { + compatible = "fixed-clock"; + clock-frequency = <32768>; + clock-output-names = "xin32k"; + #clock-cells = <0>; + }; }; &cpu0 { @@ -118,7 +125,7 @@ interrupt-parent = <&gpio2>; interrupts = <6 IRQ_TYPE_LEVEL_LOW>; #clock-cells = <1>; - clock-output-names = "xin32k", "rk805-clkout2"; + clock-output-names = "rk805-clkout1", "rk805-clkout2"; pinctrl-names = "default"; pinctrl-0 = <&pmic_int_l>; rockchip,system-power-controller;