From f727d3ad8e73bf0af93f81b8ab137a67193cec71 Mon Sep 17 00:00:00 2001 From: Andy Yan Date: Tue, 30 Nov 2021 20:56:10 +0800 Subject: [PATCH] drm/fourcc: Add definitions for Rockchip vendor and VPU tiled format This introduces specific definitions for vendor Rockchip and its associated tiled format modifier. This modifier is used for the output format of the Video/JPEG Decoder, that can be imported directly with the VOP2. Signed-off-by: Andy Yan Signed-off-by: Sandy Huang Change-Id: I03c1a51af5fd8bc0702209ae216c4706b4101c49 --- include/uapi/drm/drm_fourcc.h | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/include/uapi/drm/drm_fourcc.h b/include/uapi/drm/drm_fourcc.h index 5b5db0381729..bedc59d650ae 100644 --- a/include/uapi/drm/drm_fourcc.h +++ b/include/uapi/drm/drm_fourcc.h @@ -334,6 +334,7 @@ extern "C" { #define DRM_FORMAT_MOD_VENDOR_ARM 0x08 #define DRM_FORMAT_MOD_VENDOR_ALLWINNER 0x09 #define DRM_FORMAT_MOD_VENDOR_AMLOGIC 0x0a +#define DRM_FORMAT_MOD_VENDOR_ROCKCHIP 0x0b /* add more to the end as needed */ @@ -1058,6 +1059,15 @@ drm_fourcc_canonicalize_nvidia_format_mod(__u64 modifier) */ #define AMLOGIC_FBC_OPTION_MEM_SAVING (1ULL << 0) +#define ROCKCHIP_TILED_BLOCK_SIZE_MASK 0xf +#define ROCKCHIP_TILED_BLOCK_SIZE_8x8 (1ULL) +#define ROCKCHIP_TILED_BLOCK_SIZE_4x4_MODE0 (2ULL) +#define ROCKCHIP_TILED_BLOCK_SIZE_4x4_MODE1 (3ULL) + +#define DRM_FORMAT_MOD_ROCKCHIP_TILED(_mode) fourcc_mod_code(ROCKCHIP, _mode) + +#define IS_ROCKCHIP_TILED_MOD(val) (((val) >> 56) == DRM_FORMAT_MOD_VENDOR_ROCKCHIP) + #if defined(__cplusplus) } #endif