From f8e80bc98a5953d4573a610cdc9feef3e9a386c9 Mon Sep 17 00:00:00 2001 From: Jianqun Xu Date: Mon, 7 Dec 2020 09:03:19 +0800 Subject: [PATCH] pinctrl: rockchip: rk3568: fix strength setting bug This patch fix following pins error design: 4a7/4b7/4c7/4d7, 3a7/3b7/3c7/3d7, 2a7/2b7/2c7/2d7, 1b7/1c7/1d7 share register with: 4a6/4b6/4c6/4d6, 3a6/3b6/3c6/3d6, 2a6/2b6/2c6/2d6, 1b6/1c6/1d6 Change-Id: I66fa6b261f2bec26b75750a77a56b372282b222f Signed-off-by: Jianqun Xu --- drivers/pinctrl/pinctrl-rockchip.c | 19 ++++++++++++------- 1 file changed, 12 insertions(+), 7 deletions(-) diff --git a/drivers/pinctrl/pinctrl-rockchip.c b/drivers/pinctrl/pinctrl-rockchip.c index 08477a068fab..43ba17ae5d95 100644 --- a/drivers/pinctrl/pinctrl-rockchip.c +++ b/drivers/pinctrl/pinctrl-rockchip.c @@ -2614,9 +2614,9 @@ static void rk3399_calc_drv_reg_and_bit(struct rockchip_pin_bank *bank, #define RK3568_SR_PINS_PER_REG 16 static int rk3568_calc_slew_rate_reg_and_bit(struct rockchip_pin_bank *bank, - int pin_num, - struct regmap **regmap, - int *reg, u8 *bit) + int pin_num, + struct regmap **regmap, + int *reg, u8 *bit) { struct rockchip_pinctrl *info = bank->drvdata; @@ -2672,8 +2672,8 @@ static void rk3568_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank, #define RK3568_DRV_BANK_STRIDE 0x40 static void rk3568_calc_drv_reg_and_bit(struct rockchip_pin_bank *bank, - int pin_num, struct regmap **regmap, - int *reg, u8 *bit) + int pin_num, struct regmap **regmap, + int *reg, u8 *bit) { struct rockchip_pinctrl *info = bank->drvdata; @@ -2694,8 +2694,13 @@ static void rk3568_calc_drv_reg_and_bit(struct rockchip_pin_bank *bank, *bit = (pin_num % RK3568_DRV_PINS_PER_REG); *bit *= RK3568_DRV_BITS_PER_PIN; } -} + if (rockchip_get_cpu_version() == 0) + if ((bank->bank_num == 1 && (pin_num == 15 || pin_num == 23 || pin_num == 31)) || + ((bank->bank_num == 2 || bank->bank_num == 3 || bank->bank_num == 4) && + (pin_num == 7 || pin_num == 15 || pin_num == 23 || pin_num == 31))) + *bit -= RK3568_DRV_BITS_PER_PIN; +} static int rockchip_perpin_drv_list[DRV_TYPE_MAX][8] = { { 2, 4, 8, 12, -1, -1, -1, -1 }, @@ -2885,7 +2890,7 @@ config: if (ret) return ret; - if (ctrl->type == RK3568) { + if (ctrl->type == RK3568 && rockchip_get_cpu_version() == 0) { if (bank->bank_num == 1 && pin_num == 21) reg = 0x0840; else if (bank->bank_num == 2 && pin_num == 2)