From fa686722e4c22416bdabca67f426db1972df25fb Mon Sep 17 00:00:00 2001 From: XiaoDong Huang Date: Fri, 4 Apr 2025 17:52:11 +0800 Subject: [PATCH] arm64: dts: rockchip: rv1126b: enable cpu-idle Signed-off-by: XiaoDong Huang Change-Id: I85b384e12692909826ad1fbe8b3d010ed0210c0d --- arch/arm64/boot/dts/rockchip/rv1126b.dtsi | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rv1126b.dtsi b/arch/arm64/boot/dts/rockchip/rv1126b.dtsi index dcbc006c1dd9..ba63a68b10d6 100644 --- a/arch/arm64/boot/dts/rockchip/rv1126b.dtsi +++ b/arch/arm64/boot/dts/rockchip/rv1126b.dtsi @@ -247,6 +247,7 @@ enable-method = "psci"; clocks = <&cru ARMCLK>; operating-points-v2 = <&cpu_opp_table>; + cpu-idle-states = <&CPU_SLEEP>; }; cpu1: cpu@1 { device_type = "cpu"; @@ -255,6 +256,7 @@ enable-method = "psci"; clocks = <&cru ARMCLK>; operating-points-v2 = <&cpu_opp_table>; + cpu-idle-states = <&CPU_SLEEP>; }; cpu2: cpu@2 { device_type = "cpu"; @@ -263,6 +265,7 @@ enable-method = "psci"; clocks = <&cru ARMCLK>; operating-points-v2 = <&cpu_opp_table>; + cpu-idle-states = <&CPU_SLEEP>; }; cpu3: cpu@3 { device_type = "cpu"; @@ -271,6 +274,20 @@ enable-method = "psci"; clocks = <&cru ARMCLK>; operating-points-v2 = <&cpu_opp_table>; + cpu-idle-states = <&CPU_SLEEP>; + }; + + idle-states { + entry-method = "psci"; + + CPU_SLEEP: cpu-sleep { + compatible = "arm,idle-state"; + local-timer-stop; + arm,psci-suspend-param = <0x0010000>; + entry-latency-us = <120>; + exit-latency-us = <250>; + min-residency-us = <900>; + }; }; };