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tools/x86/kcpuid: Fix avx512bw and avx512lvl fields in Fn00000007
[ Upstream commit4e347bdf44] Leaf Fn00000007 contains avx512bw at bit 26 and avx512vl at bit 28. This is incorrect per the SDM. Correct avx512bw to be bit 30 and avx512lvl to be bit 31. Fixes:c6b2f240bf("tools/x86: Add a kcpuid tool to show raw CPU features") Signed-off-by: Terry Bowman <terry.bowman@amd.com> Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Reviewed-by: Feng Tang <feng.tang@intel.com> Link: https://lore.kernel.org/r/20230206141832.4162264-2-terry.bowman@amd.com Signed-off-by: Sasha Levin <sashal@kernel.org>
This commit is contained in:
committed by
Greg Kroah-Hartman
parent
00f79abccc
commit
fb2a6e0029
@@ -184,8 +184,8 @@
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7, 0, EBX, 27, avx512er, AVX512 Exponent Reciproca instr
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7, 0, EBX, 28, avx512cd, AVX512 Conflict Detection instr
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7, 0, EBX, 29, sha, Intel Secure Hash Algorithm Extensions instr
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7, 0, EBX, 26, avx512bw, AVX512 Byte & Word instr
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7, 0, EBX, 28, avx512vl, AVX512 Vector Length Extentions (VL)
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7, 0, EBX, 30, avx512bw, AVX512 Byte & Word instr
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7, 0, EBX, 31, avx512vl, AVX512 Vector Length Extentions (VL)
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7, 0, ECX, 0, prefetchwt1, X
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7, 0, ECX, 1, avx512vbmi, AVX512 Vector Byte Manipulation Instructions
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7, 0, ECX, 2, umip, User-mode Instruction Prevention
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