From fbe1b004fac09006cb7d80f3259185519b1ed75f Mon Sep 17 00:00:00 2001 From: Algea Cao Date: Fri, 22 Jul 2022 10:29:37 +0800 Subject: [PATCH] drm/bridge: synopsys: dw-hdmi-qp: Set color depth and phase to 0 when 24-bit format According to CTS requirements, CD field and PP field in GCP should be set to zero when 24-bit output. Signed-off-by: Algea Cao Change-Id: Icf79493d5531a9781f9b6b8c656b297eec98f7b0 --- drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c index c1b78f7eac00..1c4bdcfa011e 100644 --- a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c +++ b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c @@ -95,7 +95,7 @@ #define RK3588_YUV420 0x3 #define RK3588_COMPRESSED_DATA 0xb #define RK3588_COLOR_DEPTH_MASK (0xf << 4) -#define RK3588_8BPC (0x5 << 4) +#define RK3588_8BPC 0 #define RK3588_10BPC (0x6 << 4) #define RK3588_CECIN_MASK BIT(8) #define RK3588_SCLIN_MASK BIT(9)