From fc7e00567ae435f79037ee4cad0798e729054123 Mon Sep 17 00:00:00 2001
From: Zhihuan He <huan.he@rock-chips.com>
Date: Tue, 20 Aug 2024 16:52:56 +0800
Subject: [PATCH] ARM: dts: rockchip: rk3506: adapt dsmc device

Change-Id: I9da2c0a22c50c66aa8ecac3614ee93f4841cb074
Signed-off-by: Zhihuan He <huan.he@rock-chips.com>
---
 arch/arm/boot/dts/rk3506-pinctrl.dtsi | 15 +++++++++++++++
 arch/arm/boot/dts/rk3506.dtsi         | 24 +++++++++++++++++++-----
 2 files changed, 34 insertions(+), 5 deletions(-)

diff --git a/arch/arm/boot/dts/rk3506-pinctrl.dtsi b/arch/arm/boot/dts/rk3506-pinctrl.dtsi
index 8bdd54df8222..83056a198f83 100644
--- a/arch/arm/boot/dts/rk3506-pinctrl.dtsi
+++ b/arch/arm/boot/dts/rk3506-pinctrl.dtsi
@@ -1307,6 +1307,21 @@
  * This part is edited handly.
  */
 &pinctrl {
+	dsmc {
+		/omit-if-no-ref/
+		dsmc_csn_pull_pins: dsmc-csn-pull-pins {
+			rockchip,pins =
+				/* dsmc_csn0 */
+				<1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_up>,
+				/* dsmc_csn1 */
+				<1 RK_PB1 RK_FUNC_GPIO &pcfg_pull_up>,
+				/* dsmc_csn2 */
+				<1 RK_PD2 RK_FUNC_GPIO &pcfg_pull_up>,
+				/* dsmc_csn3 */
+				<1 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>;
+		};
+	};
+
 	vo_lcdc {
 		/omit-if-no-ref/
 		bt1120_pins: bt1120-pins {
diff --git a/arch/arm/boot/dts/rk3506.dtsi b/arch/arm/boot/dts/rk3506.dtsi
index 58921162442b..4fb8044197d0 100644
--- a/arch/arm/boot/dts/rk3506.dtsi
+++ b/arch/arm/boot/dts/rk3506.dtsi
@@ -1430,7 +1430,7 @@
 		reg = <0xff8b0000 0x10000>;
 		#address-cells = <1>;
 		#size-cells = <1>;
-		rockchip,grf = <&ioc_grf>;
+		rockchip,grf = <&grf>;
 		interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
 		resets = <&cru SRST_A_DSMC>, <&cru SRST_P_DSMC>;
 		reset-names = "dsmc", "apb";
@@ -1445,12 +1445,18 @@
 	//	dmas = <&dmac0 8  0xff288078 0x80008000 0xff2880ac 0x00030000>,
 	//	       <&dmac0 10 0xff288078 0x40004000 0xff2880ac 0x00300000>;
 		dma-names = "req0", "req1";
+		pinctrl-names = "default", "active" ,"lb-slave";
+		pinctrl-0 = <&dsmc_csn_pull_pins
+			     &dsmc_bus16_pins
+			     &dsmc_clk_pins>;
+		pinctrl-1 = <&dsmc_csn_pins>;
+		pinctrl-2 = <&dsmc_int_pins>;
 		status = "disabled";
 		slave {
-			rockchip,dqs-dll = <0x40 0x40
-					    0x40 0x40
-					    0x40 0x40
-					    0x40 0x40>;
+			rockchip,dqs-dll = <0x20 0x20
+					    0x20 0x20
+					    0x20 0x20
+					    0x20 0x20>;
 			rockchip,ranges = <0x0 0xc0000000 0x0 0x2000000>;
 			rockchip,slave-dev = <&dsmc_slave>;
 		};
@@ -1477,6 +1483,8 @@
 
 		lb-slave {
 			dsmc_lb_slave0: lb-slave0 {
+				rockchip,mtr-timing = <1 0 0 0 0 0 2 2>;
+				rockchip,int-en = <0x0>;
 				status = "disabled";
 				dsmc_p0_region: region {
 					dsmc_p0_region0: region0 {
@@ -1514,6 +1522,8 @@
 				};
 			};
 			dsmc_lb_slave1: lb-slave1 {
+				rockchip,mtr-timing = <1 0 0 0 0 0 2 2>;
+				rockchip,int-en = <0x1>;
 				status = "disabled";
 				dsmc_p1_region: region {
 					dsmc_p1_region0: region0 {
@@ -1551,6 +1561,8 @@
 				};
 			};
 			dsmc_lb_slave2: lb-slave2 {
+				rockchip,mtr-timing = <1 0 0 0 0 0 2 2>;
+				rockchip,int-en = <0x2>;
 				status = "disabled";
 				dsmc_p2_region: region {
 					dsmc_p2_region0: region0 {
@@ -1588,6 +1600,8 @@
 				};
 			};
 			dsmc_lb_slave3: lb-slave3 {
+				rockchip,mtr-timing = <1 0 0 0 0 0 2 2>;
+				rockchip,int-en = <0x3>;
 				status = "disabled";
 				dsmc_p3_region: region {
 					dsmc_p3_region0: region0 {