diff --git a/arch/arm64/boot/dts/amlogic/mesongxbb-gpu-mali450.dtsi b/arch/arm64/boot/dts/amlogic/mesongxbb-gpu-mali450.dtsi
index 50a5a119a005..0d744c321c96 100644
--- a/arch/arm64/boot/dts/amlogic/mesongxbb-gpu-mali450.dtsi
+++ b/arch/arm64/boot/dts/amlogic/mesongxbb-gpu-mali450.dtsi
@@ -62,9 +62,9 @@
 		  };
 
 		  clk285_cfg:clk285_cfg {
-			clk_freq = <285000000>;
+			clk_freq = <285714285>;
 			clk_parent = "fclk_div7";
-			clkp_freq = <285000000>;
+			clkp_freq = <285714285>;
 			voltage = <1150>;
 			keep_count = <5>;
 			threshold = <100 250>;
@@ -92,9 +92,9 @@
 		  };
 
 		  clk666_cfg:clk666_cfg {
-			clk_freq = <666000000>;
+			clk_freq = <666666666>;
 			clk_parent = "fclk_div3";
-			clkp_freq = <666000000>;
+			clkp_freq = <666666666>;
 			voltage = <1150>;
 			keep_count = <1>;
 			threshold = <177 250>;
diff --git a/arch/arm64/boot/dts/amlogic/mesongxm-gpu-t82x.dtsi b/arch/arm64/boot/dts/amlogic/mesongxm-gpu-t82x.dtsi
index e36e88c74825..a67f1d5da27c 100644
--- a/arch/arm64/boot/dts/amlogic/mesongxm-gpu-t82x.dtsi
+++ b/arch/arm64/boot/dts/amlogic/mesongxm-gpu-t82x.dtsi
@@ -62,9 +62,9 @@
 		};
 
 		dvfs285_cfg:dvfs285_cfg {
-			clk_freq = <285714000>;
+			clk_freq = <285714285>;
 			clk_parent = "fclk_div7";
-			clkp_freq = <285714000>;
+			clkp_freq = <285714285>;
 			voltage = <1150>;
 			keep_count = <5>;
 			threshold = <100 190>;
@@ -89,9 +89,9 @@
 		};
 
 		dvfs666_cfg:dvfs666_cfg {
-			clk_freq = <666000000>;
+			clk_freq = <666666666>;
 			clk_parent = "fclk_div3";
-			clkp_freq = <666000000>;
+			clkp_freq = <666666666>;
 			voltage = <1150>;
 			keep_count = <5>;
 			threshold = <210 236>;
diff --git a/arch/arm64/boot/dts/amlogic/mesongxtvbb-gpu-t83x.dtsi b/arch/arm64/boot/dts/amlogic/mesongxtvbb-gpu-t83x.dtsi
index 5bef42a3a866..5b02ca965204 100644
--- a/arch/arm64/boot/dts/amlogic/mesongxtvbb-gpu-t83x.dtsi
+++ b/arch/arm64/boot/dts/amlogic/mesongxtvbb-gpu-t83x.dtsi
@@ -64,7 +64,7 @@
 		dvfs285_cfg:dvfs285_cfg {
 			clk_freq = <285714000>;
 			clk_parent = "fclk_div7";
-			clkp_freq = <285714000>;
+			clkp_freq = <285714285>;
 			voltage = <1150>;
 			keep_count = <5>;
 			threshold = <100 190>;
@@ -89,9 +89,9 @@
 		};
 
 		dvfs666_cfg:dvfs666_cfg {
-			clk_freq = <666000000>;
+			clk_freq = <666666666>;
 			clk_parent = "fclk_div3";
-			clkp_freq = <666000000>;
+			clkp_freq = <666666666>;
 			voltage = <1150>;
 			keep_count = <5>;
 			threshold = <210 236>;