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Merge 6.1.103 into android14-6.1-lts

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Changes in 6.1.103
	powerpc/configs: Update defconfig with now user-visible CONFIG_FSL_IFC
	spi: spi-microchip-core: Fix the number of chip selects supported
	spi: atmel-quadspi: Add missing check for clk_prepare
	EDAC, i10nm: make skx_common.o a separate module
	rcu/tasks: Fix stale task snaphot for Tasks Trace
	md: fix deadlock between mddev_suspend and flush bio
	platform/chrome: cros_ec_debugfs: fix wrong EC message version
	ubd: refactor the interrupt handler
	ubd: untagle discard vs write zeroes not support handling
	block: refactor to use helper
	block: cleanup bio_integrity_prep
	block: initialize integrity buffer to zero before writing it to media
	hfsplus: fix to avoid false alarm of circular locking
	x86/of: Return consistent error type from x86_of_pci_irq_enable()
	x86/pci/intel_mid_pci: Fix PCIBIOS_* return code handling
	x86/pci/xen: Fix PCIBIOS_* return code handling
	x86/platform/iosf_mbi: Convert PCIBIOS_* return codes to errnos
	kernfs: fix all kernel-doc warnings and multiple typos
	kernfs: Convert kernfs_path_from_node_locked() from strlcpy() to strscpy()
	cgroup/cpuset: Prevent UAF in proc_cpuset_show()
	hwmon: (adt7475) Fix default duty on fan is disabled
	pwm: stm32: Always do lazy disabling
	nvmet-auth: fix nvmet_auth hash error handling
	drm/meson: fix canvas release in bind function
	pwm: atmel-tcb: Put per-channel data into driver data
	pwm: atmel-tcb: Unroll atmel_tcb_pwm_set_polarity() into only caller
	pwm: atmel-tcb: Don't track polarity in driver data
	pwm: atmel-tcb: Fix race condition and convert to guards
	hwmon: (max6697) Fix underflow when writing limit attributes
	hwmon: (max6697) Fix swapped temp{1,8} critical alarms
	arm64: dts: qcom: sdm845: add power-domain to UFS PHY
	arm64: dts: qcom: sm6350: add power-domain to UFS PHY
	arm64: dts: qcom: sm8250: switch UFS QMP PHY to new style of bindings
	arm64: dts: qcom: sm8250: add power-domain to UFS PHY
	arm64: dts: qcom: sm8450: add power-domain to UFS PHY
	arm64: dts: qcom: msm8996-xiaomi-common: drop excton from the USB PHY
	arm64: dts: qcom: msm8998: enable adreno_smmu by default
	soc: qcom: rpmh-rsc: Ensure irqs aren't disabled by rpmh_rsc_send_data() callers
	arm64: dts: rockchip: Add sdmmc related properties on rk3308-rock-pi-s
	arm64: dts: rockchip: Add pinctrl for UART0 to rk3308-rock-pi-s
	arm64: dts: rockchip: Add mdio and ethernet-phy nodes to rk3308-rock-pi-s
	arm64: dts: rockchip: Update WIFi/BT related nodes on rk3308-rock-pi-s
	arm64: dts: qcom: msm8996: specify UFS core_clk frequencies
	soc: xilinx: rename cpu_number1 to dummy_cpu_number
	cpufreq: ti-cpufreq: Handle deferred probe with dev_err_probe()
	OPP: ti: Fix ti_opp_supply_probe wrong return values
	memory: fsl_ifc: Make FSL_IFC config visible and selectable
	soc: qcom: pdr: protect locator_addr with the main mutex
	soc: qcom: pdr: fix parsing of domains lists
	arm64: dts: rockchip: Increase VOP clk rate on RK3328
	arm64: dts: amlogic: sm1: fix spdif compatibles
	ARM: dts: imx6qdl-kontron-samx6i: fix phy-mode
	ARM: dts: imx6qdl-kontron-samx6i: fix PHY reset
	ARM: dts: imx6qdl-kontron-samx6i: fix board reset
	ARM: dts: imx6qdl-kontron-samx6i: fix SPI0 chip selects
	ARM: dts: imx6qdl-kontron-samx6i: fix PCIe reset polarity
	arm64: dts: mediatek: mt8183-kukui: Drop bogus output-enable property
	arm64: dts: mediatek: mt7622: fix "emmc" pinctrl mux
	arm64: dts: mediatek: mt8183-kukui-jacuzzi: Add ports node for anx7625
	arm64: dts: amlogic: gx: correct hdmi clocks
	arm64: dts: rockchip: Drop invalid mic-in-differential on rk3568-rock-3a
	arm64: dts: rockchip: Fix mic-in-differential usage on rk3568-evb1-v10
	arm64: dts: renesas: r8a779g0: Add L3 cache controller
	arm64: dts: renesas: r8a779g0: Add secondary CA76 CPU cores
	arm64: dts: renesas: Drop specifying the GIC_CPU_MASK_SIMPLE() for GICv3 systems
	arm64: dts: renesas: r8a779a0: Add missing hypervisor virtual timer IRQ
	arm64: dts: renesas: r8a779f0: Add missing hypervisor virtual timer IRQ
	arm64: dts: renesas: r8a779g0: Add missing hypervisor virtual timer IRQ
	arm64: dts: renesas: r9a07g043u: Add missing hypervisor virtual timer IRQ
	arm64: dts: renesas: r9a07g044: Add missing hypervisor virtual timer IRQ
	arm64: dts: renesas: r9a07g054: Add missing hypervisor virtual timer IRQ
	m68k: atari: Fix TT bootup freeze / unexpected (SCU) interrupt messages
	x86/xen: Convert comma to semicolon
	arm64: dts: rockchip: Add missing power-domains for rk356x vop_mmu
	arm64: dts: qcom: sm6350: Add missing qcom,non-secure-domain property
	m68k: cmpxchg: Fix return value for default case in __arch_xchg()
	ARM: spitz: fix GPIO assignment for backlight
	vmlinux.lds.h: catch .bss..L* sections into BSS")
	firmware: turris-mox-rwtm: Do not complete if there are no waiters
	firmware: turris-mox-rwtm: Fix checking return value of wait_for_completion_timeout()
	firmware: turris-mox-rwtm: Initialize completion before mailbox
	wifi: brcmsmac: LCN PHY code is used for BCM4313 2G-only device
	bpftool: Un-const bpf_func_info to fix it for llvm 17 and newer
	selftests/bpf: Fix prog numbers in test_sockmap
	net: esp: cleanup esp_output_tail_tcp() in case of unsupported ESPINTCP
	tcp: annotate lockless accesses to sk->sk_err_soft
	tcp: annotate lockless access to sk->sk_err
	tcp: add tcp_done_with_error() helper
	tcp: fix race in tcp_write_err()
	tcp: fix races in tcp_v[46]_err()
	net/smc: set rmb's SG_MAX_SINGLE_ALLOC limitation only when CONFIG_ARCH_NO_SG_CHAIN is defined
	selftests/bpf: Check length of recv in test_sockmap
	lib: objagg: Fix general protection fault
	mlxsw: spectrum_acl_erp: Fix object nesting warning
	mlxsw: spectrum_acl: Fix ACL scale regression and firmware errors
	perf/x86: Serialize set_attr_rdpmc()
	jump_label: Use atomic_try_cmpxchg() in static_key_slow_inc_cpuslocked()
	jump_label: Prevent key->enabled int overflow
	jump_label: Fix concurrency issues in static_key_slow_dec()
	wifi: ath11k: fix wrong handling of CCMP256 and GCMP ciphers
	wifi: cfg80211: fix typo in cfg80211_calculate_bitrate_he()
	wifi: cfg80211: handle 2x996 RU allocation in cfg80211_calculate_bitrate_he()
	net: fec: Refactor: #define magic constants
	net: fec: Fix FEC_ECR_EN1588 being cleared on link-down
	libbpf: Checking the btf_type kind when fixing variable offsets
	ipvs: Avoid unnecessary calls to skb_is_gso_sctp
	netfilter: nf_tables: rise cap on SELinux secmark context
	bpftool: Mount bpffs when pinmaps path not under the bpffs
	perf/x86/intel/pt: Fix pt_topa_entry_for_page() address calculation
	perf: Fix perf_aux_size() for greater-than 32-bit size
	perf: Prevent passing zero nr_pages to rb_alloc_aux()
	perf: Fix default aux_watermark calculation
	perf/x86/intel/cstate: Fix Alderlake/Raptorlake/Meteorlake
	wifi: rtw89: Fix array index mistake in rtw89_sta_info_get_iter()
	wifi: virt_wifi: avoid reporting connection success with wrong SSID
	gss_krb5: Fix the error handling path for crypto_sync_skcipher_setkey
	wifi: virt_wifi: don't use strlen() in const context
	locking/rwsem: Add __always_inline annotation to __down_write_common() and inlined callers
	selftests/bpf: Close fd in error path in drop_on_reuseport
	selftests/bpf: Close obj in error path in xdp_adjust_tail
	bpf: annotate BTF show functions with __printf
	bna: adjust 'name' buf size of bna_tcb and bna_ccb structures
	bpf: Eliminate remaining "make W=1" warnings in kernel/bpf/btf.o
	bpf: Fix null pointer dereference in resolve_prog_type() for BPF_PROG_TYPE_EXT
	selftests: forwarding: devlink_lib: Wait for udev events after reloading
	xdp: fix invalid wait context of page_pool_destroy()
	net: bridge: mst: Check vlan state for egress decision
	drm/rockchip: vop2: Fix the port mux of VP2
	drm/mipi-dsi: Fix mipi_dsi_dcs_write_seq() macro definition format
	drm/mipi-dsi: Fix theoretical int overflow in mipi_dsi_dcs_write_seq()
	drm/amd/pm: Fix aldebaran pcie speed reporting
	drm/amdgpu: Check if NBIO funcs are NULL in amdgpu_device_baco_exit
	drm/amdgpu: Remove GC HW IP 9.3.0 from noretry=1
	drm/panel: boe-tv101wum-nl6: If prepare fails, disable GPIO before regulators
	drm/panel: boe-tv101wum-nl6: Check for errors on the NOP in prepare()
	media: pci: ivtv: Add check for DMA map result
	media: dvb-usb: Fix unexpected infinite loop in dvb_usb_read_remote_control()
	media: imon: Fix race getting ictx->lock
	media: i2c: Fix imx412 exposure control
	media: v4l: async: Fix NULL pointer dereference in adding ancillary links
	s390/mm: Convert make_page_secure to use a folio
	s390/mm: Convert gmap_make_secure to use a folio
	s390/uv: Don't call folio_wait_writeback() without a folio reference
	saa7134: Unchecked i2c_transfer function result fixed
	media: uvcvideo: Override default flags
	media: rcar-vin: Fix YUYV8_1X16 handling for CSI-2
	media: rcar-csi2: Disable runtime_pm in probe error
	media: rcar-csi2: Cleanup subdevice in remove()
	media: renesas: vsp1: Fix _irqsave and _irq mix
	media: renesas: vsp1: Store RPF partition configuration per RPF instance
	drm/mediatek: Add missing plane settings when async update
	drm/mediatek: Add OVL compatible name for MT8195
	leds: trigger: Unregister sysfs attributes before calling deactivate()
	drm/msm/dsi: set VIDEO_COMPRESSION_MODE_CTRL_WC
	drm/msm/dpu: drop validity checks for clear_pending_flush() ctl op
	perf test: Replace arm callgraph fp test workload with leafloop
	perf tests arm_callgraph_fp: Address shellcheck warnings about signal names and adding double quotes for expression
	perf tests: Fix test_arm_callgraph_fp variable expansion
	perf test: Make test_arm_callgraph_fp.sh more robust
	perf report: Fix condition in sort__sym_cmp()
	drm/etnaviv: fix DMA direction handling for cached RW buffers
	drm/qxl: Add check for drm_cvt_mode
	Revert "leds: led-core: Fix refcount leak in of_led_get()"
	ext4: fix infinite loop when replaying fast_commit
	media: venus: flush all buffers in output plane streamoff
	perf intel-pt: Fix aux_watermark calculation for 64-bit size
	perf intel-pt: Fix exclude_guest setting
	mfd: rsmu: Split core code into separate module
	mfd: omap-usb-tll: Use struct_size to allocate tll
	xprtrdma: Fix rpcrdma_reqs_reset()
	SUNRPC: avoid soft lockup when transmitting UDP to reachable server.
	NFSv4.1 another fix for EXCHGID4_FLAG_USE_PNFS_DS for DS server
	ext4: don't track ranges in fast_commit if inode has inlined data
	ext4: avoid writing unitialized memory to disk in EA inodes
	sparc64: Fix incorrect function signature and add prototype for prom_cif_init
	SUNRPC: Fixup gss_status tracepoint error output
	PCI: Fix resource double counting on remove & rescan
	PCI: keystone: Relocate ks_pcie_set/clear_dbi_mode()
	PCI: keystone: Don't enable BAR 0 for AM654x
	PCI: keystone: Fix NULL pointer dereference in case of DT error in ks_pcie_setup_rc_app_regs()
	PCI: rcar: Demote WARN() to dev_warn_ratelimited() in rcar_pcie_wakeup()
	clk: qcom: branch: Add helper functions for setting retain bits
	clk: qcom: gcc-sc7280: Update force mem core bit for UFS ICE clock
	clk: qcom: camcc-sc7280: Add parent dependency to all camera GDSCs
	iio: frequency: adrf6780: rm clk provider include
	coresight: Fix ref leak when of_coresight_parse_endpoint() fails
	RDMA/mlx5: Set mkeys for dmabuf at PAGE_SIZE
	powerpc/pseries: Fix alignment of PLPKS structures and buffers
	powerpc/pseries: Move plpks.h to include directory
	powerpc/pseries: Expose PLPKS config values, support additional fields
	powerpc/pseries: Add helper to get PLPKS password length
	powerpc/kexec: make the update_cpus_node() function public
	powerpc/kexec_file: fix cpus node update to FDT
	RDMA/cache: Release GID table even if leak is detected
	clk: qcom: gpucc-sm8350: Park RCG's clk source at XO during disable
	interconnect: qcom: qcm2290: Fix mas_snoc_bimc RPM master ID
	Input: qt1050 - handle CHIP_ID reading error
	RDMA/mlx4: Fix truncated output warning in mad.c
	RDMA/mlx4: Fix truncated output warning in alias_GUID.c
	RDMA/mlx5: Use sq timestamp as QP timestamp when RoCE is disabled
	RDMA/rxe: Don't set BTH_ACK_MASK for UC or UD QPs
	ASoC: qcom: Adjust issues in case of DT error in asoc_qcom_lpass_cpu_platform_probe()
	powerpc/prom: Add CPU info to hardware description string later
	ASoC: max98088: Check for clk_prepare_enable() error
	mtd: make mtd_test.c a separate module
	RDMA/device: Return error earlier if port in not valid
	Input: elan_i2c - do not leave interrupt disabled on suspend failure
	ASoC: amd: Adjust error handling in case of absent codec device
	PCI: endpoint: Clean up error handling in vpci_scan_bus()
	PCI: endpoint: Fix error handling in epf_ntb_epc_cleanup()
	vhost/vsock: always initialize seqpacket_allow
	net: missing check virtio
	crypto: qat - extend scope of lock in adf_cfg_add_key_value_param()
	clk: qcom: Park shared RCGs upon registration
	clk: en7523: fix rate divider for slic and spi clocks
	MIPS: Octeron: remove source file executable bit
	PCI: qcom-ep: Disable resources unconditionally during PERST# assert
	PCI: dwc: Fix index 0 incorrectly being interpreted as a free ATU slot
	powerpc/xmon: Fix disassembly CPU feature checks
	macintosh/therm_windtunnel: fix module unload.
	RDMA/hns: Check atomic wr length
	RDMA/hns: Fix unmatch exception handling when init eq table fails
	RDMA/hns: Fix missing pagesize and alignment check in FRMR
	RDMA/hns: Fix shift-out-bounds when max_inline_data is 0
	RDMA/hns: Fix undifined behavior caused by invalid max_sge
	RDMA/hns: Fix insufficient extend DB for VFs.
	iommu/vt-d: Fix to convert mm pfn to dma pfn
	iommu/vt-d: Fix identity map bounds in si_domain_init()
	bnxt_re: Fix imm_data endianness
	netfilter: ctnetlink: use helper function to calculate expect ID
	netfilter: nft_set_pipapo: constify lookup fn args where possible
	netfilter: nf_set_pipapo: fix initial map fill
	net: flow_dissector: use DEBUG_NET_WARN_ON_ONCE
	ipv4: Fix incorrect TOS in route get reply
	ipv4: Fix incorrect TOS in fibmatch route get reply
	net: dsa: mv88e6xxx: Limit chip-wide frame size config to CPU ports
	net: dsa: b53: Limit chip-wide jumbo frame config to CPU ports
	fs/ntfs3: Use ALIGN kernel macro
	fs/ntfs3: Merge synonym COMPRESSION_UNIT and NTFS_LZNT_CUNIT
	fs/ntfs3: Fix transform resident to nonresident for compressed files
	fs/ntfs3: Missed NI_FLAG_UPDATE_PARENT setting
	fs/ntfs3: Fix getting file type
	fs/ntfs3: Add missing .dirty_folio in address_space_operations
	pinctrl: rockchip: update rk3308 iomux routes
	pinctrl: core: fix possible memory leak when pinctrl_enable() fails
	pinctrl: single: fix possible memory leak when pinctrl_enable() fails
	pinctrl: ti: ti-iodelay: Drop if block with always false condition
	pinctrl: ti: ti-iodelay: fix possible memory leak when pinctrl_enable() fails
	pinctrl: freescale: mxs: Fix refcount of child
	fs/ntfs3: Replace inode_trylock with inode_lock
	fs/ntfs3: Fix field-spanning write in INDEX_HDR
	pinctrl: renesas: r8a779g0: Fix CANFD5 suffix
	pinctrl: renesas: r8a779g0: Fix FXR_TXEN[AB] suffixes
	pinctrl: renesas: r8a779g0: Fix (H)SCIF1 suffixes
	pinctrl: renesas: r8a779g0: Fix (H)SCIF3 suffixes
	pinctrl: renesas: r8a779g0: Fix IRQ suffixes
	pinctrl: renesas: r8a779g0: FIX PWM suffixes
	pinctrl: renesas: r8a779g0: Fix TCLK suffixes
	pinctrl: renesas: r8a779g0: Fix TPU suffixes
	fs/proc/task_mmu: indicate PM_FILE for PMD-mapped file THP
	nilfs2: avoid undefined behavior in nilfs_cnt32_ge macro
	rtc: interface: Add RTC offset to alarm after fix-up
	fs/ntfs3: Missed error return
	fs/ntfs3: Keep runs for $MFT::$ATTR_DATA and $MFT::$ATTR_BITMAP
	s390/dasd: fix error checks in dasd_copy_pair_store()
	sbitmap: remove unnecessary calculation of alloc_hint in __sbitmap_get_shallow
	sbitmap: rewrite sbitmap_find_bit_in_index to reduce repeat code
	sbitmap: use READ_ONCE to access map->word
	sbitmap: fix io hung due to race on sbitmap_word::cleared
	landlock: Don't lose track of restrictions on cred_transfer
	mm/hugetlb: fix possible recursive locking detected warning
	mm/mglru: fix div-by-zero in vmpressure_calc_level()
	mm: mmap_lock: replace get_memcg_path_buf() with on-stack buffer
	x86/efistub: Avoid returning EFI_SUCCESS on error
	x86/efistub: Revert to heap allocated boot_params for PE entrypoint
	dt-bindings: thermal: correct thermal zone node name limit
	tick/broadcast: Make takeover of broadcast hrtimer reliable
	net: netconsole: Disable target before netpoll cleanup
	af_packet: Handle outgoing VLAN packets without hardware offloading
	kernel: rerun task_work while freezing in get_signal()
	ipv4: fix source address selection with route leak
	ipv6: take care of scope when choosing the src addr
	sched/fair: set_load_weight() must also call reweight_task() for SCHED_IDLE tasks
	fuse: verify {g,u}id mount options correctly
	char: tpm: Fix possible memory leak in tpm_bios_measurements_open()
	media: venus: fix use after free in vdec_close
	ata: libata-scsi: Honor the D_SENSE bit for CK_COND=1 and no error
	hfs: fix to initialize fields of hfs_inode_info after hfs_alloc_inode()
	ext2: Verify bitmap and itable block numbers before using them
	drm/gma500: fix null pointer dereference in cdv_intel_lvds_get_modes
	drm/gma500: fix null pointer dereference in psb_intel_lvds_get_modes
	scsi: qla2xxx: Fix optrom version displayed in FDMI
	drm/amd/display: Check for NULL pointer
	sched/fair: Use all little CPUs for CPU-bound workloads
	apparmor: use kvfree_sensitive to free data->data
	cifs: fix potential null pointer use in destroy_workqueue in init_cifs error path
	cifs: fix reconnect with SMB1 UNIX Extensions
	cifs: mount with "unix" mount option for SMB1 incorrectly handled
	task_work: s/task_work_cancel()/task_work_cancel_func()/
	task_work: Introduce task_work_cancel() again
	udf: Avoid using corrupted block bitmap buffer
	m68k: amiga: Turn off Warp1260 interrupts during boot
	ext4: check dot and dotdot of dx_root before making dir indexed
	ext4: make sure the first directory block is not a hole
	io_uring: tighten task exit cancellations
	trace/pid_list: Change gfp flags in pid_list_fill_irq()
	selftests/landlock: Add cred_transfer test
	wifi: mwifiex: Fix interface type change
	drivers: soc: xilinx: check return status of get_api_version()
	leds: ss4200: Convert PCIBIOS_* return codes to errnos
	leds: mt6360: Fix memory leak in mt6360_init_isnk_properties()
	jbd2: make jbd2_journal_get_max_txn_bufs() internal
	media: uvcvideo: Fix integer overflow calculating timestamp
	KVM: VMX: Split out the non-virtualization part of vmx_interrupt_blocked()
	KVM: nVMX: Request immediate exit iff pending nested event needs injection
	ALSA: usb-audio: Fix microphone sound on HD webcam.
	ALSA: usb-audio: Move HD Webcam quirk to the right place
	ALSA: usb-audio: Add a quirk for Sonix HD USB Camera
	tools/memory-model: Fix bug in lock.cat
	hwrng: amd - Convert PCIBIOS_* return codes to errnos
	parisc: Fix warning at drivers/pci/msi/msi.h:121
	PCI: hv: Return zero, not garbage, when reading PCI_INTERRUPT_PIN
	PCI: dw-rockchip: Fix initial PERST# GPIO value
	PCI: rockchip: Use GPIOD_OUT_LOW flag while requesting ep_gpio
	PCI: loongson: Enable MSI in LS7A Root Complex
	binder: fix hang of unregistered readers
	dev/parport: fix the array out-of-bounds risk
	fs/ntfs3: Update log->page_{mask,bits} if log->page_size changed
	scsi: qla2xxx: Return ENOBUFS if sg_cnt is more than one for ELS cmds
	f2fs: fix to force buffered IO on inline_data inode
	f2fs: fix to don't dirty inode for readonly filesystem
	f2fs: fix return value of f2fs_convert_inline_inode()
	clk: davinci: da8xx-cfgchip: Initialize clk_init_data before use
	ubi: eba: properly rollback inside self_check_eba
	decompress_bunzip2: fix rare decompression failure
	kbuild: Fix '-S -c' in x86 stack protector scripts
	ASoC: amd: yc: Support mic on Lenovo Thinkpad E16 Gen 2
	kobject_uevent: Fix OOB access within zap_modalias_env()
	gve: Fix an edge case for TSO skb validity check
	ice: Add a per-VF limit on number of FDIR filters
	devres: Fix devm_krealloc() wasting memory
	devres: Fix memory leakage caused by driver API devm_free_percpu()
	irqchip/imx-irqsteer: Handle runtime power management correctly
	mm/numa_balancing: teach mpol_to_str about the balancing mode
	rtc: cmos: Fix return value of nvmem callbacks
	scsi: qla2xxx: During vport delete send async logout explicitly
	scsi: qla2xxx: Unable to act on RSCN for port online
	scsi: qla2xxx: Fix for possible memory corruption
	scsi: qla2xxx: Use QP lock to search for bsg
	scsi: qla2xxx: Fix flash read failure
	scsi: qla2xxx: Complete command early within lock
	scsi: qla2xxx: validate nvme_local_port correctly
	perf: Fix event leak upon exit
	perf: Fix event leak upon exec and file release
	perf/x86/intel/uncore: Fix the bits of the CHA extended umask for SPR
	perf/x86/intel/pt: Fix topa_entry base length
	perf/x86/intel/pt: Fix a topa_entry base address calculation
	drm/i915/gt: Do not consider preemption during execlists_dequeue for gen8
	drm/amdgpu/sdma5.2: Update wptr registers as well as doorbell
	drm/dp_mst: Fix all mstb marked as not probed after suspend/resume
	drm/i915/dp: Reset intel_dp->link_trained before retraining the link
	rtc: isl1208: Fix return value of nvmem callbacks
	watchdog/perf: properly initialize the turbo mode timestamp and rearm counter
	platform: mips: cpu_hwmon: Disable driver on unsupported hardware
	RDMA/iwcm: Fix a use-after-free related to destroying CM IDs
	selftests/sigaltstack: Fix ppc64 GCC build
	dm-verity: fix dm_is_verity_target() when dm-verity is builtin
	rbd: don't assume rbd_is_lock_owner() for exclusive mappings
	remoteproc: stm32_rproc: Fix mailbox interrupts queuing
	remoteproc: imx_rproc: Skip over memory region when node value is NULL
	remoteproc: imx_rproc: Fix refcount mistake in imx_rproc_addr_init
	MIPS: dts: loongson: Add ISA node
	MIPS: ip30: ip30-console: Add missing include
	MIPS: dts: loongson: Fix GMAC phy node
	MIPS: Loongson64: env: Hook up Loongsson-2K
	MIPS: Loongson64: Remove memory node for builtin-dtb
	MIPS: Loongson64: reset: Prioritise firmware service
	MIPS: Loongson64: Test register availability before use
	drm/etnaviv: don't block scheduler when GPU is still active
	drm/panfrost: Mark simple_ondemand governor as softdep
	rbd: rename RBD_LOCK_STATE_RELEASING and releasing_wait
	rbd: don't assume RBD_LOCK_STATE_LOCKED for exclusive mappings
	bpf: Synchronize dispatcher update with bpf_dispatcher_xdp_func
	Bluetooth: btusb: Add RTL8852BE device 0489:e125 to device tables
	Bluetooth: btusb: Add Realtek RTL8852BE support ID 0x13d3:0x3591
	nilfs2: handle inconsistent state in nilfs_btnode_create_block()
	PCI: Introduce cleanup helpers for device reference counts and locks
	PCI/DPC: Fix use-after-free on concurrent DPC and hot-removal
	io_uring/io-wq: limit retrying worker initialisation
	wifi: mac80211: Allow NSS change only up to capability
	wifi: mac80211: track capability/opmode NSS separately
	wifi: mac80211: check basic rates validity
	kdb: address -Wformat-security warnings
	kdb: Use the passed prompt in kdb_position_cursor()
	jfs: Fix array-index-out-of-bounds in diFree
	dmaengine: ti: k3-udma: Fix BCHAN count with UHC and HC channels
	phy: cadence-torrent: Check return value on register read
	um: time-travel: fix time-travel-start option
	um: time-travel: fix signal blocking race/hang
	f2fs: fix start segno of large section
	watchdog: rzg2l_wdt: Use pm_runtime_resume_and_get()
	watchdog: rzg2l_wdt: Check return status of pm_runtime_put()
	f2fs: fix to update user block counts in block_operations()
	kbuild: avoid build error when single DTB is turned into composite DTB
	libbpf: Fix no-args func prototype BTF dumping syntax
	af_unix: Disable MSG_OOB handling for sockets in sockmap/sockhash
	dma: fix call order in dmam_free_coherent
	bpf, events: Use prog to emit ksymbol event for main program
	tools/resolve_btfids: Fix comparison of distinct pointer types warning in resolve_btfids
	MIPS: SMP-CPS: Fix address for GCR_ACCESS register for CM3 and later
	ipv4: Fix incorrect source address in Record Route option
	net: bonding: correctly annotate RCU in bond_should_notify_peers()
	netfilter: nft_set_pipapo_avx2: disable softinterrupts
	tipc: Return non-zero value from tipc_udp_addr2str() on error
	net: stmmac: Correct byte order of perfect_match
	net: nexthop: Initialize all fields in dumped nexthops
	bpf: Fix a segment issue when downgrading gso_size
	mISDN: Fix a use after free in hfcmulti_tx()
	apparmor: Fix null pointer deref when receiving skb during sock creation
	powerpc: fix a file leak in kvm_vcpu_ioctl_enable_cap()
	lirc: rc_dev_get_from_fd(): fix file leak
	auxdisplay: ht16k33: Drop reference after LED registration
	ASoC: SOF: imx8m: Fix DSP control regmap retrieval
	spi: microchip-core: fix the issues in the isr
	spi: microchip-core: only disable SPI controller when register value change requires it
	spi: microchip-core: switch to use modern name
	spi: microchip-core: fix init function not setting the master and motorola modes
	nvme-pci: Fix the instructions for disabling power management
	spidev: Add Silicon Labs EM3581 device compatible
	spi: spidev: order compatibles alphabetically
	spi: spidev: add correct compatible for Rohm BH2228FV
	ASoC: Intel: use soc_intel_is_byt_cr() only when IOSF_MBI is reachable
	ceph: fix incorrect kmalloc size of pagevec mempool
	s390/pci: Refactor arch_setup_msi_irqs()
	s390/pci: Allow allocation of more than 1 MSI interrupt
	iommu: sprd: Avoid NULL deref in sprd_iommu_hw_en
	io_uring: fix io_match_task must_hold
	nvme-pci: add missing condition check for existence of mapped data
	fs: don't allow non-init s_user_ns for filesystems without FS_USERNS_MOUNT
	powerpc/pseries: Avoid hcall in plpks_is_available() on non-pseries
	Linux 6.1.103

Change-Id: Ic2520396d4b27c298d5bf5a42a5b099228f9bbee
Signed-off-by: Greg Kroah-Hartman <gregkh@google.com>
This commit is contained in:
Greg Kroah-Hartman
2024-09-10 11:15:34 +00:00
parent 4267216b80 48d525b0e4
commit fd3054898d
432 changed files with 4149 additions and 2474 deletions
Download Patch File Download Diff File Expand all files Collapse all files

5
Documentation/devicetree/bindings/thermal/thermal-zones.yaml
View File

@@ -49,7 +49,10 @@ properties:
to take when the temperature crosses those thresholds.
patternProperties:
"^[a-zA-Z][a-zA-Z0-9\\-]{1,12}-thermal$":
# Node name is limited in size due to Linux kernel requirements - 19
# characters in total (see THERMAL_NAME_LENGTH, including terminating NUL
# byte):
"^[a-zA-Z][a-zA-Z0-9\\-]{1,10}-thermal$":
type: object
description:
Each thermal zone node contains information about how frequently it

2
Makefile
View File

@@ -1,7 +1,7 @@
# SPDX-License-Identifier: GPL-2.0
VERSION = 6
PATCHLEVEL = 1
SUBLEVEL = 102
SUBLEVEL = 103
EXTRAVERSION =
NAME = Curry Ramen

23
arch/arm/boot/dts/imx6q-kontron-samx6i.dtsi
View File

@@ -5,31 +5,8 @@
#include "imx6q.dtsi"
#include "imx6qdl-kontron-samx6i.dtsi"
#include <dt-bindings/gpio/gpio.h>
/ {
model = "Kontron SMARC sAMX6i Quad/Dual";
compatible = "kontron,imx6q-samx6i", "fsl,imx6q";
};
/* Quad/Dual SoMs have 3 chip-select signals */
&ecspi4 {
cs-gpios = <&gpio3 24 GPIO_ACTIVE_LOW>,
<&gpio3 29 GPIO_ACTIVE_LOW>,
<&gpio3 25 GPIO_ACTIVE_LOW>;
};
&pinctrl_ecspi4 {
fsl,pins = <
MX6QDL_PAD_EIM_D21__ECSPI4_SCLK 0x100b1
MX6QDL_PAD_EIM_D28__ECSPI4_MOSI 0x100b1
MX6QDL_PAD_EIM_D22__ECSPI4_MISO 0x100b1
/* SPI4_IMX_CS2# - connected to internal flash */
MX6QDL_PAD_EIM_D24__GPIO3_IO24 0x1b0b0
/* SPI4_IMX_CS0# - connected to SMARC SPI0_CS0# */
MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x1b0b0
/* SPI4_CS3# - connected to SMARC SPI0_CS1# */
MX6QDL_PAD_EIM_D25__GPIO3_IO25 0x1b0b0
>;
};

14
arch/arm/boot/dts/imx6qdl-kontron-samx6i.dtsi
View File

@@ -244,7 +244,8 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ecspi4>;
cs-gpios = <&gpio3 24 GPIO_ACTIVE_LOW>,
<&gpio3 29 GPIO_ACTIVE_LOW>;
<&gpio3 29 GPIO_ACTIVE_LOW>,
<&gpio3 25 GPIO_ACTIVE_LOW>;
status = "okay";
/* default boot source: workaround #1 for errata ERR006282 */
@@ -259,7 +260,7 @@
&fec {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_enet>;
phy-mode = "rgmii";
phy-connection-type = "rgmii-id";
phy-handle = <&ethphy>;
mdio {
@@ -269,7 +270,7 @@
ethphy: ethernet-phy@1 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <1>;
reset-gpios = <&gpio1 25 GPIO_ACTIVE_LOW>;
reset-gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
reset-assert-us = <1000>;
};
};
@@ -464,6 +465,8 @@
MX6QDL_PAD_EIM_D24__GPIO3_IO24 0x1b0b0
/* SPI_IMX_CS0# - connected to SMARC SPI0_CS0# */
MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x1b0b0
/* SPI4_CS3# - connected to SMARC SPI0_CS1# */
MX6QDL_PAD_EIM_D25__GPIO3_IO25 0x1b0b0
>;
};
@@ -516,7 +519,7 @@
MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x1b0b0 /* RST_GBE0_PHY# */
MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x1b0b0 /* RST_GBE0_PHY# */
>;
};
@@ -729,7 +732,7 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pcie>;
wake-up-gpio = <&gpio6 18 GPIO_ACTIVE_HIGH>;
reset-gpio = <&gpio3 13 GPIO_ACTIVE_HIGH>;
reset-gpio = <&gpio3 13 GPIO_ACTIVE_LOW>;
};
/* LCD_BKLT_PWM */
@@ -817,5 +820,6 @@
/* CPLD is feeded by watchdog (hardwired) */
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_wdog1>;
fsl,ext-reset-output;
status = "okay";
};

30
arch/arm/mach-pxa/spitz.c
View File

@@ -512,10 +512,8 @@ static struct ads7846_platform_data spitz_ads7846_info = {
static struct gpiod_lookup_table spitz_lcdcon_gpio_table = {
.dev_id = "spi2.1",
.table = {
GPIO_LOOKUP("gpio-pxa", SPITZ_GPIO_BACKLIGHT_CONT,
"BL_CONT", GPIO_ACTIVE_LOW),
GPIO_LOOKUP("gpio-pxa", SPITZ_GPIO_BACKLIGHT_ON,
"BL_ON", GPIO_ACTIVE_HIGH),
GPIO_LOOKUP("sharp-scoop.1", 6, "BL_CONT", GPIO_ACTIVE_LOW),
GPIO_LOOKUP("sharp-scoop.1", 7, "BL_ON", GPIO_ACTIVE_HIGH),
{ },
},
};
@@ -523,10 +521,8 @@ static struct gpiod_lookup_table spitz_lcdcon_gpio_table = {
static struct gpiod_lookup_table akita_lcdcon_gpio_table = {
.dev_id = "spi2.1",
.table = {
GPIO_LOOKUP("gpio-pxa", AKITA_GPIO_BACKLIGHT_CONT,
"BL_CONT", GPIO_ACTIVE_LOW),
GPIO_LOOKUP("gpio-pxa", AKITA_GPIO_BACKLIGHT_ON,
"BL_ON", GPIO_ACTIVE_HIGH),
GPIO_LOOKUP("i2c-max7310", 3, "BL_ON", GPIO_ACTIVE_HIGH),
GPIO_LOOKUP("i2c-max7310", 4, "BL_CONT", GPIO_ACTIVE_LOW),
{ },
},
};
@@ -953,12 +949,9 @@ static inline void spitz_i2c_init(void) {}
static struct gpiod_lookup_table spitz_audio_gpio_table = {
.dev_id = "spitz-audio",
.table = {
GPIO_LOOKUP("sharp-scoop.0", SPITZ_GPIO_MUTE_L - SPITZ_SCP_GPIO_BASE,
"mute-l", GPIO_ACTIVE_HIGH),
GPIO_LOOKUP("sharp-scoop.0", SPITZ_GPIO_MUTE_R - SPITZ_SCP_GPIO_BASE,
"mute-r", GPIO_ACTIVE_HIGH),
GPIO_LOOKUP("sharp-scoop.1", SPITZ_GPIO_MIC_BIAS - SPITZ_SCP2_GPIO_BASE,
"mic", GPIO_ACTIVE_HIGH),
GPIO_LOOKUP("sharp-scoop.0", 3, "mute-l", GPIO_ACTIVE_HIGH),
GPIO_LOOKUP("sharp-scoop.0", 4, "mute-r", GPIO_ACTIVE_HIGH),
GPIO_LOOKUP("sharp-scoop.1", 8, "mic", GPIO_ACTIVE_HIGH),
{ },
},
};
@@ -966,12 +959,9 @@ static struct gpiod_lookup_table spitz_audio_gpio_table = {
static struct gpiod_lookup_table akita_audio_gpio_table = {
.dev_id = "spitz-audio",
.table = {
GPIO_LOOKUP("sharp-scoop.0", SPITZ_GPIO_MUTE_L - SPITZ_SCP_GPIO_BASE,
"mute-l", GPIO_ACTIVE_HIGH),
GPIO_LOOKUP("sharp-scoop.0", SPITZ_GPIO_MUTE_R - SPITZ_SCP_GPIO_BASE,
"mute-r", GPIO_ACTIVE_HIGH),
GPIO_LOOKUP("i2c-max7310", AKITA_GPIO_MIC_BIAS - AKITA_IOEXP_GPIO_BASE,
"mic", GPIO_ACTIVE_HIGH),
GPIO_LOOKUP("sharp-scoop.0", 3, "mute-l", GPIO_ACTIVE_HIGH),
GPIO_LOOKUP("sharp-scoop.0", 4, "mute-r", GPIO_ACTIVE_HIGH),
GPIO_LOOKUP("i2c-max7310", 2, "mic", GPIO_ACTIVE_HIGH),
{ },
},
};

4
arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi
View File

@@ -311,8 +311,8 @@
<&reset RESET_HDMI_SYSTEM_RESET>,
<&reset RESET_HDMI_TX>;
reset-names = "hdmitx_apb", "hdmitx", "hdmitx_phy";
clocks = <&clkc CLKID_HDMI_PCLK>,
<&clkc CLKID_CLK81>,
clocks = <&clkc CLKID_HDMI>,
<&clkc CLKID_HDMI_PCLK>,
<&clkc CLKID_GCLK_VENCI_INT0>;
clock-names = "isfr", "iahb", "venci";
};

4
arch/arm64/boot/dts/amlogic/meson-gxl.dtsi
View File

@@ -323,8 +323,8 @@
<&reset RESET_HDMI_SYSTEM_RESET>,
<&reset RESET_HDMI_TX>;
reset-names = "hdmitx_apb", "hdmitx", "hdmitx_phy";
clocks = <&clkc CLKID_HDMI_PCLK>,
<&clkc CLKID_CLK81>,
clocks = <&clkc CLKID_HDMI>,
<&clkc CLKID_HDMI_PCLK>,
<&clkc CLKID_GCLK_VENCI_INT0>;
clock-names = "isfr", "iahb", "venci";
};

4
arch/arm64/boot/dts/amlogic/meson-sm1.dtsi
View File

@@ -337,7 +337,7 @@
};
spdifin: audio-controller@400 {
compatible = "amlogic,g12a-spdifin",
compatible = "amlogic,sm1-spdifin",
"amlogic,axg-spdifin";
reg = <0x0 0x400 0x0 0x30>;
#sound-dai-cells = <0>;
@@ -351,7 +351,7 @@
};
spdifout_a: audio-controller@480 {
compatible = "amlogic,g12a-spdifout",
compatible = "amlogic,sm1-spdifout",
"amlogic,axg-spdifout";
reg = <0x0 0x480 0x0 0x50>;
#sound-dai-cells = <0>;

4
arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64.dts
View File

@@ -286,8 +286,8 @@
/* eMMC is shared pin with parallel NAND */
emmc_pins_default: emmc-pins-default {
mux {
function = "emmc", "emmc_rst";
groups = "emmc";
function = "emmc";
groups = "emmc", "emmc_rst";
};
/* "NDL0","NDL1","NDL2","NDL3","NDL4","NDL5","NDL6","NDL7",

4
arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts
View File

@@ -244,8 +244,8 @@
/* eMMC is shared pin with parallel NAND */
emmc_pins_default: emmc-pins-default {
mux {
function = "emmc", "emmc_rst";
groups = "emmc";
function = "emmc";
groups = "emmc", "emmc_rst";
};
/* "NDL0","NDL1","NDL2","NDL3","NDL4","NDL5","NDL6","NDL7",

25
arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi.dtsi
View File

@@ -168,21 +168,24 @@
vdd18-supply = <&pp1800_mipibrdg>;
vdd33-supply = <&vddio_mipibrdg>;
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
ports {
#address-cells = <1>;
#size-cells = <0>;
anx7625_in: endpoint {
remote-endpoint = <&dsi_out>;
port@0 {
reg = <0>;
anx7625_in: endpoint {
remote-endpoint = <&dsi_out>;
};
};
};
port@1 {
reg = <1>;
port@1 {
reg = <1>;
anx7625_out: endpoint {
remote-endpoint = <&panel_in>;
anx7625_out: endpoint {
remote-endpoint = <&panel_in>;
};
};
};
};

2
arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi
View File

@@ -767,7 +767,6 @@
};
pins-rts {
pinmux = <PINMUX_GPIO47__FUNC_URTS1>;
output-enable;
};
pins-cts {
pinmux = <PINMUX_GPIO46__FUNC_UCTS1>;
@@ -786,7 +785,6 @@
};
pins-rts {
pinmux = <PINMUX_GPIO47__FUNC_URTS1>;
output-enable;
};
pins-cts {
pinmux = <PINMUX_GPIO46__FUNC_UCTS1>;

1
arch/arm64/boot/dts/qcom/msm8996-xiaomi-common.dtsi
View File

@@ -368,7 +368,6 @@
&hsusb_phy1 {
status = "okay";
extcon = <&typec>;
vdda-pll-supply = <&vreg_l12a_1p8>;
vdda-phy-dpdm-supply = <&vreg_l24a_3p075>;

2
arch/arm64/boot/dts/qcom/msm8996.dtsi
View File

@@ -2016,7 +2016,7 @@
<&gcc GCC_UFS_RX_SYMBOL_0_CLK>;
freq-table-hz =
<100000000 200000000>,
<0 0>,
<100000000 200000000>,
<0 0>,
<0 0>,
<0 0>,

1
arch/arm64/boot/dts/qcom/msm8998.dtsi
View File

@@ -1457,7 +1457,6 @@
* SoC VDDMX RPM Power Domain in the Adreno driver.
*/
power-domains = <&gpucc GPU_GX_GDSC>;
status = "disabled";
};
gpucc: clock-controller@5065000 {

2
arch/arm64/boot/dts/qcom/sdm845.dtsi
View File

@@ -2537,6 +2537,8 @@
clocks = <&gcc GCC_UFS_MEM_CLKREF_CLK>,
<&gcc GCC_UFS_PHY_PHY_AUX_CLK>;
power-domains = <&gcc UFS_PHY_GDSC>;
resets = <&ufs_mem_hc 0>;
reset-names = "ufsphy";
status = "disabled";

4
arch/arm64/boot/dts/qcom/sm6350.dtsi
View File

@@ -830,6 +830,8 @@
clocks = <&gcc GCC_UFS_MEM_CLKREF_CLK>,
<&gcc GCC_UFS_PHY_PHY_AUX_CLK>;
power-domains = <&gcc UFS_PHY_GDSC>;
resets = <&ufs_mem_hc 0>;
reset-names = "ufsphy";
@@ -893,6 +895,7 @@
compatible = "qcom,fastrpc";
qcom,glink-channels = "fastrpcglink-apps-dsp";
label = "adsp";
qcom,non-secure-domain;
#address-cells = <1>;
#size-cells = <0>;
@@ -1000,6 +1003,7 @@
compatible = "qcom,fastrpc";
qcom,glink-channels = "fastrpcglink-apps-dsp";
label = "cdsp";
qcom,non-secure-domain;
#address-cells = <1>;
#size-cells = <0>;

22
arch/arm64/boot/dts/qcom/sm8250.dtsi
View File

@@ -2125,7 +2125,7 @@
"jedec,ufs-2.0";
reg = <0 0x01d84000 0 0x3000>;
interrupts = <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>;
phys = <&ufs_mem_phy_lanes>;
phys = <&ufs_mem_phy>;
phy-names = "ufsphy";
lanes-per-direction = <2>;
#reset-cells = <1>;
@@ -2169,10 +2169,8 @@
ufs_mem_phy: phy@1d87000 {
compatible = "qcom,sm8250-qmp-ufs-phy";
reg = <0 0x01d87000 0 0x1c0>;
#address-cells = <2>;
#size-cells = <2>;
ranges;
reg = <0 0x01d87000 0 0x1000>;
clock-names = "ref",
"ref_aux";
clocks = <&rpmhcc RPMH_CXO_CLK>,
@@ -2180,16 +2178,12 @@
resets = <&ufs_mem_hc 0>;
reset-names = "ufsphy";
status = "disabled";
ufs_mem_phy_lanes: phy@1d87400 {
reg = <0 0x01d87400 0 0x16c>,
<0 0x01d87600 0 0x200>,
<0 0x01d87c00 0 0x200>,
<0 0x01d87800 0 0x16c>,
<0 0x01d87a00 0 0x200>;
#phy-cells = <0>;
};
power-domains = <&gcc UFS_PHY_GDSC>;
#phy-cells = <0>;
status = "disabled";
};
ipa_virt: interconnect@1e00000 {

2
arch/arm64/boot/dts/qcom/sm8450.dtsi
View File

@@ -3153,6 +3153,8 @@
<&gcc GCC_UFS_PHY_PHY_AUX_CLK>,
<&gcc GCC_UFS_0_CLKREF_EN>;
power-domains = <&gcc UFS_PHY_GDSC>;
resets = <&ufs_mem_hc 0>;
reset-names = "ufsphy";
status = "disabled";

14
arch/arm64/boot/dts/renesas/r8a779a0.dtsi
View File

@@ -2209,8 +2209,7 @@
interrupt-controller;
reg = <0x0 0xf1000000 0 0x20000>,
<0x0 0xf1060000 0 0x110000>;
interrupts = <GIC_PPI 9
(GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_HIGH)>;
interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
};
fcpvd0: fcp@fea10000 {
@@ -2857,9 +2856,12 @@
timer {
compatible = "arm,armv8-timer";
interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>,
<&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>,
<&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>,
<&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>;
interrupts-extended = <&gic GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>,
<&gic GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>,
<&gic GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>,
<&gic GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>,
<&gic GIC_PPI 12 IRQ_TYPE_LEVEL_LOW>;
interrupt-names = "sec-phys", "phys", "virt", "hyp-phys",
"hyp-virt";
};
};

14
arch/arm64/boot/dts/renesas/r8a779f0.dtsi
View File

@@ -935,8 +935,7 @@
interrupt-controller;
reg = <0x0 0xf1000000 0 0x20000>,
<0x0 0xf1060000 0 0x110000>;
interrupts = <GIC_PPI 9
(GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>;
interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
};
prr: chipid@fff00044 {
@@ -991,10 +990,13 @@
timer {
compatible = "arm,armv8-timer";
interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
<&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
<&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
<&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>;
interrupts-extended = <&gic GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>,
<&gic GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>,
<&gic GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>,
<&gic GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>,
<&gic GIC_PPI 12 IRQ_TYPE_LEVEL_LOW>;
interrupt-names = "sec-phys", "phys", "virt", "hyp-phys",
"hyp-virt";
};
ufs30_clk: ufs30-clk {

82
arch/arm64/boot/dts/renesas/r8a779g0.dtsi
View File

@@ -18,12 +18,80 @@
#address-cells = <1>;
#size-cells = <0>;
cpu-map {
cluster0 {
core0 {
cpu = <&a76_0>;
};
core1 {
cpu = <&a76_1>;
};
};
cluster1 {
core0 {
cpu = <&a76_2>;
};
core1 {
cpu = <&a76_3>;
};
};
};
a76_0: cpu@0 {
compatible = "arm,cortex-a76";
reg = <0>;
device_type = "cpu";
power-domains = <&sysc R8A779G0_PD_A1E0D0C0>;
next-level-cache = <&L3_CA76_0>;
enable-method = "psci";
};
a76_1: cpu@100 {
compatible = "arm,cortex-a76";
reg = <0x100>;
device_type = "cpu";
power-domains = <&sysc R8A779G0_PD_A1E0D0C1>;
next-level-cache = <&L3_CA76_0>;
enable-method = "psci";
};
a76_2: cpu@10000 {
compatible = "arm,cortex-a76";
reg = <0x10000>;
device_type = "cpu";
power-domains = <&sysc R8A779G0_PD_A1E0D1C0>;
next-level-cache = <&L3_CA76_1>;
enable-method = "psci";
};
a76_3: cpu@10100 {
compatible = "arm,cortex-a76";
reg = <0x10100>;
device_type = "cpu";
power-domains = <&sysc R8A779G0_PD_A1E0D1C1>;
next-level-cache = <&L3_CA76_1>;
enable-method = "psci";
};
L3_CA76_0: cache-controller-0 {
compatible = "cache";
power-domains = <&sysc R8A779G0_PD_A2E0D0>;
cache-unified;
cache-level = <3>;
};
L3_CA76_1: cache-controller-1 {
compatible = "cache";
power-domains = <&sysc R8A779G0_PD_A2E0D1>;
cache-unified;
cache-level = <3>;
};
};
psci {
compatible = "arm,psci-1.0", "arm,psci-0.2";
method = "smc";
};
extal_clk: extal {
@@ -482,8 +550,7 @@
interrupt-controller;
reg = <0x0 0xf1000000 0 0x20000>,
<0x0 0xf1060000 0 0x110000>;
interrupts = <GIC_PPI 9
(GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_HIGH)>;
interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
};
prr: chipid@fff00044 {
@@ -494,9 +561,12 @@
timer {
compatible = "arm,armv8-timer";
interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>,
<&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>,
<&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>,
<&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>;
interrupts-extended = <&gic GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>,
<&gic GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>,
<&gic GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>,
<&gic GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>,
<&gic GIC_PPI 12 IRQ_TYPE_LEVEL_LOW>;
interrupt-names = "sec-phys", "phys", "virt", "hyp-phys",
"hyp-virt";
};
};

11
arch/arm64/boot/dts/renesas/r9a07g043u.dtsi
View File

@@ -41,10 +41,13 @@
timer {
compatible = "arm,armv8-timer";
interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>,
<&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>,
<&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>,
<&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>;
interrupts-extended = <&gic GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>,
<&gic GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>,
<&gic GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>,
<&gic GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>,
<&gic GIC_PPI 12 IRQ_TYPE_LEVEL_LOW>;
interrupt-names = "sec-phys", "phys", "virt", "hyp-phys",
"hyp-virt";
};
};

11
arch/arm64/boot/dts/renesas/r9a07g044.dtsi
View File

@@ -1091,9 +1091,12 @@
timer {
compatible = "arm,armv8-timer";
interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
<&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
<&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
<&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
interrupts-extended = <&gic GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>,
<&gic GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>,
<&gic GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>,
<&gic GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>,
<&gic GIC_PPI 12 IRQ_TYPE_LEVEL_LOW>;
interrupt-names = "sec-phys", "phys", "virt", "hyp-phys",
"hyp-virt";
};
};

7
arch/arm64/boot/dts/renesas/r9a07g044c1.dtsi
View File

@@ -15,13 +15,6 @@
/delete-node/ cpu-map;
/delete-node/ cpu@100;
};
timer {
interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>,
<&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>,
<&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>,
<&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>;
};
};
&soc {

7
arch/arm64/boot/dts/renesas/r9a07g044l1.dtsi
View File

@@ -15,11 +15,4 @@
/delete-node/ cpu-map;
/delete-node/ cpu@100;
};
timer {
interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>,
<&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>,
<&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>,
<&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>;
};
};

11
arch/arm64/boot/dts/renesas/r9a07g054.dtsi
View File

@@ -1097,9 +1097,12 @@
timer {
compatible = "arm,armv8-timer";
interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
<&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
<&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
<&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
interrupts-extended = <&gic GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>,
<&gic GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>,
<&gic GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>,
<&gic GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>,
<&gic GIC_PPI 12 IRQ_TYPE_LEVEL_LOW>;
interrupt-names = "sec-phys", "phys", "virt", "hyp-phys",
"hyp-virt";
};
};

7
arch/arm64/boot/dts/renesas/r9a07g054l1.dtsi
View File

@@ -15,11 +15,4 @@
/delete-node/ cpu-map;
/delete-node/ cpu@100;
};
timer {
interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>,
<&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>,
<&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>,
<&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>;
};
};

71
arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts
View File

@@ -17,6 +17,7 @@
ethernet0 = &gmac;
mmc0 = &emmc;
mmc1 = &sdmmc;
mmc2 = &sdio;
};
chosen {
@@ -145,11 +146,25 @@
&gmac {
clock_in_out = "output";
phy-handle = <&rtl8201f>;
phy-supply = <&vcc_io>;
snps,reset-gpio = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>;
snps,reset-active-low;
snps,reset-delays-us = <0 50000 50000>;
status = "okay";
mdio {
compatible = "snps,dwmac-mdio";
#address-cells = <1>;
#size-cells = <0>;
rtl8201f: ethernet-phy@1 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <1>;
pinctrl-names = "default";
pinctrl-0 = <&mac_rst>;
reset-assert-us = <20000>;
reset-deassert-us = <50000>;
reset-gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>;
};
};
};
&i2c1 {
@@ -160,6 +175,26 @@
pinctrl-names = "default";
pinctrl-0 = <&rtc_32k>;
bluetooth {
bt_reg_on: bt-reg-on {
rockchip,pins = <4 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
};
bt_wake_host: bt-wake-host {
rockchip,pins = <4 RK_PB4 RK_FUNC_GPIO &pcfg_pull_down>;
};
host_wake_bt: host-wake-bt {
rockchip,pins = <4 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
gmac {
mac_rst: mac-rst {
rockchip,pins = <0 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
leds {
green_led: green-led {
rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
@@ -203,15 +238,31 @@
cap-sd-highspeed;
cap-sdio-irq;
keep-power-in-suspend;
max-frequency = <1000000>;
max-frequency = <100000000>;
mmc-pwrseq = <&sdio_pwrseq>;
no-mmc;
no-sd;
non-removable;
sd-uhs-sdr104;
sd-uhs-sdr50;
vmmc-supply = <&vcc_io>;
vqmmc-supply = <&vcc_1v8>;
status = "okay";
rtl8723ds: wifi@1 {
reg = <1>;
interrupt-parent = <&gpio0>;
interrupts = <RK_PA0 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "host-wake";
pinctrl-names = "default";
pinctrl-0 = <&wifi_host_wake>;
};
};
&sdmmc {
cap-mmc-highspeed;
cap-sd-highspeed;
disable-wp;
vmmc-supply = <&vcc_io>;
status = "okay";
};
@@ -230,16 +281,22 @@
};
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_xfer>;
status = "okay";
};
&uart4 {
uart-has-rtscts;
status = "okay";
bluetooth {
compatible = "realtek,rtl8723bs-bt";
device-wake-gpios = <&gpio4 RK_PB3 GPIO_ACTIVE_HIGH>;
compatible = "realtek,rtl8723ds-bt";
device-wake-gpios = <&gpio4 RK_PB2 GPIO_ACTIVE_HIGH>;
enable-gpios = <&gpio4 RK_PB3 GPIO_ACTIVE_HIGH>;
host-wake-gpios = <&gpio4 RK_PB4 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&bt_reg_on &bt_wake_host &host_wake_bt>;
};
};

4
arch/arm64/boot/dts/rockchip/rk3328.dtsi
View File

@@ -820,8 +820,8 @@
<0>, <24000000>,
<24000000>, <24000000>,
<15000000>, <15000000>,
<100000000>, <100000000>,
<100000000>, <100000000>,
<300000000>, <100000000>,
<400000000>, <100000000>,
<50000000>, <100000000>,
<100000000>, <100000000>,
<50000000>, <50000000>,

2
arch/arm64/boot/dts/rockchip/rk3568-evb1-v10.dts
View File

@@ -478,7 +478,7 @@
};
codec {
mic-in-differential;
rockchip,mic-in-differential;
};
};
};

4
arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts
View File

@@ -481,10 +481,6 @@
};
};
};
codec {
mic-in-differential;
};
};
};

1
arch/arm64/boot/dts/rockchip/rk356x.dtsi
View File

@@ -737,6 +737,7 @@
clocks = <&cru ACLK_VOP>, <&cru HCLK_VOP>;
clock-names = "aclk", "iface";
#iommu-cells = <0>;
power-domains = <&power RK3568_PD_VO>;
status = "disabled";
};

9
arch/m68k/amiga/config.c
View File

@@ -180,6 +180,15 @@ int __init amiga_parse_bootinfo(const struct bi_record *record)
dev->slotsize = be16_to_cpu(cd->cd_SlotSize);
dev->boardaddr = be32_to_cpu(cd->cd_BoardAddr);
dev->boardsize = be32_to_cpu(cd->cd_BoardSize);
/* CS-LAB Warp 1260 workaround */
if (be16_to_cpu(dev->rom.er_Manufacturer) == ZORRO_MANUF(ZORRO_PROD_CSLAB_WARP_1260) &&
dev->rom.er_Product == ZORRO_PROD(ZORRO_PROD_CSLAB_WARP_1260)) {
/* turn off all interrupts */
pr_info("Warp 1260 card detected: applying interrupt storm workaround\n");
*(uint32_t *)(dev->boardaddr + 0x1000) = 0xfff;
}
} else
pr_warn("amiga_parse_bootinfo: too many AutoConfig devices\n");
#endif /* CONFIG_ZORRO */

6
arch/m68k/atari/ataints.c
View File

@@ -302,11 +302,7 @@ void __init atari_init_IRQ(void)
if (ATARIHW_PRESENT(SCU)) {
/* init the SCU if present */
tt_scu.sys_mask = 0x10; /* enable VBL (for the cursor) and
* disable HSYNC interrupts (who
* needs them?) MFP and SCC are
* enabled in VME mask
*/
tt_scu.sys_mask = 0x0; /* disable all interrupts */
tt_scu.vme_mask = 0x60; /* enable MFP and SCC ints */
} else {
/* If no SCU and no Hades, the HSYNC interrupt needs to be

2
arch/m68k/include/asm/cmpxchg.h
View File

@@ -32,7 +32,7 @@ static inline unsigned long __xchg(unsigned long x, volatile void * ptr, int siz
x = tmp;
break;
default:
tmp = __invalid_xchg_size(x, ptr, size);
x = __invalid_xchg_size(x, ptr, size);
break;
}

21
arch/mips/boot/dts/loongson/loongson64-2k1000.dtsi
View File

@@ -23,14 +23,6 @@
};
};
memory@200000 {
compatible = "memory";
device_type = "memory";
reg = <0x00000000 0x00200000 0x00000000 0x0ee00000>, /* 238 MB at 2 MB */
<0x00000000 0x20000000 0x00000000 0x1f000000>, /* 496 MB at 512 MB */
<0x00000001 0x10000000 0x00000001 0xb0000000>; /* 6912 MB at 4352MB */
};
cpu_clk: cpu_clk {
#clock-cells = <0>;
compatible = "fixed-clock";
@@ -52,6 +44,13 @@
0 0x40000000 0 0x40000000 0 0x40000000
0xfe 0x00000000 0xfe 0x00000000 0 0x40000000>;
isa@18000000 {
compatible = "isa";
#size-cells = <1>;
#address-cells = <2>;
ranges = <1 0x0 0x0 0x18000000 0x4000>;
};
pm: reset-controller@1fe07000 {
compatible = "loongson,ls2k-pm";
reg = <0 0x1fe07000 0 0x422>;
@@ -130,7 +129,8 @@
<13 IRQ_TYPE_LEVEL_LOW>;
interrupt-names = "macirq", "eth_lpi";
interrupt-parent = <&liointc0>;
phy-mode = "rgmii";
phy-mode = "rgmii-id";
phy-handle = <&phy1>;
mdio {
#address-cells = <1>;
#size-cells = <0>;
@@ -153,7 +153,8 @@
<15 IRQ_TYPE_LEVEL_LOW>;
interrupt-names = "macirq", "eth_lpi";
interrupt-parent = <&liointc0>;
phy-mode = "rgmii";
phy-mode = "rgmii-id";
phy-handle = <&phy1>;
mdio {
#address-cells = <1>;
#size-cells = <0>;

2
arch/mips/include/asm/mach-loongson64/boot_param.h
View File

@@ -42,12 +42,14 @@ enum loongson_cpu_type {
Legacy_1B = 0x5,
Legacy_2G = 0x6,
Legacy_2H = 0x7,
Legacy_2K = 0x8,
Loongson_1A = 0x100,
Loongson_1B = 0x101,
Loongson_2E = 0x200,
Loongson_2F = 0x201,
Loongson_2G = 0x202,
Loongson_2H = 0x203,
Loongson_2K = 0x204,
Loongson_3A = 0x300,
Loongson_3B = 0x301
};

4
arch/mips/include/asm/mips-cm.h
View File

@@ -228,6 +228,10 @@ GCR_ACCESSOR_RO(32, 0x0d0, gic_status)
GCR_ACCESSOR_RO(32, 0x0f0, cpc_status)
#define CM_GCR_CPC_STATUS_EX BIT(0)
/* GCR_ACCESS - Controls core/IOCU access to GCRs */
GCR_ACCESSOR_RW(32, 0x120, access_cm3)
#define CM_GCR_ACCESS_ACCESSEN GENMASK(7, 0)
/* GCR_L2_CONFIG - Indicates L2 cache configuration when Config5.L2C=1 */
GCR_ACCESSOR_RW(32, 0x130, l2_config)
#define CM_GCR_L2_CONFIG_BYPASS BIT(20)

5
arch/mips/kernel/smp-cps.c
View File

@@ -230,7 +230,10 @@ static void boot_core(unsigned int core, unsigned int vpe_id)
write_gcr_co_reset_ext_base(CM_GCR_Cx_RESET_EXT_BASE_UEB);
/* Ensure the core can access the GCRs */
set_gcr_access(1 << core);
if (mips_cm_revision() < CM_REV_CM3)
set_gcr_access(1 << core);
else
set_gcr_access_cm3(1 << core);
if (mips_cpc_present()) {
/* Reset the core */

8
arch/mips/loongson64/env.c
View File

@@ -88,6 +88,12 @@ void __init prom_lefi_init_env(void)
cpu_clock_freq = ecpu->cpu_clock_freq;
loongson_sysconf.cputype = ecpu->cputype;
switch (ecpu->cputype) {
case Legacy_2K:
case Loongson_2K:
smp_group[0] = 0x900000001fe11000;
loongson_sysconf.cores_per_node = 2;
loongson_sysconf.cores_per_package = 2;
break;
case Legacy_3A:
case Loongson_3A:
loongson_sysconf.cores_per_node = 4;
@@ -221,6 +227,8 @@ void __init prom_lefi_init_env(void)
default:
break;
}
} else if ((read_c0_prid() & PRID_IMP_MASK) == PRID_IMP_LOONGSON_64R) {
loongson_fdt_blob = __dtb_loongson64_2core_2k1000_begin;
} else if ((read_c0_prid() & PRID_IMP_MASK) == PRID_IMP_LOONGSON_64G) {
if (loongson_sysconf.bridgetype == LS7A)
loongson_fdt_blob = __dtb_loongson64g_4core_ls7a_begin;

38
arch/mips/loongson64/reset.c
View File

@@ -11,6 +11,7 @@
#include <linux/init.h>
#include <linux/kexec.h>
#include <linux/pm.h>
#include <linux/reboot.h>
#include <linux/slab.h>
#include <asm/bootinfo.h>
@@ -21,36 +22,21 @@
#include <loongson.h>
#include <boot_param.h>
static void loongson_restart(char *command)
static int firmware_restart(struct sys_off_data *unusedd)
{
void (*fw_restart)(void) = (void *)loongson_sysconf.restart_addr;
fw_restart();
while (1) {
if (cpu_wait)
cpu_wait();
}
return NOTIFY_DONE;
}
static void loongson_poweroff(void)
static int firmware_poweroff(struct sys_off_data *unused)
{
void (*fw_poweroff)(void) = (void *)loongson_sysconf.poweroff_addr;
fw_poweroff();
while (1) {
if (cpu_wait)
cpu_wait();
}
}
static void loongson_halt(void)
{
pr_notice("\n\n** You can safely turn off the power now **\n\n");
while (1) {
if (cpu_wait)
cpu_wait();
}
return NOTIFY_DONE;
}
#ifdef CONFIG_KEXEC
@@ -154,9 +140,17 @@ static void loongson_crash_shutdown(struct pt_regs *regs)
static int __init mips_reboot_setup(void)
{
_machine_restart = loongson_restart;
_machine_halt = loongson_halt;
pm_power_off = loongson_poweroff;
if (loongson_sysconf.restart_addr) {
register_sys_off_handler(SYS_OFF_MODE_RESTART,
SYS_OFF_PRIO_FIRMWARE,
firmware_restart, NULL);
}
if (loongson_sysconf.poweroff_addr) {
register_sys_off_handler(SYS_OFF_MODE_POWER_OFF,
SYS_OFF_PRIO_FIRMWARE,
firmware_poweroff, NULL);
}
#ifdef CONFIG_KEXEC
kexec_argv = kmalloc(KEXEC_ARGV_SIZE, GFP_KERNEL);

23
arch/mips/loongson64/smp.c
View File

@@ -479,12 +479,25 @@ static void loongson3_smp_finish(void)
static void __init loongson3_smp_setup(void)
{
int i = 0, num = 0; /* i: physical id, num: logical id */
int max_cpus = 0;
init_cpu_possible(cpu_none_mask);
for (i = 0; i < ARRAY_SIZE(smp_group); i++) {
if (!smp_group[i])
break;
max_cpus += loongson_sysconf.cores_per_node;
}
if (max_cpus < loongson_sysconf.nr_cpus) {
pr_err("SMP Groups are less than the number of CPUs\n");
loongson_sysconf.nr_cpus = max_cpus ? max_cpus : 1;
}
/* For unified kernel, NR_CPUS is the maximum possible value,
* loongson_sysconf.nr_cpus is the really present value
*/
i = 0;
while (i < loongson_sysconf.nr_cpus) {
if (loongson_sysconf.reserved_cpus_mask & (1<<i)) {
/* Reserved physical CPU cores */
@@ -505,14 +518,14 @@ static void __init loongson3_smp_setup(void)
__cpu_logical_map[num] = -1;
num++;
}
csr_ipi_probe();
ipi_set0_regs_init();
ipi_clear0_regs_init();
ipi_status0_regs_init();
ipi_en0_regs_init();
ipi_mailbox_buf_init();
ipi_write_enable(0);
if (smp_group[0])
ipi_write_enable(0);
cpu_set_core(&cpu_data[0],
cpu_logical_map(0) % loongson_sysconf.cores_per_package);
@@ -829,6 +842,9 @@ static int loongson3_disable_clock(unsigned int cpu)
uint64_t core_id = cpu_core(&cpu_data[cpu]);
uint64_t package_id = cpu_data[cpu].package;
if (!loongson_chipcfg[package_id] || !loongson_freqctrl[package_id])
return 0;
if ((read_c0_prid() & PRID_REV_MASK) == PRID_REV_LOONGSON3A_R1) {
LOONGSON_CHIPCFG(package_id) &= ~(1 << (12 + core_id));
} else {
@@ -843,6 +859,9 @@ static int loongson3_enable_clock(unsigned int cpu)
uint64_t core_id = cpu_core(&cpu_data[cpu]);
uint64_t package_id = cpu_data[cpu].package;
if (!loongson_chipcfg[package_id] || !loongson_freqctrl[package_id])
return 0;
if ((read_c0_prid() & PRID_REV_MASK) == PRID_REV_LOONGSON3A_R1) {
LOONGSON_CHIPCFG(package_id) |= 1 << (12 + core_id);
} else {

0
arch/mips/pci/pcie-octeon.c Executable file → Normal file
View File

1
arch/mips/sgi-ip30/ip30-console.c
View File

@@ -1,6 +1,7 @@
// SPDX-License-Identifier: GPL-2.0
#include <linux/io.h>
#include <linux/processor.h>
#include <asm/sn/ioc3.h>

1
arch/parisc/Kconfig
View File

@@ -75,6 +75,7 @@ config PARISC
select HAVE_SOFTIRQ_ON_OWN_STACK if IRQSTACKS
select TRACE_IRQFLAGS_SUPPORT
select HAVE_FUNCTION_DESCRIPTORS if 64BIT
select PCI_MSI_ARCH_FALLBACKS if PCI_MSI
help
The PA-RISC microprocessor is designed by Hewlett-Packard and used

2
arch/powerpc/configs/85xx-hw.config
View File

@@ -24,6 +24,7 @@ CONFIG_FS_ENET=y
CONFIG_FSL_CORENET_CF=y
CONFIG_FSL_DMA=y
CONFIG_FSL_HV_MANAGER=y
CONFIG_FSL_IFC=y
CONFIG_FSL_PQ_MDIO=y
CONFIG_FSL_RIO=y
CONFIG_FSL_XGMAC_MDIO=y
@@ -58,6 +59,7 @@ CONFIG_INPUT_FF_MEMLESS=m
CONFIG_MARVELL_PHY=y
CONFIG_MDIO_BUS_MUX_GPIO=y
CONFIG_MDIO_BUS_MUX_MMIOREG=y
CONFIG_MEMORY=y
CONFIG_MMC_SDHCI_OF_ESDHC=y
CONFIG_MMC_SDHCI_PLTFM=y
CONFIG_MMC_SDHCI=y

4
arch/powerpc/include/asm/kexec.h
View File

@@ -181,6 +181,10 @@ static inline void crash_send_ipi(void (*crash_ipi_callback)(struct pt_regs *))
#endif /* CONFIG_KEXEC_CORE */
#if defined(CONFIG_KEXEC_FILE) || defined(CONFIG_CRASH_DUMP)
int update_cpus_node(void *fdt);
#endif
#ifdef CONFIG_PPC_BOOK3S_64
#include <asm/book3s/64/kexec.h>
#endif

73
arch/powerpc/platforms/pseries/plpks.h → arch/powerpc/include/asm/plpks.h
View File

@@ -6,8 +6,10 @@
* Platform keystore for pseries LPAR(PLPKS).
*/
#ifndef _PSERIES_PLPKS_H
#define _PSERIES_PLPKS_H
#ifndef _ASM_POWERPC_PLPKS_H
#define _ASM_POWERPC_PLPKS_H
#ifdef CONFIG_PSERIES_PLPKS
#include <linux/types.h>
#include <linux/list.h>
@@ -93,4 +95,69 @@ int plpks_read_fw_var(struct plpks_var *var);
*/
int plpks_read_bootloader_var(struct plpks_var *var);
#endif
/**
* Returns if PKS is available on this LPAR.
*/
bool plpks_is_available(void);
/**
* Returns version of the Platform KeyStore.
*/
u8 plpks_get_version(void);
/**
* Returns hypervisor storage overhead per object, not including the size of
* the object or label. Only valid for config version >= 2
*/
u16 plpks_get_objoverhead(void);
/**
* Returns maximum password size. Must be >= 32 bytes
*/
u16 plpks_get_maxpwsize(void);
/**
* Returns maximum object size supported by Platform KeyStore.
*/
u16 plpks_get_maxobjectsize(void);
/**
* Returns maximum object label size supported by Platform KeyStore.
*/
u16 plpks_get_maxobjectlabelsize(void);
/**
* Returns total size of the configured Platform KeyStore.
*/
u32 plpks_get_totalsize(void);
/**
* Returns used space from the total size of the Platform KeyStore.
*/
u32 plpks_get_usedspace(void);
/**
* Returns bitmask of policies supported by the hypervisor.
*/
u32 plpks_get_supportedpolicies(void);
/**
* Returns maximum byte size of a single object supported by the hypervisor.
* Only valid for config version >= 3
*/
u32 plpks_get_maxlargeobjectsize(void);
/**
* Returns bitmask of signature algorithms supported for signed updates.
* Only valid for config version >= 3
*/
u64 plpks_get_signedupdatealgorithms(void);
/**
* Returns the length of the PLPKS password in bytes.
*/
u16 plpks_get_passwordlen(void);
#endif // CONFIG_PSERIES_PLPKS
#endif // _ASM_POWERPC_PLPKS_H

12
arch/powerpc/kernel/prom.c
View File

@@ -324,6 +324,7 @@ static int __init early_init_dt_scan_cpus(unsigned long node,
void *data)
{
const char *type = of_get_flat_dt_prop(node, "device_type", NULL);
const __be32 *cpu_version = NULL;
const __be32 *prop;
const __be32 *intserv;
int i, nthreads;
@@ -404,7 +405,7 @@ static int __init early_init_dt_scan_cpus(unsigned long node,
prop = of_get_flat_dt_prop(node, "cpu-version", NULL);
if (prop && (be32_to_cpup(prop) & 0xff000000) == 0x0f000000) {
identify_cpu(0, be32_to_cpup(prop));
seq_buf_printf(&ppc_hw_desc, "0x%04x ", be32_to_cpup(prop));
cpu_version = prop;
}
check_cpu_feature_properties(node);
@@ -415,6 +416,12 @@ static int __init early_init_dt_scan_cpus(unsigned long node,
}
identical_pvr_fixup(node);
// We can now add the CPU name & PVR to the hardware description
seq_buf_printf(&ppc_hw_desc, "%s 0x%04lx ", cur_cpu_spec->cpu_name, mfspr(SPRN_PVR));
if (cpu_version)
seq_buf_printf(&ppc_hw_desc, "0x%04x ", be32_to_cpup(cpu_version));
init_mmu_slb_size(node);
#ifdef CONFIG_PPC64
@@ -852,9 +859,6 @@ void __init early_init_devtree(void *params)
dt_cpu_ftrs_scan();
// We can now add the CPU name & PVR to the hardware description
seq_buf_printf(&ppc_hw_desc, "%s 0x%04lx ", cur_cpu_spec->cpu_name, mfspr(SPRN_PVR));
/* Retrieve CPU related informations from the flat tree
* (altivec support, boot CPU ID, ...)
*/

112
arch/powerpc/kexec/core_64.c
View File

@@ -17,6 +17,7 @@
#include <linux/cpu.h>
#include <linux/hardirq.h>
#include <linux/of.h>
#include <linux/libfdt.h>
#include <asm/page.h>
#include <asm/current.h>
@@ -31,6 +32,7 @@
#include <asm/hw_breakpoint.h>
#include <asm/svm.h>
#include <asm/ultravisor.h>
#include <asm/crashdump-ppc64.h>
int machine_kexec_prepare(struct kimage *image)
{
@@ -431,3 +433,113 @@ static int __init export_htab_values(void)
}
late_initcall(export_htab_values);
#endif /* CONFIG_PPC_64S_HASH_MMU */
#if defined(CONFIG_KEXEC_FILE) || defined(CONFIG_CRASH_DUMP)
/**
* add_node_props - Reads node properties from device node structure and add
* them to fdt.
* @fdt: Flattened device tree of the kernel
* @node_offset: offset of the node to add a property at
* @dn: device node pointer
*
* Returns 0 on success, negative errno on error.
*/
static int add_node_props(void *fdt, int node_offset, const struct device_node *dn)
{
int ret = 0;
struct property *pp;
if (!dn)
return -EINVAL;
for_each_property_of_node(dn, pp) {
ret = fdt_setprop(fdt, node_offset, pp->name, pp->value, pp->length);
if (ret < 0) {
pr_err("Unable to add %s property: %s\n", pp->name, fdt_strerror(ret));
return ret;
}
}
return ret;
}
/**
* update_cpus_node - Update cpus node of flattened device tree using of_root
* device node.
* @fdt: Flattened device tree of the kernel.
*
* Returns 0 on success, negative errno on error.
*
* Note: expecting no subnodes under /cpus/<node> with device_type == "cpu".
* If this changes, update this function to include them.
*/
int update_cpus_node(void *fdt)
{
int prev_node_offset;
const char *device_type;
const struct fdt_property *prop;
struct device_node *cpus_node, *dn;
int cpus_offset, cpus_subnode_offset, ret = 0;
cpus_offset = fdt_path_offset(fdt, "/cpus");
if (cpus_offset < 0 && cpus_offset != -FDT_ERR_NOTFOUND) {
pr_err("Malformed device tree: error reading /cpus node: %s\n",
fdt_strerror(cpus_offset));
return cpus_offset;
}
prev_node_offset = cpus_offset;
/* Delete sub-nodes of /cpus node with device_type == "cpu" */
for (cpus_subnode_offset = fdt_first_subnode(fdt, cpus_offset); cpus_subnode_offset >= 0;) {
/* Ignore nodes that do not have a device_type property or device_type != "cpu" */
prop = fdt_get_property(fdt, cpus_subnode_offset, "device_type", NULL);
if (!prop || strcmp(prop->data, "cpu")) {
prev_node_offset = cpus_subnode_offset;
goto next_node;
}
ret = fdt_del_node(fdt, cpus_subnode_offset);
if (ret < 0) {
pr_err("Failed to delete a cpus sub-node: %s\n", fdt_strerror(ret));
return ret;
}
next_node:
if (prev_node_offset == cpus_offset)
cpus_subnode_offset = fdt_first_subnode(fdt, cpus_offset);
else
cpus_subnode_offset = fdt_next_subnode(fdt, prev_node_offset);
}
cpus_node = of_find_node_by_path("/cpus");
/* Fail here to avoid kexec/kdump kernel boot hung */
if (!cpus_node) {
pr_err("No /cpus node found\n");
return -EINVAL;
}
/* Add all /cpus sub-nodes of device_type == "cpu" to FDT */
for_each_child_of_node(cpus_node, dn) {
/* Ignore device nodes that do not have a device_type property
* or device_type != "cpu".
*/
device_type = of_get_property(dn, "device_type", NULL);
if (!device_type || strcmp(device_type, "cpu"))
continue;
cpus_subnode_offset = fdt_add_subnode(fdt, cpus_offset, dn->full_name);
if (cpus_subnode_offset < 0) {
pr_err("Unable to add %s subnode: %s\n", dn->full_name,
fdt_strerror(cpus_subnode_offset));
ret = cpus_subnode_offset;
goto out;
}
ret = add_node_props(fdt, cpus_subnode_offset, dn);
if (ret < 0)
goto out;
}
out:
of_node_put(cpus_node);
of_node_put(dn);
return ret;
}
#endif /* CONFIG_KEXEC_FILE || CONFIG_CRASH_DUMP */

87
arch/powerpc/kexec/file_load_64.c
View File

@@ -952,93 +952,6 @@ unsigned int kexec_extra_fdt_size_ppc64(struct kimage *image)
return (unsigned int)(usm_entries * sizeof(u64));
}
/**
* add_node_props - Reads node properties from device node structure and add
* them to fdt.
* @fdt: Flattened device tree of the kernel
* @node_offset: offset of the node to add a property at
* @dn: device node pointer
*
* Returns 0 on success, negative errno on error.
*/
static int add_node_props(void *fdt, int node_offset, const struct device_node *dn)
{
int ret = 0;
struct property *pp;
if (!dn)
return -EINVAL;
for_each_property_of_node(dn, pp) {
ret = fdt_setprop(fdt, node_offset, pp->name, pp->value, pp->length);
if (ret < 0) {
pr_err("Unable to add %s property: %s\n", pp->name, fdt_strerror(ret));
return ret;
}
}
return ret;
}
/**
* update_cpus_node - Update cpus node of flattened device tree using of_root
* device node.
* @fdt: Flattened device tree of the kernel.
*
* Returns 0 on success, negative errno on error.
*/
static int update_cpus_node(void *fdt)
{
struct device_node *cpus_node, *dn;
int cpus_offset, cpus_subnode_offset, ret = 0;
cpus_offset = fdt_path_offset(fdt, "/cpus");
if (cpus_offset < 0 && cpus_offset != -FDT_ERR_NOTFOUND) {
pr_err("Malformed device tree: error reading /cpus node: %s\n",
fdt_strerror(cpus_offset));
return cpus_offset;
}
if (cpus_offset > 0) {
ret = fdt_del_node(fdt, cpus_offset);
if (ret < 0) {
pr_err("Error deleting /cpus node: %s\n", fdt_strerror(ret));
return -EINVAL;
}
}
/* Add cpus node to fdt */
cpus_offset = fdt_add_subnode(fdt, fdt_path_offset(fdt, "/"), "cpus");
if (cpus_offset < 0) {
pr_err("Error creating /cpus node: %s\n", fdt_strerror(cpus_offset));
return -EINVAL;
}
/* Add cpus node properties */
cpus_node = of_find_node_by_path("/cpus");
ret = add_node_props(fdt, cpus_offset, cpus_node);
of_node_put(cpus_node);
if (ret < 0)
return ret;
/* Loop through all subnodes of cpus and add them to fdt */
for_each_node_by_type(dn, "cpu") {
cpus_subnode_offset = fdt_add_subnode(fdt, cpus_offset, dn->full_name);
if (cpus_subnode_offset < 0) {
pr_err("Unable to add %s subnode: %s\n", dn->full_name,
fdt_strerror(cpus_subnode_offset));
ret = cpus_subnode_offset;
goto out;
}
ret = add_node_props(fdt, cpus_subnode_offset, dn);
if (ret < 0)
goto out;
}
out:
of_node_put(dn);
return ret;
}
static int copy_property(void *fdt, int node_offset, const struct device_node *dn,
const char *propname)
{

4
arch/powerpc/kvm/powerpc.c
View File

@@ -1998,8 +1998,10 @@ static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu *vcpu,
break;
r = -ENXIO;
if (!xive_enabled())
if (!xive_enabled()) {
fdput(f);
break;
}
r = -EPERM;
dev = kvm_device_from_filp(f.file);

173
arch/powerpc/platforms/pseries/plpks.c
View File

@@ -18,15 +18,23 @@
#include <linux/types.h>
#include <asm/hvcall.h>
#include <asm/machdep.h>
#include "plpks.h"
#include <asm/plpks.h>
#include <asm/firmware.h>
static u8 *ospassword;
static u16 ospasswordlength;
// Retrieved with H_PKS_GET_CONFIG
static u8 version;
static u16 objoverhead;
static u16 maxpwsize;
static u16 maxobjsize;
static s16 maxobjlabelsize;
static u32 totalsize;
static u32 usedspace;
static u32 supportedpolicies;
static u32 maxlargeobjectsize;
static u64 signedupdatealgorithms;
struct plpks_auth {
u8 version;
@@ -113,7 +121,8 @@ static int plpks_gen_password(void)
u8 *password, consumer = PLPKS_OS_OWNER;
int rc;
password = kzalloc(maxpwsize, GFP_KERNEL);
// The password must not cross a page boundary, so we align to the next power of 2
password = kzalloc(roundup_pow_of_two(maxpwsize), GFP_KERNEL);
if (!password)
return -ENOMEM;
@@ -149,7 +158,9 @@ static struct plpks_auth *construct_auth(u8 consumer)
if (consumer > PLPKS_OS_OWNER)
return ERR_PTR(-EINVAL);
auth = kzalloc(struct_size(auth, password, maxpwsize), GFP_KERNEL);
// The auth structure must not cross a page boundary and must be
// 16 byte aligned. We align to the next largest power of 2
auth = kzalloc(roundup_pow_of_two(struct_size(auth, password, maxpwsize)), GFP_KERNEL);
if (!auth)
return ERR_PTR(-ENOMEM);
@@ -183,7 +194,8 @@ static struct label *construct_label(char *component, u8 varos, u8 *name,
if (component && slen > sizeof(label->attr.prefix))
return ERR_PTR(-EINVAL);
label = kzalloc(sizeof(*label), GFP_KERNEL);
// The label structure must not cross a page boundary, so we align to the next power of 2
label = kzalloc(roundup_pow_of_two(sizeof(*label)), GFP_KERNEL);
if (!label)
return ERR_PTR(-ENOMEM);
@@ -203,32 +215,157 @@ static struct label *construct_label(char *component, u8 varos, u8 *name,
static int _plpks_get_config(void)
{
unsigned long retbuf[PLPAR_HCALL_BUFSIZE] = { 0 };
struct {
struct config {
u8 version;
u8 flags;
__be32 rsvd0;
__be16 rsvd0;
__be16 objoverhead;
__be16 maxpwsize;
__be16 maxobjlabelsize;
__be16 maxobjsize;
__be32 totalsize;
__be32 usedspace;
__be32 supportedpolicies;
__be64 rsvd1;
} __packed config;
__be32 maxlargeobjectsize;
__be64 signedupdatealgorithms;
u8 rsvd1[476];
} __packed * config;
size_t size;
int rc = 0;
size = sizeof(*config);
// Config struct must not cross a page boundary. So long as the struct
// size is a power of 2, this should be fine as alignment is guaranteed
config = kzalloc(size, GFP_KERNEL);
if (!config) {
rc = -ENOMEM;
goto err;
}
rc = plpar_hcall(H_PKS_GET_CONFIG, retbuf, virt_to_phys(config), size);
if (rc != H_SUCCESS) {
rc = pseries_status_to_err(rc);
goto err;
}
version = config->version;
objoverhead = be16_to_cpu(config->objoverhead);
maxpwsize = be16_to_cpu(config->maxpwsize);
maxobjsize = be16_to_cpu(config->maxobjsize);
maxobjlabelsize = be16_to_cpu(config->maxobjlabelsize);
totalsize = be32_to_cpu(config->totalsize);
usedspace = be32_to_cpu(config->usedspace);
supportedpolicies = be32_to_cpu(config->supportedpolicies);
maxlargeobjectsize = be32_to_cpu(config->maxlargeobjectsize);
signedupdatealgorithms = be64_to_cpu(config->signedupdatealgorithms);
// Validate that the numbers we get back match the requirements of the spec
if (maxpwsize < 32) {
pr_err("Invalid Max Password Size received from hypervisor (%d < 32)\n", maxpwsize);
rc = -EIO;
goto err;
}
if (maxobjlabelsize < 255) {
pr_err("Invalid Max Object Label Size received from hypervisor (%d < 255)\n",
maxobjlabelsize);
rc = -EIO;
goto err;
}
if (totalsize < 4096) {
pr_err("Invalid Total Size received from hypervisor (%d < 4096)\n", totalsize);
rc = -EIO;
goto err;
}
if (version >= 3 && maxlargeobjectsize >= 65536 && maxobjsize != 0xFFFF) {
pr_err("Invalid Max Object Size (0x%x != 0xFFFF)\n", maxobjsize);
rc = -EIO;
goto err;
}
err:
kfree(config);
return rc;
}
u8 plpks_get_version(void)
{
return version;
}
u16 plpks_get_objoverhead(void)
{
return objoverhead;
}
u16 plpks_get_maxpwsize(void)
{
return maxpwsize;
}
u16 plpks_get_maxobjectsize(void)
{
return maxobjsize;
}
u16 plpks_get_maxobjectlabelsize(void)
{
return maxobjlabelsize;
}
u32 plpks_get_totalsize(void)
{
return totalsize;
}
u32 plpks_get_usedspace(void)
{
// Unlike other config values, usedspace regularly changes as objects
// are updated, so we need to refresh.
int rc = _plpks_get_config();
if (rc) {
pr_err("Couldn't get config, rc: %d\n", rc);
return 0;
}
return usedspace;
}
u32 plpks_get_supportedpolicies(void)
{
return supportedpolicies;
}
u32 plpks_get_maxlargeobjectsize(void)
{
return maxlargeobjectsize;
}
u64 plpks_get_signedupdatealgorithms(void)
{
return signedupdatealgorithms;
}
u16 plpks_get_passwordlen(void)
{
return ospasswordlength;
}
bool plpks_is_available(void)
{
int rc;
size = sizeof(config);
if (!firmware_has_feature(FW_FEATURE_LPAR))
return false;
rc = plpar_hcall(H_PKS_GET_CONFIG, retbuf, virt_to_phys(&config), size);
rc = _plpks_get_config();
if (rc)
return false;
if (rc != H_SUCCESS)
return pseries_status_to_err(rc);
maxpwsize = be16_to_cpu(config.maxpwsize);
maxobjsize = be16_to_cpu(config.maxobjsize);
return 0;
return true;
}
static int plpks_confirm_object_flushed(struct label *label,

33
arch/powerpc/xmon/ppc-dis.c
View File

@@ -122,32 +122,21 @@ int print_insn_powerpc (unsigned long insn, unsigned long memaddr)
bool insn_is_short;
ppc_cpu_t dialect;
dialect = PPC_OPCODE_PPC | PPC_OPCODE_COMMON
| PPC_OPCODE_64 | PPC_OPCODE_POWER4 | PPC_OPCODE_ALTIVEC;
dialect = PPC_OPCODE_PPC | PPC_OPCODE_COMMON;
if (cpu_has_feature(CPU_FTRS_POWER5))
dialect |= PPC_OPCODE_POWER5;
if (IS_ENABLED(CONFIG_PPC64))
dialect |= PPC_OPCODE_64 | PPC_OPCODE_POWER4 | PPC_OPCODE_CELL |
PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6 | PPC_OPCODE_POWER7 | PPC_OPCODE_POWER8 |
PPC_OPCODE_POWER9;
if (cpu_has_feature(CPU_FTRS_CELL))
dialect |= (PPC_OPCODE_CELL | PPC_OPCODE_ALTIVEC);
if (cpu_has_feature(CPU_FTR_TM))
dialect |= PPC_OPCODE_HTM;
if (cpu_has_feature(CPU_FTRS_POWER6))
dialect |= (PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6 | PPC_OPCODE_ALTIVEC);
if (cpu_has_feature(CPU_FTR_ALTIVEC))
dialect |= PPC_OPCODE_ALTIVEC | PPC_OPCODE_ALTIVEC2;
if (cpu_has_feature(CPU_FTRS_POWER7))
dialect |= (PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6 | PPC_OPCODE_POWER7
| PPC_OPCODE_ALTIVEC | PPC_OPCODE_VSX);
if (cpu_has_feature(CPU_FTRS_POWER8))
dialect |= (PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6 | PPC_OPCODE_POWER7
| PPC_OPCODE_POWER8 | PPC_OPCODE_HTM
| PPC_OPCODE_ALTIVEC | PPC_OPCODE_ALTIVEC2 | PPC_OPCODE_VSX);
if (cpu_has_feature(CPU_FTRS_POWER9))
dialect |= (PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6 | PPC_OPCODE_POWER7
| PPC_OPCODE_POWER8 | PPC_OPCODE_POWER9 | PPC_OPCODE_HTM
| PPC_OPCODE_ALTIVEC | PPC_OPCODE_ALTIVEC2
| PPC_OPCODE_VSX | PPC_OPCODE_VSX3);
if (cpu_has_feature(CPU_FTR_VSX))
dialect |= PPC_OPCODE_VSX | PPC_OPCODE_VSX3;
/* Get the major opcode of the insn. */
opcode = NULL;

58
arch/s390/kernel/uv.c
View File

@@ -172,36 +172,36 @@ int uv_convert_owned_from_secure(unsigned long paddr)
}
/*
* Calculate the expected ref_count for a page that would otherwise have no
* Calculate the expected ref_count for a folio that would otherwise have no
* further pins. This was cribbed from similar functions in other places in
* the kernel, but with some slight modifications. We know that a secure
* page can not be a huge page for example.
* folio can not be a large folio, for example.
*/
static int expected_page_refs(struct page *page)
static int expected_folio_refs(struct folio *folio)
{
int res;
res = page_mapcount(page);
if (PageSwapCache(page)) {
res = folio_mapcount(folio);
if (folio_test_swapcache(folio)) {
res++;
} else if (page_mapping(page)) {
} else if (folio_mapping(folio)) {
res++;
if (page_has_private(page))
if (folio->private)
res++;
}
return res;
}
static int make_page_secure(struct page *page, struct uv_cb_header *uvcb)
static int make_folio_secure(struct folio *folio, struct uv_cb_header *uvcb)
{
int expected, cc = 0;
if (PageWriteback(page))
if (folio_test_writeback(folio))
return -EAGAIN;
expected = expected_page_refs(page);
if (!page_ref_freeze(page, expected))
expected = expected_folio_refs(folio);
if (!folio_ref_freeze(folio, expected))
return -EBUSY;
set_bit(PG_arch_1, &page->flags);
set_bit(PG_arch_1, &folio->flags);
/*
* If the UVC does not succeed or fail immediately, we don't want to
* loop for long, or we might get stall notifications.
@@ -211,9 +211,9 @@ static int make_page_secure(struct page *page, struct uv_cb_header *uvcb)
* -EAGAIN and we let the callers deal with it.
*/
cc = __uv_call(0, (u64)uvcb);
page_ref_unfreeze(page, expected);
folio_ref_unfreeze(folio, expected);
/*
* Return -ENXIO if the page was not mapped, -EINVAL for other errors.
* Return -ENXIO if the folio was not mapped, -EINVAL for other errors.
* If busy or partially completed, return -EAGAIN.
*/
if (cc == UVC_CC_OK)
@@ -261,7 +261,7 @@ int gmap_make_secure(struct gmap *gmap, unsigned long gaddr, void *uvcb)
bool local_drain = false;
spinlock_t *ptelock;
unsigned long uaddr;
struct page *page;
struct folio *folio;
pte_t *ptep;
int rc;
@@ -288,15 +288,26 @@ again:
rc = -ENXIO;
ptep = get_locked_pte(gmap->mm, uaddr, &ptelock);
if (pte_present(*ptep) && !(pte_val(*ptep) & _PAGE_INVALID) && pte_write(*ptep)) {
page = pte_page(*ptep);
folio = page_folio(pte_page(*ptep));
rc = -EINVAL;
if (folio_test_large(folio))
goto unlock;
rc = -EAGAIN;
if (trylock_page(page)) {
if (folio_trylock(folio)) {
if (should_export_before_import(uvcb, gmap->mm))
uv_convert_from_secure(page_to_phys(page));
rc = make_page_secure(page, uvcb);
unlock_page(page);
uv_convert_from_secure(PFN_PHYS(folio_pfn(folio)));
rc = make_folio_secure(folio, uvcb);
folio_unlock(folio);
}
/*
* Once we drop the PTL, the folio may get unmapped and
* freed immediately. We need a temporary reference.
*/
if (rc == -EAGAIN)
folio_get(folio);
}
unlock:
pte_unmap_unlock(ptep, ptelock);
out:
mmap_read_unlock(gmap->mm);
@@ -306,10 +317,11 @@ out:
* If we are here because the UVC returned busy or partial
* completion, this is just a useless check, but it is safe.
*/
wait_on_page_writeback(page);
folio_wait_writeback(folio);
folio_put(folio);
} else if (rc == -EBUSY) {
/*
* If we have tried a local drain and the page refcount
* If we have tried a local drain and the folio refcount
* still does not match our expected safe value, try with a
* system wide drain. This is needed if the pagevecs holding
* the page are on a different CPU.
@@ -320,7 +332,7 @@ out:
return -EAGAIN;
}
/*
* We are here if the page refcount does not match the
* We are here if the folio refcount does not match the
* expected safe value. The main culprits are usually
* pagevecs. With lru_add_drain() we drain the pagevecs
* on the local CPU so that hopefully the refcount will

110
arch/s390/pci/pci_irq.c
View File

@@ -268,33 +268,20 @@ static void zpci_floating_irq_handler(struct airq_struct *airq,
}
}
int arch_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type)
static int __alloc_airq(struct zpci_dev *zdev, int msi_vecs,
unsigned long *bit)
{
struct zpci_dev *zdev = to_zpci(pdev);
unsigned int hwirq, msi_vecs, cpu;
unsigned long bit;
struct msi_desc *msi;
struct msi_msg msg;
int cpu_addr;
int rc, irq;
zdev->aisb = -1UL;
zdev->msi_first_bit = -1U;
if (type == PCI_CAP_ID_MSI && nvec > 1)
return 1;
msi_vecs = min_t(unsigned int, nvec, zdev->max_msi);
if (irq_delivery == DIRECTED) {
/* Allocate cpu vector bits */
bit = airq_iv_alloc(zpci_ibv[0], msi_vecs);
if (bit == -1UL)
*bit = airq_iv_alloc(zpci_ibv[0], msi_vecs);
if (*bit == -1UL)
return -EIO;
} else {
/* Allocate adapter summary indicator bit */
bit = airq_iv_alloc_bit(zpci_sbv);
if (bit == -1UL)
*bit = airq_iv_alloc_bit(zpci_sbv);
if (*bit == -1UL)
return -EIO;
zdev->aisb = bit;
zdev->aisb = *bit;
/* Create adapter interrupt vector */
zdev->aibv = airq_iv_create(msi_vecs, AIRQ_IV_DATA | AIRQ_IV_BITLOCK, NULL);
@@ -302,27 +289,66 @@ int arch_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type)
return -ENOMEM;
/* Wire up shortcut pointer */
zpci_ibv[bit] = zdev->aibv;
zpci_ibv[*bit] = zdev->aibv;
/* Each function has its own interrupt vector */
bit = 0;
*bit = 0;
}
return 0;
}
int arch_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type)
{
unsigned int hwirq, msi_vecs, irqs_per_msi, i, cpu;
struct zpci_dev *zdev = to_zpci(pdev);
struct msi_desc *msi;
struct msi_msg msg;
unsigned long bit;
int cpu_addr;
int rc, irq;
zdev->aisb = -1UL;
zdev->msi_first_bit = -1U;
msi_vecs = min_t(unsigned int, nvec, zdev->max_msi);
if (msi_vecs < nvec) {
pr_info("%s requested %d irqs, allocate system limit of %d",
pci_name(pdev), nvec, zdev->max_msi);
}
/* Request MSI interrupts */
rc = __alloc_airq(zdev, msi_vecs, &bit);
if (rc < 0)
return rc;
/*
* Request MSI interrupts:
* When using MSI, nvec_used interrupt sources and their irq
* descriptors are controlled through one msi descriptor.
* Thus the outer loop over msi descriptors shall run only once,
* while two inner loops iterate over the interrupt vectors.
* When using MSI-X, each interrupt vector/irq descriptor
* is bound to exactly one msi descriptor (nvec_used is one).
* So the inner loops are executed once, while the outer iterates
* over the MSI-X descriptors.
*/
hwirq = bit;
msi_for_each_desc(msi, &pdev->dev, MSI_DESC_NOTASSOCIATED) {
rc = -EIO;
if (hwirq - bit >= msi_vecs)
break;
irq = __irq_alloc_descs(-1, 0, 1, 0, THIS_MODULE,
(irq_delivery == DIRECTED) ?
msi->affinity : NULL);
irqs_per_msi = min_t(unsigned int, msi_vecs, msi->nvec_used);
irq = __irq_alloc_descs(-1, 0, irqs_per_msi, 0, THIS_MODULE,
(irq_delivery == DIRECTED) ?
msi->affinity : NULL);
if (irq < 0)
return -ENOMEM;
rc = irq_set_msi_desc(irq, msi);
if (rc)
return rc;
irq_set_chip_and_handler(irq, &zpci_irq_chip,
handle_percpu_irq);
for (i = 0; i < irqs_per_msi; i++) {
rc = irq_set_msi_desc_off(irq, i, msi);
if (rc)
return rc;
irq_set_chip_and_handler(irq + i, &zpci_irq_chip,
handle_percpu_irq);
}
msg.data = hwirq - bit;
if (irq_delivery == DIRECTED) {
if (msi->affinity)
@@ -335,31 +361,35 @@ int arch_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type)
msg.address_lo |= (cpu_addr << 8);
for_each_possible_cpu(cpu) {
airq_iv_set_data(zpci_ibv[cpu], hwirq, irq);
for (i = 0; i < irqs_per_msi; i++)
airq_iv_set_data(zpci_ibv[cpu],
hwirq + i, irq + i);
}
} else {
msg.address_lo = zdev->msi_addr & 0xffffffff;
airq_iv_set_data(zdev->aibv, hwirq, irq);
for (i = 0; i < irqs_per_msi; i++)
airq_iv_set_data(zdev->aibv, hwirq + i, irq + i);
}
msg.address_hi = zdev->msi_addr >> 32;
pci_write_msi_msg(irq, &msg);
hwirq++;
hwirq += irqs_per_msi;
}
zdev->msi_first_bit = bit;
zdev->msi_nr_irqs = msi_vecs;
zdev->msi_nr_irqs = hwirq - bit;
rc = zpci_set_irq(zdev);
if (rc)
return rc;
return (msi_vecs == nvec) ? 0 : msi_vecs;
return (zdev->msi_nr_irqs == nvec) ? 0 : zdev->msi_nr_irqs;
}
void arch_teardown_msi_irqs(struct pci_dev *pdev)
{
struct zpci_dev *zdev = to_zpci(pdev);
struct msi_desc *msi;
unsigned int i;
int rc;
/* Disable interrupts */
@@ -369,8 +399,10 @@ void arch_teardown_msi_irqs(struct pci_dev *pdev)
/* Release MSI interrupts */
msi_for_each_desc(msi, &pdev->dev, MSI_DESC_ASSOCIATED) {
irq_set_msi_desc(msi->irq, NULL);
irq_free_desc(msi->irq);
for (i = 0; i < msi->nvec_used; i++) {
irq_set_msi_desc(msi->irq + i, NULL);
irq_free_desc(msi->irq + i);
}
msi->msg.address_lo = 0;
msi->msg.address_hi = 0;
msi->msg.data = 0;

1
arch/sparc/include/asm/oplib_64.h
View File

@@ -247,6 +247,7 @@ void prom_sun4v_guest_soft_state(void);
int prom_ihandle2path(int handle, char *buffer, int bufsize);
/* Client interface level routines. */
void prom_cif_init(void *cif_handler);
void p1275_cmd_direct(unsigned long *);
#endif /* !(__SPARC64_OPLIB_H) */

3
arch/sparc/prom/init_64.c
View File

@@ -26,9 +26,6 @@ phandle prom_chosen_node;
* routines in the prom library.
* It gets passed the pointer to the PROM vector.
*/
extern void prom_cif_init(void *);
void __init prom_init(void *cif_handler)
{
phandle node;

2
arch/sparc/prom/p1275.c
View File

@@ -49,7 +49,7 @@ void p1275_cmd_direct(unsigned long *args)
local_irq_restore(flags);
}
void prom_cif_init(void *cif_handler, void *cif_stack)
void prom_cif_init(void *cif_handler)
{
p1275buf.prom_cif_handler = (void (*)(long *))cif_handler;
}

50
arch/um/drivers/ubd_kern.c
View File

@@ -456,43 +456,31 @@ static int bulk_req_safe_read(
return n;
}
/* Called without dev->lock held, and only in interrupt context. */
static void ubd_handler(void)
static void ubd_end_request(struct io_thread_req *io_req)
{
int n;
int count;
while(1){
n = bulk_req_safe_read(
thread_fd,
irq_req_buffer,
&irq_remainder,
&irq_remainder_size,
UBD_REQ_BUFFER_SIZE
);
if (n < 0) {
if(n == -EAGAIN)
break;
printk(KERN_ERR "spurious interrupt in ubd_handler, "
"err = %d\n", -n);
return;
}
for (count = 0; count < n/sizeof(struct io_thread_req *); count++) {
struct io_thread_req *io_req = (*irq_req_buffer)[count];
if ((io_req->error == BLK_STS_NOTSUPP) && (req_op(io_req->req) == REQ_OP_DISCARD)) {
blk_queue_max_discard_sectors(io_req->req->q, 0);
blk_queue_max_write_zeroes_sectors(io_req->req->q, 0);
}
blk_mq_end_request(io_req->req, io_req->error);
kfree(io_req);
}
if (io_req->error == BLK_STS_NOTSUPP) {
if (req_op(io_req->req) == REQ_OP_DISCARD)
blk_queue_max_discard_sectors(io_req->req->q, 0);
else if (req_op(io_req->req) == REQ_OP_WRITE_ZEROES)
blk_queue_max_write_zeroes_sectors(io_req->req->q, 0);
}
blk_mq_end_request(io_req->req, io_req->error);
kfree(io_req);
}
static irqreturn_t ubd_intr(int irq, void *dev)
{
ubd_handler();
int len, i;
while ((len = bulk_req_safe_read(thread_fd, irq_req_buffer,
&irq_remainder, &irq_remainder_size,
UBD_REQ_BUFFER_SIZE)) >= 0) {
for (i = 0; i < len / sizeof(struct io_thread_req *); i++)
ubd_end_request((*irq_req_buffer)[i]);
}
if (len < 0 && len != -EAGAIN)
pr_err("spurious interrupt in %s, err = %d\n", __func__, len);
return IRQ_HANDLED;
}

4
arch/um/kernel/time.c
View File

@@ -874,9 +874,9 @@ int setup_time_travel_start(char *str)
return 1;
}
__setup("time-travel-start", setup_time_travel_start);
__setup("time-travel-start=", setup_time_travel_start);
__uml_help(setup_time_travel_start,
"time-travel-start=<seconds>\n"
"time-travel-start=<nanoseconds>\n"
"Configure the UML instance's wall clock to start at this value rather than\n"
"the host's wall clock at the time of UML boot.\n");
#endif

118
arch/um/os-Linux/signal.c
View File

@@ -8,6 +8,7 @@
#include <stdlib.h>
#include <stdarg.h>
#include <stdbool.h>
#include <errno.h>
#include <signal.h>
#include <string.h>
@@ -65,9 +66,7 @@ static void sig_handler_common(int sig, struct siginfo *si, mcontext_t *mc)
int signals_enabled;
#ifdef UML_CONFIG_UML_TIME_TRAVEL_SUPPORT
static int signals_blocked;
#else
#define signals_blocked 0
static int signals_blocked, signals_blocked_pending;
#endif
static unsigned int signals_pending;
static unsigned int signals_active = 0;
@@ -76,14 +75,27 @@ void sig_handler(int sig, struct siginfo *si, mcontext_t *mc)
{
int enabled = signals_enabled;
if ((signals_blocked || !enabled) && (sig == SIGIO)) {
#ifdef UML_CONFIG_UML_TIME_TRAVEL_SUPPORT
if ((signals_blocked ||
__atomic_load_n(&signals_blocked_pending, __ATOMIC_SEQ_CST)) &&
(sig == SIGIO)) {
/* increment so unblock will do another round */
__atomic_add_fetch(&signals_blocked_pending, 1,
__ATOMIC_SEQ_CST);
return;
}
#endif
if (!enabled && (sig == SIGIO)) {
/*
* In TT_MODE_EXTERNAL, need to still call time-travel
* handlers unless signals are also blocked for the
* external time message processing. This will mark
* signals_pending by itself (only if necessary.)
* handlers. This will mark signals_pending by itself
* (only if necessary.)
* Note we won't get here if signals are hard-blocked
* (which is handled above), in that case the hard-
* unblock will handle things.
*/
if (!signals_blocked && time_travel_mode == TT_MODE_EXTERNAL)
if (time_travel_mode == TT_MODE_EXTERNAL)
sigio_run_timetravel_handlers();
else
signals_pending |= SIGIO_MASK;
@@ -380,33 +392,99 @@ int um_set_signals_trace(int enable)
#ifdef UML_CONFIG_UML_TIME_TRAVEL_SUPPORT
void mark_sigio_pending(void)
{
/*
* It would seem that this should be atomic so
* it isn't a read-modify-write with a signal
* that could happen in the middle, losing the
* value set by the signal.
*
* However, this function is only called when in
* time-travel=ext simulation mode, in which case
* the only signal ever pending is SIGIO, which
* is blocked while this can be called, and the
* timer signal (SIGALRM) cannot happen.
*/
signals_pending |= SIGIO_MASK;
}
void block_signals_hard(void)
{
if (signals_blocked)
return;
signals_blocked = 1;
signals_blocked++;
barrier();
}
void unblock_signals_hard(void)
{
static bool unblocking;
if (!signals_blocked)
panic("unblocking signals while not blocked");
if (--signals_blocked)
return;
/* Must be set to 0 before we check the pending bits etc. */
signals_blocked = 0;
/*
* Must be set to 0 before we check pending so the
* SIGIO handler will run as normal unless we're still
* going to process signals_blocked_pending.
*/
barrier();
if (signals_pending && signals_enabled) {
/* this is a bit inefficient, but that's not really important */
block_signals();
unblock_signals();
} else if (signals_pending & SIGIO_MASK) {
/* we need to run time-travel handlers even if not enabled */
sigio_run_timetravel_handlers();
/*
* Note that block_signals_hard()/unblock_signals_hard() can be called
* within the unblock_signals()/sigio_run_timetravel_handlers() below.
* This would still be prone to race conditions since it's actually a
* call _within_ e.g. vu_req_read_message(), where we observed this
* issue, which loops. Thus, if the inner call handles the recorded
* pending signals, we can get out of the inner call with the real
* signal hander no longer blocked, and still have a race. Thus don't
* handle unblocking in the inner call, if it happens, but only in
* the outermost call - 'unblocking' serves as an ownership for the
* signals_blocked_pending decrement.
*/
if (unblocking)
return;
unblocking = true;
while (__atomic_load_n(&signals_blocked_pending, __ATOMIC_SEQ_CST)) {
if (signals_enabled) {
/* signals are enabled so we can touch this */
signals_pending |= SIGIO_MASK;
/*
* this is a bit inefficient, but that's
* not really important
*/
block_signals();
unblock_signals();
} else {
/*
* we need to run time-travel handlers even
* if not enabled
*/
sigio_run_timetravel_handlers();
}
/*
* The decrement of signals_blocked_pending must be atomic so
* that the signal handler will either happen before or after
* the decrement, not during a read-modify-write:
* - If it happens before, it can increment it and we'll
* decrement it and do another round in the loop.
* - If it happens after it'll see 0 for both signals_blocked
* and signals_blocked_pending and thus run the handler as
* usual (subject to signals_enabled, but that's unrelated.)
*
* Note that a call to unblock_signals_hard() within the calls
* to unblock_signals() or sigio_run_timetravel_handlers() above
* will do nothing due to the 'unblocking' state, so this cannot
* underflow as the only one decrementing will be the outermost
* one.
*/
if (__atomic_sub_fetch(&signals_blocked_pending, 1,
__ATOMIC_SEQ_CST) < 0)
panic("signals_blocked_pending underflow");
}
unblocking = false;
}
#endif

3
arch/x86/events/core.c
View File

@@ -2573,6 +2573,7 @@ static ssize_t set_attr_rdpmc(struct device *cdev,
struct device_attribute *attr,
const char *buf, size_t count)
{
static DEFINE_MUTEX(rdpmc_mutex);
unsigned long val;
ssize_t ret;
@@ -2586,6 +2587,8 @@ static ssize_t set_attr_rdpmc(struct device *cdev,
if (x86_pmu.attr_rdpmc_broken)
return -ENOTSUPP;
guard(mutex)(&rdpmc_mutex);
if (val != x86_pmu.attr_rdpmc) {
/*
* Changing into or out of never available or always available,

7
arch/x86/events/intel/cstate.c
View File

@@ -80,7 +80,7 @@
* MSR_PKG_C7_RESIDENCY: Package C7 Residency Counter.
* perf code: 0x03
* Available model: NHM,WSM,SNB,IVB,HSW,BDW,SKL,CNL,
* KBL,CML,ICL,TGL,RKL,ADL,RPL,MTL
* KBL,CML,ICL,TGL,RKL
* Scope: Package (physical package)
* MSR_PKG_C8_RESIDENCY: Package C8 Residency Counter.
* perf code: 0x04
@@ -89,8 +89,7 @@
* Scope: Package (physical package)
* MSR_PKG_C9_RESIDENCY: Package C9 Residency Counter.
* perf code: 0x05
* Available model: HSW ULT,KBL,CNL,CML,ICL,TGL,RKL,
* ADL,RPL,MTL
* Available model: HSW ULT,KBL,CNL,CML,ICL,TGL,RKL
* Scope: Package (physical package)
* MSR_PKG_C10_RESIDENCY: Package C10 Residency Counter.
* perf code: 0x06
@@ -584,9 +583,7 @@ static const struct cstate_model adl_cstates __initconst = {
.pkg_events = BIT(PERF_CSTATE_PKG_C2_RES) |
BIT(PERF_CSTATE_PKG_C3_RES) |
BIT(PERF_CSTATE_PKG_C6_RES) |
BIT(PERF_CSTATE_PKG_C7_RES) |
BIT(PERF_CSTATE_PKG_C8_RES) |
BIT(PERF_CSTATE_PKG_C9_RES) |
BIT(PERF_CSTATE_PKG_C10_RES),
};

4
arch/x86/events/intel/pt.c
View File

@@ -877,7 +877,7 @@ static void pt_update_head(struct pt *pt)
*/
static void *pt_buffer_region(struct pt_buffer *buf)
{
return phys_to_virt(TOPA_ENTRY(buf->cur, buf->cur_idx)->base << TOPA_SHIFT);
return phys_to_virt((phys_addr_t)TOPA_ENTRY(buf->cur, buf->cur_idx)->base << TOPA_SHIFT);
}
/**
@@ -989,7 +989,7 @@ pt_topa_entry_for_page(struct pt_buffer *buf, unsigned int pg)
* order allocations, there shouldn't be many of these.
*/
list_for_each_entry(topa, &buf->tables, list) {
if (topa->offset + topa->size > pg << PAGE_SHIFT)
if (topa->offset + topa->size > (unsigned long)pg << PAGE_SHIFT)
goto found;
}

4
arch/x86/events/intel/pt.h
View File

@@ -33,8 +33,8 @@ struct topa_entry {
u64 rsvd2 : 1;
u64 size : 4;
u64 rsvd3 : 2;
u64 base : 36;
u64 rsvd4 : 16;
u64 base : 40;
u64 rsvd4 : 12;
};
/* TSC to Core Crystal Clock Ratio */

6
arch/x86/events/intel/uncore_snbep.c
View File

@@ -459,6 +459,7 @@
#define SPR_RAW_EVENT_MASK_EXT 0xffffff
/* SPR CHA */
#define SPR_CHA_EVENT_MASK_EXT 0xffffffff
#define SPR_CHA_PMON_CTL_TID_EN (1 << 16)
#define SPR_CHA_PMON_EVENT_MASK (SNBEP_PMON_RAW_EVENT_MASK | \
SPR_CHA_PMON_CTL_TID_EN)
@@ -475,6 +476,7 @@ DEFINE_UNCORE_FORMAT_ATTR(umask_ext, umask, "config:8-15,32-43,45-55");
DEFINE_UNCORE_FORMAT_ATTR(umask_ext2, umask, "config:8-15,32-57");
DEFINE_UNCORE_FORMAT_ATTR(umask_ext3, umask, "config:8-15,32-39");
DEFINE_UNCORE_FORMAT_ATTR(umask_ext4, umask, "config:8-15,32-55");
DEFINE_UNCORE_FORMAT_ATTR(umask_ext5, umask, "config:8-15,32-63");
DEFINE_UNCORE_FORMAT_ATTR(qor, qor, "config:16");
DEFINE_UNCORE_FORMAT_ATTR(edge, edge, "config:18");
DEFINE_UNCORE_FORMAT_ATTR(tid_en, tid_en, "config:19");
@@ -5648,7 +5650,7 @@ static struct intel_uncore_ops spr_uncore_chabox_ops = {
static struct attribute *spr_uncore_cha_formats_attr[] = {
&format_attr_event.attr,
&format_attr_umask_ext4.attr,
&format_attr_umask_ext5.attr,
&format_attr_tid_en2.attr,
&format_attr_edge.attr,
&format_attr_inv.attr,
@@ -5684,7 +5686,7 @@ ATTRIBUTE_GROUPS(uncore_alias);
static struct intel_uncore_type spr_uncore_chabox = {
.name = "cha",
.event_mask = SPR_CHA_PMON_EVENT_MASK,
.event_mask_ext = SPR_RAW_EVENT_MASK_EXT,
.event_mask_ext = SPR_CHA_EVENT_MASK_EXT,
.num_shared_regs = 1,
.constraints = skx_uncore_chabox_constraints,
.ops = &spr_uncore_chabox_ops,

2
arch/x86/include/asm/kvm_host.h
View File

@@ -1651,7 +1651,7 @@ struct kvm_x86_nested_ops {
bool (*is_exception_vmexit)(struct kvm_vcpu *vcpu, u8 vector,
u32 error_code);
int (*check_events)(struct kvm_vcpu *vcpu);
bool (*has_events)(struct kvm_vcpu *vcpu);
bool (*has_events)(struct kvm_vcpu *vcpu, bool for_injection);
void (*triple_fault)(struct kvm_vcpu *vcpu);
int (*get_state)(struct kvm_vcpu *vcpu,
struct kvm_nested_state __user *user_kvm_nested_state,

2
arch/x86/kernel/devicetree.c
View File

@@ -87,7 +87,7 @@ static int x86_of_pci_irq_enable(struct pci_dev *dev)
ret = pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin);
if (ret)
return ret;
return pcibios_err_to_errno(ret);
if (!pin)
return 0;

2
arch/x86/kvm/vmx/nested.c
View File

@@ -3934,7 +3934,7 @@ static bool nested_vmx_preemption_timer_pending(struct kvm_vcpu *vcpu)
to_vmx(vcpu)->nested.preemption_timer_expired;
}
static bool vmx_has_nested_events(struct kvm_vcpu *vcpu)
static bool vmx_has_nested_events(struct kvm_vcpu *vcpu, bool for_injection)
{
return nested_vmx_preemption_timer_pending(vcpu) ||
to_vmx(vcpu)->nested.mtf_pending;

11
arch/x86/kvm/vmx/vmx.c
View File

@@ -4980,14 +4980,19 @@ static int vmx_nmi_allowed(struct kvm_vcpu *vcpu, bool for_injection)
return !vmx_nmi_blocked(vcpu);
}
bool __vmx_interrupt_blocked(struct kvm_vcpu *vcpu)
{
return !(vmx_get_rflags(vcpu) & X86_EFLAGS_IF) ||
(vmcs_read32(GUEST_INTERRUPTIBILITY_INFO) &
(GUEST_INTR_STATE_STI | GUEST_INTR_STATE_MOV_SS));
}
bool vmx_interrupt_blocked(struct kvm_vcpu *vcpu)
{
if (is_guest_mode(vcpu) && nested_exit_on_intr(vcpu))
return false;
return !(vmx_get_rflags(vcpu) & X86_EFLAGS_IF) ||
(vmcs_read32(GUEST_INTERRUPTIBILITY_INFO) &
(GUEST_INTR_STATE_STI | GUEST_INTR_STATE_MOV_SS));
return __vmx_interrupt_blocked(vcpu);
}
static int vmx_interrupt_allowed(struct kvm_vcpu *vcpu, bool for_injection)

1
arch/x86/kvm/vmx/vmx.h
View File

@@ -413,6 +413,7 @@ u64 construct_eptp(struct kvm_vcpu *vcpu, hpa_t root_hpa, int root_level);
bool vmx_guest_inject_ac(struct kvm_vcpu *vcpu);
void vmx_update_exception_bitmap(struct kvm_vcpu *vcpu);
bool vmx_nmi_blocked(struct kvm_vcpu *vcpu);
bool __vmx_interrupt_blocked(struct kvm_vcpu *vcpu);
bool vmx_interrupt_blocked(struct kvm_vcpu *vcpu);
bool vmx_get_nmi_mask(struct kvm_vcpu *vcpu);
void vmx_set_nmi_mask(struct kvm_vcpu *vcpu, bool masked);

4
arch/x86/kvm/x86.c
View File

@@ -10131,7 +10131,7 @@ static int kvm_check_and_inject_events(struct kvm_vcpu *vcpu,
if (is_guest_mode(vcpu) &&
kvm_x86_ops.nested_ops->has_events &&
kvm_x86_ops.nested_ops->has_events(vcpu))
kvm_x86_ops.nested_ops->has_events(vcpu, true))
*req_immediate_exit = true;
/*
@@ -13013,7 +13013,7 @@ static inline bool kvm_vcpu_has_events(struct kvm_vcpu *vcpu)
if (is_guest_mode(vcpu) &&
kvm_x86_ops.nested_ops->has_events &&
kvm_x86_ops.nested_ops->has_events(vcpu))
kvm_x86_ops.nested_ops->has_events(vcpu, false))
return true;
if (kvm_xen_has_pending_events(vcpu))

4
arch/x86/pci/intel_mid_pci.c
View File

@@ -233,9 +233,9 @@ static int intel_mid_pci_irq_enable(struct pci_dev *dev)
return 0;
ret = pci_read_config_byte(dev, PCI_INTERRUPT_LINE, &gsi);
if (ret < 0) {
if (ret) {
dev_warn(&dev->dev, "Failed to read interrupt line: %d\n", ret);
return ret;
return pcibios_err_to_errno(ret);
}
id = x86_match_cpu(intel_mid_cpu_ids);

4
arch/x86/pci/xen.c
View File

@@ -38,10 +38,10 @@ static int xen_pcifront_enable_irq(struct pci_dev *dev)
u8 gsi;
rc = pci_read_config_byte(dev, PCI_INTERRUPT_LINE, &gsi);
if (rc < 0) {
if (rc) {
dev_warn(&dev->dev, "Xen PCI: failed to read interrupt line: %d\n",
rc);
return rc;
return pcibios_err_to_errno(rc);
}
/* In PV DomU the Xen PCI backend puts the PIRQ in the interrupt line.*/
pirq = gsi;

4
arch/x86/platform/intel/iosf_mbi.c
View File

@@ -62,7 +62,7 @@ static int iosf_mbi_pci_read_mdr(u32 mcrx, u32 mcr, u32 *mdr)
fail_read:
dev_err(&mbi_pdev->dev, "PCI config access failed with %d\n", result);
return result;
return pcibios_err_to_errno(result);
}
static int iosf_mbi_pci_write_mdr(u32 mcrx, u32 mcr, u32 mdr)
@@ -91,7 +91,7 @@ static int iosf_mbi_pci_write_mdr(u32 mcrx, u32 mcr, u32 mdr)
fail_write:
dev_err(&mbi_pdev->dev, "PCI config access failed with %d\n", result);
return result;
return pcibios_err_to_errno(result);
}
int iosf_mbi_read(u8 port, u8 opcode, u32 offset, u32 *mdr)

4
arch/x86/xen/p2m.c
View File

@@ -736,7 +736,7 @@ int set_foreign_p2m_mapping(struct gnttab_map_grant_ref *map_ops,
* immediate unmapping.
*/
map_ops[i].status = GNTST_general_error;
unmap[0].host_addr = map_ops[i].host_addr,
unmap[0].host_addr = map_ops[i].host_addr;
unmap[0].handle = map_ops[i].handle;
map_ops[i].handle = INVALID_GRANT_HANDLE;
if (map_ops[i].flags & GNTMAP_device_map)
@@ -746,7 +746,7 @@ int set_foreign_p2m_mapping(struct gnttab_map_grant_ref *map_ops,
if (kmap_ops) {
kmap_ops[i].status = GNTST_general_error;
unmap[1].host_addr = kmap_ops[i].host_addr,
unmap[1].host_addr = kmap_ops[i].host_addr;
unmap[1].handle = kmap_ops[i].handle;
kmap_ops[i].handle = INVALID_GRANT_HANDLE;
if (kmap_ops[i].flags & GNTMAP_device_map)

21
block/bio-integrity.c
View File

@@ -199,8 +199,7 @@ bool bio_integrity_prep(struct bio *bio)
unsigned long start, end;
unsigned int len, nr_pages;
unsigned int bytes, offset, i;
unsigned int intervals;
blk_status_t status;
gfp_t gfp = GFP_NOIO;
if (!bi)
return true;
@@ -223,13 +222,19 @@ bool bio_integrity_prep(struct bio *bio)
if (!bi->profile->generate_fn ||
!(bi->flags & BLK_INTEGRITY_GENERATE))
return true;
/*
* Zero the memory allocated to not leak uninitialized kernel
* memory to disk. For PI this only affects the app tag, but
* for non-integrity metadata it affects the entire metadata
* buffer.
*/
gfp |= __GFP_ZERO;
}
intervals = bio_integrity_intervals(bi, bio_sectors(bio));
/* Allocate kernel buffer for protection data */
len = intervals * bi->tuple_size;
buf = kmalloc(len, GFP_NOIO);
status = BLK_STS_RESOURCE;
len = bio_integrity_bytes(bi, bio_sectors(bio));
buf = kmalloc(len, gfp);
if (unlikely(buf == NULL)) {
printk(KERN_ERR "could not allocate integrity buffer\n");
goto err_end_io;
@@ -244,7 +249,6 @@ bool bio_integrity_prep(struct bio *bio)
if (IS_ERR(bip)) {
printk(KERN_ERR "could not allocate data integrity bioset\n");
kfree(buf);
status = BLK_STS_RESOURCE;
goto err_end_io;
}
@@ -272,7 +276,6 @@ bool bio_integrity_prep(struct bio *bio)
if (ret == 0) {
printk(KERN_ERR "could not attach integrity payload\n");
status = BLK_STS_RESOURCE;
goto err_end_io;
}
@@ -294,7 +297,7 @@ bool bio_integrity_prep(struct bio *bio)
return true;
err_end_io:
bio->bi_status = status;
bio->bi_status = BLK_STS_RESOURCE;
bio_endio(bio);
return false;

4
drivers/android/binder.c
View File

@@ -583,9 +583,7 @@ static bool binder_has_work(struct binder_thread *thread, bool do_proc_work)
static bool binder_available_for_proc_work_ilocked(struct binder_thread *thread)
{
return !thread->transaction_stack &&
binder_worklist_empty_ilocked(&thread->todo) &&
(thread->looper & (BINDER_LOOPER_STATE_ENTERED |
BINDER_LOOPER_STATE_REGISTERED));
binder_worklist_empty_ilocked(&thread->todo);
}
static void binder_wakeup_poll_threads_ilocked(struct binder_proc *proc,

7
drivers/ata/libata-scsi.c
View File

@@ -905,11 +905,8 @@ static void ata_gen_passthru_sense(struct ata_queued_cmd *qc)
&sense_key, &asc, &ascq, verbose);
ata_scsi_set_sense(qc->dev, cmd, sense_key, asc, ascq);
} else {
/*
* ATA PASS-THROUGH INFORMATION AVAILABLE
* Always in descriptor format sense.
*/
scsi_build_sense(cmd, 1, RECOVERED_ERROR, 0, 0x1D);
/* ATA PASS-THROUGH INFORMATION AVAILABLE */
ata_scsi_set_sense(qc->dev, cmd, RECOVERED_ERROR, 0, 0x1D);
}
if ((cmd->sense_buffer[0] & 0x7f) >= 0x72) {

1
drivers/auxdisplay/ht16k33.c
View File

@@ -507,6 +507,7 @@ static int ht16k33_led_probe(struct device *dev, struct led_classdev *led,
led->max_brightness = MAX_BRIGHTNESS;
err = devm_led_classdev_register_ext(dev, led, &init_data);
fwnode_handle_put(init_data.fwnode);
if (err)
dev_err(dev, "Failed to register LED\n");

11
drivers/base/devres.c
View File

@@ -892,9 +892,12 @@ void *devm_krealloc(struct device *dev, void *ptr, size_t new_size, gfp_t gfp)
/*
* Otherwise: allocate new, larger chunk. We need to allocate before
* taking the lock as most probably the caller uses GFP_KERNEL.
* alloc_dr() will call check_dr_size() to reserve extra memory
* for struct devres automatically, so size @new_size user request
* is delivered to it directly as devm_kmalloc() does.
*/
new_dr = alloc_dr(devm_kmalloc_release,
total_new_size, gfp, dev_to_node(dev));
new_size, gfp, dev_to_node(dev));
if (!new_dr)
return NULL;
@@ -1218,7 +1221,11 @@ EXPORT_SYMBOL_GPL(__devm_alloc_percpu);
*/
void devm_free_percpu(struct device *dev, void __percpu *pdata)
{
WARN_ON(devres_destroy(dev, devm_percpu_release, devm_percpu_match,
/*
* Use devres_release() to prevent memory leakage as
* devm_free_pages() does.
*/
WARN_ON(devres_release(dev, devm_percpu_release, devm_percpu_match,
(__force void *)pdata));
}
EXPORT_SYMBOL_GPL(devm_free_percpu);

35
drivers/block/rbd.c
View File

@@ -362,7 +362,7 @@ enum rbd_watch_state {
enum rbd_lock_state {
RBD_LOCK_STATE_UNLOCKED,
RBD_LOCK_STATE_LOCKED,
RBD_LOCK_STATE_RELEASING,
RBD_LOCK_STATE_QUIESCING,
};
/* WatchNotify::ClientId */
@@ -422,7 +422,7 @@ struct rbd_device {
struct list_head running_list;
struct completion acquire_wait;
int acquire_err;
struct completion releasing_wait;
struct completion quiescing_wait;
spinlock_t object_map_lock;
u8 *object_map;
@@ -525,7 +525,7 @@ static bool __rbd_is_lock_owner(struct rbd_device *rbd_dev)
lockdep_assert_held(&rbd_dev->lock_rwsem);
return rbd_dev->lock_state == RBD_LOCK_STATE_LOCKED ||
rbd_dev->lock_state == RBD_LOCK_STATE_RELEASING;
rbd_dev->lock_state == RBD_LOCK_STATE_QUIESCING;
}
static bool rbd_is_lock_owner(struct rbd_device *rbd_dev)
@@ -3458,13 +3458,14 @@ static void rbd_lock_del_request(struct rbd_img_request *img_req)
lockdep_assert_held(&rbd_dev->lock_rwsem);
spin_lock(&rbd_dev->lock_lists_lock);
if (!list_empty(&img_req->lock_item)) {
rbd_assert(!list_empty(&rbd_dev->running_list));
list_del_init(&img_req->lock_item);
need_wakeup = (rbd_dev->lock_state == RBD_LOCK_STATE_RELEASING &&
need_wakeup = (rbd_dev->lock_state == RBD_LOCK_STATE_QUIESCING &&
list_empty(&rbd_dev->running_list));
}
spin_unlock(&rbd_dev->lock_lists_lock);
if (need_wakeup)
complete(&rbd_dev->releasing_wait);
complete(&rbd_dev->quiescing_wait);
}
static int rbd_img_exclusive_lock(struct rbd_img_request *img_req)
@@ -3477,11 +3478,6 @@ static int rbd_img_exclusive_lock(struct rbd_img_request *img_req)
if (rbd_lock_add_request(img_req))
return 1;
if (rbd_dev->opts->exclusive) {
WARN_ON(1); /* lock got released? */
return -EROFS;
}
/*
* Note the use of mod_delayed_work() in rbd_acquire_lock()
* and cancel_delayed_work() in wake_lock_waiters().
@@ -4182,16 +4178,16 @@ static bool rbd_quiesce_lock(struct rbd_device *rbd_dev)
/*
* Ensure that all in-flight IO is flushed.
*/
rbd_dev->lock_state = RBD_LOCK_STATE_RELEASING;
rbd_assert(!completion_done(&rbd_dev->releasing_wait));
rbd_dev->lock_state = RBD_LOCK_STATE_QUIESCING;
rbd_assert(!completion_done(&rbd_dev->quiescing_wait));
if (list_empty(&rbd_dev->running_list))
return true;
up_write(&rbd_dev->lock_rwsem);
wait_for_completion(&rbd_dev->releasing_wait);
wait_for_completion(&rbd_dev->quiescing_wait);
down_write(&rbd_dev->lock_rwsem);
if (rbd_dev->lock_state != RBD_LOCK_STATE_RELEASING)
if (rbd_dev->lock_state != RBD_LOCK_STATE_QUIESCING)
return false;
rbd_assert(list_empty(&rbd_dev->running_list));
@@ -4602,6 +4598,10 @@ static void rbd_reacquire_lock(struct rbd_device *rbd_dev)
rbd_warn(rbd_dev, "failed to update lock cookie: %d",
ret);
if (rbd_dev->opts->exclusive)
rbd_warn(rbd_dev,
"temporarily releasing lock on exclusive mapping");
/*
* Lock cookie cannot be updated on older OSDs, so do
* a manual release and queue an acquire.
@@ -5383,7 +5383,7 @@ static struct rbd_device *__rbd_dev_create(struct rbd_spec *spec)
INIT_LIST_HEAD(&rbd_dev->acquiring_list);
INIT_LIST_HEAD(&rbd_dev->running_list);
init_completion(&rbd_dev->acquire_wait);
init_completion(&rbd_dev->releasing_wait);
init_completion(&rbd_dev->quiescing_wait);
spin_lock_init(&rbd_dev->object_map_lock);
@@ -6589,11 +6589,6 @@ static int rbd_add_acquire_lock(struct rbd_device *rbd_dev)
if (ret)
return ret;
/*
* The lock may have been released by now, unless automatic lock
* transitions are disabled.
*/
rbd_assert(!rbd_dev->opts->exclusive || rbd_is_lock_owner(rbd_dev));
return 0;
}

4
drivers/bluetooth/btusb.c
View File

@@ -545,6 +545,10 @@ static const struct usb_device_id blacklist_table[] = {
BTUSB_WIDEBAND_SPEECH },
{ USB_DEVICE(0x13d3, 0x3571), .driver_info = BTUSB_REALTEK |
BTUSB_WIDEBAND_SPEECH },
{ USB_DEVICE(0x13d3, 0x3591), .driver_info = BTUSB_REALTEK |
BTUSB_WIDEBAND_SPEECH },
{ USB_DEVICE(0x0489, 0xe125), .driver_info = BTUSB_REALTEK |
BTUSB_WIDEBAND_SPEECH },
/* Realtek Bluetooth devices */
{ USB_VENDOR_AND_INTERFACE_INFO(0x0bda, 0xe0, 0x01, 0x01),

4
drivers/char/hw_random/amd-rng.c
View File

@@ -142,8 +142,10 @@ static int __init amd_rng_mod_init(void)
found:
err = pci_read_config_dword(pdev, 0x58, &pmbase);
if (err)
if (err) {
err = pcibios_err_to_errno(err);
goto put_dev;
}
pmbase &= 0x0000FF00;
if (pmbase == 0) {

2
drivers/char/tpm/eventlog/common.c
View File

@@ -47,6 +47,8 @@ static int tpm_bios_measurements_open(struct inode *inode,
if (!err) {
seq = file->private_data;
seq->private = chip;
} else {
put_device(&chip->dev);
}
return err;

9
drivers/clk/clk-en7523.c
View File

@@ -41,6 +41,7 @@ struct en_clk_desc {
u8 div_shift;
u16 div_val0;
u8 div_step;
u8 div_offset;
};
struct en_clk_gate {
@@ -68,6 +69,7 @@ static const struct en_clk_desc en7523_base_clks[] = {
.div_bits = 3,
.div_shift = 0,
.div_step = 1,
.div_offset = 1,
}, {
.id = EN7523_CLK_EMI,
.name = "emi",
@@ -81,6 +83,7 @@ static const struct en_clk_desc en7523_base_clks[] = {
.div_bits = 3,
.div_shift = 0,
.div_step = 1,
.div_offset = 1,
}, {
.id = EN7523_CLK_BUS,
.name = "bus",
@@ -94,6 +97,7 @@ static const struct en_clk_desc en7523_base_clks[] = {
.div_bits = 3,
.div_shift = 0,
.div_step = 1,
.div_offset = 1,
}, {
.id = EN7523_CLK_SLIC,
.name = "slic",
@@ -134,13 +138,14 @@ static const struct en_clk_desc en7523_base_clks[] = {
.div_bits = 3,
.div_shift = 0,
.div_step = 1,
.div_offset = 1,
}, {
.id = EN7523_CLK_CRYPTO,
.name = "crypto",
.base_reg = REG_CRYPTO_CLKSRC,
.base_bits = 1,
.base_shift = 8,
.base_shift = 0,
.base_values = emi_base,
.n_base_values = ARRAY_SIZE(emi_base),
}
@@ -185,7 +190,7 @@ static u32 en7523_get_div(void __iomem *base, int i)
if (!val && desc->div_val0)
return desc->div_val0;
return (val + 1) * desc->div_step;
return (val + desc->div_offset) * desc->div_step;
}
static int en7523_pci_is_enabled(struct clk_hw *hw)

4
drivers/clk/davinci/da8xx-cfgchip.c
View File

@@ -505,7 +505,7 @@ da8xx_cfgchip_register_usb0_clk48(struct device *dev,
const char * const parent_names[] = { "usb_refclkin", "pll0_auxclk" };
struct clk *fck_clk;
struct da8xx_usb0_clk48 *usb0;
struct clk_init_data init;
struct clk_init_data init = {};
int ret;
fck_clk = devm_clk_get(dev, "fck");
@@ -579,7 +579,7 @@ da8xx_cfgchip_register_usb1_clk48(struct device *dev,
{
const char * const parent_names[] = { "usb0_clk48", "usb_refclkin" };
struct da8xx_usb1_clk48 *usb1;
struct clk_init_data init;
struct clk_init_data init = {};
int ret;
usb1 = devm_kzalloc(dev, sizeof(*usb1), GFP_KERNEL);

5
drivers/clk/qcom/camcc-sc7280.c
View File

@@ -2260,6 +2260,7 @@ static struct gdsc cam_cc_bps_gdsc = {
.name = "cam_cc_bps_gdsc",
},
.pwrsts = PWRSTS_OFF_ON,
.parent = &cam_cc_titan_top_gdsc.pd,
.flags = HW_CTRL | RETAIN_FF_ENABLE,
};
@@ -2269,6 +2270,7 @@ static struct gdsc cam_cc_ife_0_gdsc = {
.name = "cam_cc_ife_0_gdsc",
},
.pwrsts = PWRSTS_OFF_ON,
.parent = &cam_cc_titan_top_gdsc.pd,
.flags = RETAIN_FF_ENABLE,
};
@@ -2278,6 +2280,7 @@ static struct gdsc cam_cc_ife_1_gdsc = {
.name = "cam_cc_ife_1_gdsc",
},
.pwrsts = PWRSTS_OFF_ON,
.parent = &cam_cc_titan_top_gdsc.pd,
.flags = RETAIN_FF_ENABLE,
};
@@ -2287,6 +2290,7 @@ static struct gdsc cam_cc_ife_2_gdsc = {
.name = "cam_cc_ife_2_gdsc",
},
.pwrsts = PWRSTS_OFF_ON,
.parent = &cam_cc_titan_top_gdsc.pd,
.flags = RETAIN_FF_ENABLE,
};
@@ -2296,6 +2300,7 @@ static struct gdsc cam_cc_ipe_0_gdsc = {
.name = "cam_cc_ipe_0_gdsc",
},
.pwrsts = PWRSTS_OFF_ON,
.parent = &cam_cc_titan_top_gdsc.pd,
.flags = HW_CTRL | RETAIN_FF_ENABLE,
};

26
drivers/clk/qcom/clk-branch.h
View File

@@ -37,6 +37,32 @@ struct clk_branch {
struct clk_regmap clkr;
};
/* Branch clock common bits for HLOS-owned clocks */
#define CBCR_FORCE_MEM_CORE_ON BIT(14)
#define CBCR_FORCE_MEM_PERIPH_ON BIT(13)
#define CBCR_FORCE_MEM_PERIPH_OFF BIT(12)
static inline void qcom_branch_set_force_mem_core(struct regmap *regmap,
struct clk_branch clk, bool on)
{
regmap_update_bits(regmap, clk.halt_reg, CBCR_FORCE_MEM_CORE_ON,
on ? CBCR_FORCE_MEM_CORE_ON : 0);
}
static inline void qcom_branch_set_force_periph_on(struct regmap *regmap,
struct clk_branch clk, bool on)
{
regmap_update_bits(regmap, clk.halt_reg, CBCR_FORCE_MEM_PERIPH_ON,
on ? CBCR_FORCE_MEM_PERIPH_ON : 0);
}
static inline void qcom_branch_set_force_periph_off(struct regmap *regmap,
struct clk_branch clk, bool on)
{
regmap_update_bits(regmap, clk.halt_reg, CBCR_FORCE_MEM_PERIPH_OFF,
on ? CBCR_FORCE_MEM_PERIPH_OFF : 0);
}
extern const struct clk_ops clk_branch_ops;
extern const struct clk_ops clk_branch2_ops;
extern const struct clk_ops clk_branch_simple_ops;

32
drivers/clk/qcom/clk-rcg2.c
View File

@@ -1136,7 +1136,39 @@ clk_rcg2_shared_recalc_rate(struct clk_hw *hw, unsigned long parent_rate)
return clk_rcg2_recalc_rate(hw, parent_rate);
}
static int clk_rcg2_shared_init(struct clk_hw *hw)
{
/*
* This does a few things:
*
* 1. Sets rcg->parked_cfg to reflect the value at probe so that the
* proper parent is reported from clk_rcg2_shared_get_parent().
*
* 2. Clears the force enable bit of the RCG because we rely on child
* clks (branches) to turn the RCG on/off with a hardware feedback
* mechanism and only set the force enable bit in the RCG when we
* want to make sure the clk stays on for parent switches or
* parking.
*
* 3. Parks shared RCGs on the safe source at registration because we
* can't be certain that the parent clk will stay on during boot,
* especially if the parent is shared. If this RCG is enabled at
* boot, and the parent is turned off, the RCG will get stuck on. A
* GDSC can wedge if is turned on and the RCG is stuck on because
* the GDSC's controller will hang waiting for the clk status to
* toggle on when it never does.
*
* The safest option here is to "park" the RCG at init so that the clk
* can never get stuck on or off. This ensures the GDSC can't get
* wedged.
*/
clk_rcg2_shared_disable(hw);
return 0;
}
const struct clk_ops clk_rcg2_shared_ops = {
.init = clk_rcg2_shared_init,
.enable = clk_rcg2_shared_enable,
.disable = clk_rcg2_shared_disable,
.get_parent = clk_rcg2_shared_get_parent,

3
drivers/clk/qcom/gcc-sc7280.c
View File

@@ -3469,6 +3469,9 @@ static int gcc_sc7280_probe(struct platform_device *pdev)
regmap_update_bits(regmap, 0x71004, BIT(0), BIT(0));
regmap_update_bits(regmap, 0x7100C, BIT(13), BIT(13));
/* FORCE_MEM_CORE_ON for ufs phy ice core clocks */
qcom_branch_set_force_mem_core(regmap, gcc_ufs_phy_ice_core_clk, true);
ret = qcom_cc_register_rcg_dfs(regmap, gcc_dfs_clocks,
ARRAY_SIZE(gcc_dfs_clocks));
if (ret)

5
drivers/clk/qcom/gpucc-sm8350.c
View File

@@ -2,6 +2,7 @@
/*
* Copyright (c) 2019-2020, The Linux Foundation. All rights reserved.
* Copyright (c) 2022, Linaro Limited
* Copyright (c) 2024, Qualcomm Innovation Center, Inc. All rights reserved.
*/
#include <linux/clk.h>
@@ -147,7 +148,7 @@ static struct clk_rcg2 gpu_cc_gmu_clk_src = {
.parent_data = gpu_cc_parent_data_0,
.num_parents = ARRAY_SIZE(gpu_cc_parent_data_0),
.flags = CLK_SET_RATE_PARENT,
.ops = &clk_rcg2_ops,
.ops = &clk_rcg2_shared_ops,
},
};
@@ -169,7 +170,7 @@ static struct clk_rcg2 gpu_cc_hub_clk_src = {
.parent_data = gpu_cc_parent_data_1,
.num_parents = ARRAY_SIZE(gpu_cc_parent_data_1),
.flags = CLK_SET_RATE_PARENT,
.ops = &clk_rcg2_ops,
.ops = &clk_rcg2_shared_ops,
},
};

2
drivers/cpufreq/ti-cpufreq.c
View File

@@ -381,7 +381,7 @@ static int ti_cpufreq_probe(struct platform_device *pdev)
ret = dev_pm_opp_set_config(opp_data->cpu_dev, &config);
if (ret < 0) {
dev_err(opp_data->cpu_dev, "Failed to set OPP config\n");
dev_err_probe(opp_data->cpu_dev, ret, "Failed to set OPP config\n");
goto fail_put_node;
}

6
drivers/crypto/qat/qat_common/adf_cfg.c
View File

@@ -276,17 +276,19 @@ int adf_cfg_add_key_value_param(struct adf_accel_dev *accel_dev,
* 3. if the key exists with the same value, then return without doing
* anything (the newly created key_val is freed).
*/
down_write(&cfg->lock);
if (!adf_cfg_key_val_get(accel_dev, section_name, key, temp_val)) {
if (strncmp(temp_val, key_val->val, sizeof(temp_val))) {
adf_cfg_keyval_remove(key, section);
} else {
kfree(key_val);
return 0;
goto out;
}
}
down_write(&cfg->lock);
adf_cfg_keyval_add(key_val, section);
out:
up_write(&cfg->lock);
return 0;
}

4
drivers/dma/ti/k3-udma.c
View File

@@ -4423,7 +4423,9 @@ static int udma_get_mmrs(struct platform_device *pdev, struct udma_dev *ud)
ud->rchan_cnt = UDMA_CAP2_RCHAN_CNT(cap2);
break;
case DMA_TYPE_BCDMA:
ud->bchan_cnt = BCDMA_CAP2_BCHAN_CNT(cap2);
ud->bchan_cnt = BCDMA_CAP2_BCHAN_CNT(cap2) +
BCDMA_CAP3_HBCHAN_CNT(cap3) +
BCDMA_CAP3_UBCHAN_CNT(cap3);
ud->tchan_cnt = BCDMA_CAP2_TCHAN_CNT(cap2);
ud->rchan_cnt = BCDMA_CAP2_RCHAN_CNT(cap2);
ud->rflow_cnt = ud->rchan_cnt;

10
drivers/edac/Makefile
View File

@@ -54,11 +54,13 @@ obj-$(CONFIG_EDAC_MPC85XX) += mpc85xx_edac_mod.o
layerscape_edac_mod-y := fsl_ddr_edac.o layerscape_edac.o
obj-$(CONFIG_EDAC_LAYERSCAPE) += layerscape_edac_mod.o
skx_edac-y := skx_common.o skx_base.o
obj-$(CONFIG_EDAC_SKX) += skx_edac.o
skx_edac_common-y := skx_common.o
i10nm_edac-y := skx_common.o i10nm_base.o
obj-$(CONFIG_EDAC_I10NM) += i10nm_edac.o
skx_edac-y := skx_base.o
obj-$(CONFIG_EDAC_SKX) += skx_edac.o skx_edac_common.o
i10nm_edac-y := i10nm_base.o
obj-$(CONFIG_EDAC_I10NM) += i10nm_edac.o skx_edac_common.o
obj-$(CONFIG_EDAC_CELL) += cell_edac.o
obj-$(CONFIG_EDAC_PPC4XX) += ppc4xx_edac.o

21
drivers/edac/skx_common.c
View File

@@ -48,7 +48,7 @@ static u64 skx_tolm, skx_tohm;
static LIST_HEAD(dev_edac_list);
static bool skx_mem_cfg_2lm;
int __init skx_adxl_get(void)
int skx_adxl_get(void)
{
const char * const *names;
int i, j;
@@ -110,12 +110,14 @@ err:
return -ENODEV;
}
EXPORT_SYMBOL_GPL(skx_adxl_get);
void __exit skx_adxl_put(void)
void skx_adxl_put(void)
{
kfree(adxl_values);
kfree(adxl_msg);
}
EXPORT_SYMBOL_GPL(skx_adxl_put);
static bool skx_adxl_decode(struct decoded_addr *res, bool error_in_1st_level_mem)
{
@@ -187,12 +189,14 @@ void skx_set_mem_cfg(bool mem_cfg_2lm)
{
skx_mem_cfg_2lm = mem_cfg_2lm;
}
EXPORT_SYMBOL_GPL(skx_set_mem_cfg);
void skx_set_decode(skx_decode_f decode, skx_show_retry_log_f show_retry_log)
{
driver_decode = decode;
skx_show_retry_rd_err_log = show_retry_log;
}
EXPORT_SYMBOL_GPL(skx_set_decode);
int skx_get_src_id(struct skx_dev *d, int off, u8 *id)
{
@@ -206,6 +210,7 @@ int skx_get_src_id(struct skx_dev *d, int off, u8 *id)
*id = GET_BITFIELD(reg, 12, 14);
return 0;
}
EXPORT_SYMBOL_GPL(skx_get_src_id);
int skx_get_node_id(struct skx_dev *d, u8 *id)
{
@@ -219,6 +224,7 @@ int skx_get_node_id(struct skx_dev *d, u8 *id)
*id = GET_BITFIELD(reg, 0, 2);
return 0;
}
EXPORT_SYMBOL_GPL(skx_get_node_id);
static int get_width(u32 mtr)
{
@@ -284,6 +290,7 @@ int skx_get_all_bus_mappings(struct res_config *cfg, struct list_head **list)
*list = &dev_edac_list;
return ndev;
}
EXPORT_SYMBOL_GPL(skx_get_all_bus_mappings);
int skx_get_hi_lo(unsigned int did, int off[], u64 *tolm, u64 *tohm)
{
@@ -323,6 +330,7 @@ fail:
pci_dev_put(pdev);
return -ENODEV;
}
EXPORT_SYMBOL_GPL(skx_get_hi_lo);
static int skx_get_dimm_attr(u32 reg, int lobit, int hibit, int add,
int minval, int maxval, const char *name)
@@ -394,6 +402,7 @@ int skx_get_dimm_info(u32 mtr, u32 mcmtr, u32 amap, struct dimm_info *dimm,
return 1;
}
EXPORT_SYMBOL_GPL(skx_get_dimm_info);
int skx_get_nvdimm_info(struct dimm_info *dimm, struct skx_imc *imc,
int chan, int dimmno, const char *mod_str)
@@ -442,6 +451,7 @@ unknown_size:
return (size == 0 || size == ~0ull) ? 0 : 1;
}
EXPORT_SYMBOL_GPL(skx_get_nvdimm_info);
int skx_register_mci(struct skx_imc *imc, struct pci_dev *pdev,
const char *ctl_name, const char *mod_str,
@@ -512,6 +522,7 @@ fail0:
imc->mci = NULL;
return rc;
}
EXPORT_SYMBOL_GPL(skx_register_mci);
static void skx_unregister_mci(struct skx_imc *imc)
{
@@ -694,6 +705,7 @@ int skx_mce_check_error(struct notifier_block *nb, unsigned long val,
mce->kflags |= MCE_HANDLED_EDAC;
return NOTIFY_DONE;
}
EXPORT_SYMBOL_GPL(skx_mce_check_error);
void skx_remove(void)
{
@@ -731,3 +743,8 @@ void skx_remove(void)
kfree(d);
}
}
EXPORT_SYMBOL_GPL(skx_remove);
MODULE_LICENSE("GPL v2");
MODULE_AUTHOR("Tony Luck");
MODULE_DESCRIPTION("MC Driver for Intel server processors");

4
drivers/edac/skx_common.h
View File

@@ -178,8 +178,8 @@ typedef int (*get_dimm_config_f)(struct mem_ctl_info *mci,
typedef bool (*skx_decode_f)(struct decoded_addr *res);
typedef void (*skx_show_retry_log_f)(struct decoded_addr *res, char *msg, int len, bool scrub_err);
int __init skx_adxl_get(void);
void __exit skx_adxl_put(void);
int skx_adxl_get(void);
void skx_adxl_put(void);
void skx_set_decode(skx_decode_f decode, skx_show_retry_log_f show_retry_log);
void skx_set_mem_cfg(bool mem_cfg_2lm);

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