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pinctrl: remove offset and pin_base from pinctrl [1/4]

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PD#157965: pinctrl: remove offset and pin_base from pinctrl

porting from the upstream v4.15-rc2, commits as follows:

commit 634e40b0c2
commit 70e5ecb1b9
commit 40833a84fa
commit 6affd6981c

Change-Id: Ia856617fc202589199a9fc47664886a25779e8a0
Signed-off-by: Xingyu Chen <xingyu.chen@amlogic.com>
This commit is contained in:
Xingyu Chen
2017-12-13 20:05:49 +08:00
committed by Jianxin Pan
parent 690d31cb33
commit fd584a422c
6 changed files with 1834 additions and 1900 deletions
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1474
drivers/amlogic/pinctrl/pinctrl-meson-txlx.c
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File diff suppressed because it is too large Load Diff

101
drivers/amlogic/pinctrl/pinctrl-meson.c
View File

@@ -95,33 +95,6 @@ static int meson_get_bank(struct meson_domain *domain, unsigned int pin,
return -EINVAL;
}
/**
* meson_get_domain_and_bank() - find domain and bank containing a given pin
*
* @pc: Meson pin controller device
* @pin: the pin number
* @domain: the found domain
* @bank: the found bank
*
* Return: 0 on success, a negative value on error
*/
static int meson_get_domain_and_bank(struct meson_pinctrl *pc, unsigned int pin,
struct meson_domain **domain,
struct meson_bank **bank)
{
struct meson_domain *d;
d = pc->domain;
if (pin >= d->data->pin_base &&
pin < d->data->pin_base + d->data->num_pins) {
*domain = d;
return meson_get_bank(d, pin, bank);
}
return -EINVAL;
}
/**
* meson_calc_reg_and_bit() - calculate register and bit for a pin
*
@@ -421,14 +394,14 @@ static int meson_pinconf_set(struct pinctrl_dev *pcdev, unsigned int pin,
unsigned long *configs, unsigned int num_configs)
{
struct meson_pinctrl *pc = pinctrl_dev_get_drvdata(pcdev);
struct meson_domain *domain;
struct meson_domain *domain = pc->domain;
struct meson_bank *bank;
enum pin_config_param param;
unsigned int reg, bit;
int i, ret;
u16 arg;
ret = meson_get_domain_and_bank(pc, pin, &domain, &bank);
ret = meson_get_bank(domain, pin, &bank);
if (ret)
return ret;
@@ -499,12 +472,12 @@ static int meson_pinconf_set(struct pinctrl_dev *pcdev, unsigned int pin,
static int meson_pinconf_get_pull(struct meson_pinctrl *pc, unsigned int pin)
{
struct meson_domain *domain;
struct meson_domain *domain = pc->domain;
struct meson_bank *bank;
unsigned int reg, bit, val;
int ret, conf;
ret = meson_get_domain_and_bank(pc, pin, &domain, &bank);
ret = meson_get_bank(domain, pin, &bank);
if (ret)
return ret;
@@ -587,32 +560,18 @@ static inline struct meson_domain *to_meson_domain(struct gpio_chip *chip)
{
return container_of(chip, struct meson_domain, chip);
}
static int meson_gpio_request(struct gpio_chip *chip, unsigned int gpio)
{
return pinctrl_request_gpio(chip->base + gpio);
}
static void meson_gpio_free(struct gpio_chip *chip, unsigned int gpio)
{
struct meson_domain *domain = to_meson_domain(chip);
pinctrl_free_gpio(domain->data->pin_base + gpio);
}
static int meson_gpio_direction_input(struct gpio_chip *chip, unsigned int gpio)
{
struct meson_domain *domain = to_meson_domain(chip);
unsigned int reg, bit, pin;
unsigned int reg, bit;
struct meson_bank *bank;
int ret;
pin = domain->data->pin_base + gpio;
ret = meson_get_bank(domain, pin, &bank);
ret = meson_get_bank(domain, gpio, &bank);
if (ret)
return ret;
meson_calc_reg_and_bit(bank, pin, REG_DIR, &reg, &bit);
meson_calc_reg_and_bit(bank, gpio, REG_DIR, &reg, &bit);
return regmap_update_bits(domain->reg_gpio, reg, BIT(bit), BIT(bit));
}
@@ -621,21 +580,20 @@ static int meson_gpio_direction_output(struct gpio_chip *chip,
unsigned int gpio, int value)
{
struct meson_domain *domain = to_meson_domain(chip);
unsigned int reg, bit, pin;
unsigned int reg, bit;
struct meson_bank *bank;
int ret;
pin = domain->data->pin_base + gpio;
ret = meson_get_bank(domain, pin, &bank);
ret = meson_get_bank(domain, gpio, &bank);
if (ret)
return ret;
meson_calc_reg_and_bit(bank, pin, REG_DIR, &reg, &bit);
meson_calc_reg_and_bit(bank, gpio, REG_DIR, &reg, &bit);
ret = regmap_update_bits(domain->reg_gpio, reg, BIT(bit), 0);
if (ret)
return ret;
meson_calc_reg_and_bit(bank, pin, REG_OUT, &reg, &bit);
meson_calc_reg_and_bit(bank, gpio, REG_OUT, &reg, &bit);
return regmap_update_bits(domain->reg_gpio, reg, BIT(bit),
value ? BIT(bit) : 0);
}
@@ -644,16 +602,15 @@ static void meson_gpio_set(struct gpio_chip *chip, unsigned int gpio,
int value)
{
struct meson_domain *domain = to_meson_domain(chip);
unsigned int reg, bit, pin;
unsigned int reg, bit;
struct meson_bank *bank;
int ret;
pin = domain->data->pin_base + gpio;
ret = meson_get_bank(domain, pin, &bank);
ret = meson_get_bank(domain, gpio, &bank);
if (ret)
return;
meson_calc_reg_and_bit(bank, pin, REG_OUT, &reg, &bit);
meson_calc_reg_and_bit(bank, gpio, REG_OUT, &reg, &bit);
regmap_update_bits(domain->reg_gpio, reg, BIT(bit),
value ? BIT(bit) : 0);
}
@@ -662,7 +619,7 @@ static int meson_gpio_pull_set(struct gpio_chip *chip, unsigned int gpio,
int value)
{
struct meson_domain *domain = to_meson_domain(chip);
unsigned int reg, bit, pin;
unsigned int reg, bit;
struct meson_bank *bank;
int ret;
@@ -670,12 +627,11 @@ static int meson_gpio_pull_set(struct gpio_chip *chip, unsigned int gpio,
&& (value != GPIOD_PULL_UP))
return -EINVAL;
pin = domain->data->pin_base + gpio;
ret = meson_get_bank(domain, pin, &bank);
ret = meson_get_bank(domain, gpio, &bank);
if (ret)
return ret;
meson_calc_reg_and_bit(bank, pin, REG_PULLEN,
meson_calc_reg_and_bit(bank, gpio, REG_PULLEN,
&reg, &bit);
ret = regmap_update_bits(domain->reg_pullen, reg,
BIT(bit),
@@ -683,7 +639,7 @@ static int meson_gpio_pull_set(struct gpio_chip *chip, unsigned int gpio,
if (ret)
return ret;
meson_calc_reg_and_bit(bank, pin, REG_PULL, &reg, &bit);
meson_calc_reg_and_bit(bank, gpio, REG_PULL, &reg, &bit);
ret = regmap_update_bits(domain->reg_pull, reg,
BIT(bit),
(value == GPIOD_PULL_DOWN) ? 0 : BIT(bit));
@@ -696,30 +652,26 @@ static int meson_gpio_pull_set(struct gpio_chip *chip, unsigned int gpio,
static int meson_gpio_get(struct gpio_chip *chip, unsigned int gpio)
{
struct meson_domain *domain = to_meson_domain(chip);
unsigned int reg, bit, val, pin;
unsigned int reg, bit, val;
struct meson_bank *bank;
int ret;
pin = domain->data->pin_base + gpio;
ret = meson_get_bank(domain, pin, &bank);
ret = meson_get_bank(domain, gpio, &bank);
if (ret)
return ret;
meson_calc_reg_and_bit(bank, pin, REG_IN, &reg, &bit);
meson_calc_reg_and_bit(bank, gpio, REG_IN, &reg, &bit);
regmap_read(domain->reg_gpio, reg, &val);
return !!(val & BIT(bit));
}
static int meson_gpio_to_irq(struct gpio_chip *chip, unsigned int offset)
static int meson_gpio_to_irq(struct gpio_chip *chip, unsigned int gpio)
{
struct meson_domain *domain = to_meson_domain(chip);
struct meson_bank *bank;
struct irq_fwspec fwspec;
int hwirq;
int gpio;
gpio = chip->base + offset;
if (meson_get_bank(domain, gpio, &bank))
return -EINVAL;
@@ -840,15 +792,15 @@ static int meson_gpiolib_register(struct meson_pinctrl *pc)
domain->chip.label = domain->data->name;
/* domain->chip.dev = pc->dev; */
domain->chip.parent = pc->dev;
domain->chip.request = meson_gpio_request;
domain->chip.free = meson_gpio_free;
domain->chip.request = gpiochip_generic_request;
domain->chip.free = gpiochip_generic_free;
domain->chip.direction_input = meson_gpio_direction_input;
domain->chip.direction_output = meson_gpio_direction_output;
domain->chip.get = meson_gpio_get;
domain->chip.set = meson_gpio_set;
domain->chip.to_irq = meson_gpio_to_irq;
domain->chip.set_pull = meson_gpio_pull_set;
domain->chip.base = domain->data->pin_base;
domain->chip.base = -1;
domain->chip.ngpio = domain->data->num_pins;
domain->chip.can_sleep = false;
domain->chip.of_node = domain->of_node;
@@ -862,8 +814,7 @@ static int meson_gpiolib_register(struct meson_pinctrl *pc)
}
ret = gpiochip_add_pin_range(&domain->chip, dev_name(pc->dev),
0, domain->data->pin_base,
domain->chip.ngpio);
0, 0, domain->chip.ngpio);
if (ret) {
dev_err(pc->dev, "can't add pin range\n");
goto fail;

9
drivers/amlogic/pinctrl/pinctrl-meson.h
View File

@@ -112,7 +112,7 @@ struct meson_domain_data {
const char *name;
struct meson_bank *banks;
unsigned int num_banks;
unsigned int pin_base;
unsigned int num_pins;
};
@@ -195,10 +195,9 @@ enum PINMUX_TYPE {
#define CMD_TEST_N_DIR 0x82000046
#define TEST_N_OUTPUT 1
#define PIN(x, b) (b + x)
#define MESON_MUX_V2_MASK(x) (0xf << x)
#define MESON_MUX_V2_VAL(y, x) ((y & 0xf) << x)
#define MESON_PIN(x, b) PINCTRL_PIN(PIN(x, b), #x)
#define MESON_PIN(x) PINCTRL_PIN(x, #x)
#define GROUP(grp, r, b) \
{ \
@@ -209,10 +208,10 @@ enum PINMUX_TYPE {
.bit = b, \
}
#define GPIO_GROUP(gpio, b) \
#define GPIO_GROUP(gpio) \
{ \
.name = #gpio, \
.pins = (const unsigned int[]){ PIN(gpio, b) }, \
.pins = (const unsigned int[]){ gpio }, \
.num_pins = 1, \
.is_gpio = true, \
}

744
drivers/amlogic/pinctrl/pinctrl-meson8b.c
View File

@@ -18,410 +18,408 @@
#include <dt-bindings/gpio/meson8b-gpio.h>
#include "pinctrl-meson.h"
#define EE_OFF 14
static const struct pinctrl_pin_desc meson8b_cbus_pins[] = {
MESON_PIN(GPIOX_0, EE_OFF),
MESON_PIN(GPIOX_1, EE_OFF),
MESON_PIN(GPIOX_2, EE_OFF),
MESON_PIN(GPIOX_3, EE_OFF),
MESON_PIN(GPIOX_4, EE_OFF),
MESON_PIN(GPIOX_5, EE_OFF),
MESON_PIN(GPIOX_6, EE_OFF),
MESON_PIN(GPIOX_7, EE_OFF),
MESON_PIN(GPIOX_8, EE_OFF),
MESON_PIN(GPIOX_9, EE_OFF),
MESON_PIN(GPIOX_10, EE_OFF),
MESON_PIN(GPIOX_11, EE_OFF),
MESON_PIN(GPIOX_16, EE_OFF),
MESON_PIN(GPIOX_17, EE_OFF),
MESON_PIN(GPIOX_18, EE_OFF),
MESON_PIN(GPIOX_19, EE_OFF),
MESON_PIN(GPIOX_20, EE_OFF),
MESON_PIN(GPIOX_21, EE_OFF),
MESON_PIN(GPIOX_0),
MESON_PIN(GPIOX_1),
MESON_PIN(GPIOX_2),
MESON_PIN(GPIOX_3),
MESON_PIN(GPIOX_4),
MESON_PIN(GPIOX_5),
MESON_PIN(GPIOX_6),
MESON_PIN(GPIOX_7),
MESON_PIN(GPIOX_8),
MESON_PIN(GPIOX_9),
MESON_PIN(GPIOX_10),
MESON_PIN(GPIOX_11),
MESON_PIN(GPIOX_16),
MESON_PIN(GPIOX_17),
MESON_PIN(GPIOX_18),
MESON_PIN(GPIOX_19),
MESON_PIN(GPIOX_20),
MESON_PIN(GPIOX_21),
MESON_PIN(GPIOY_0, EE_OFF),
MESON_PIN(GPIOY_1, EE_OFF),
MESON_PIN(GPIOY_3, EE_OFF),
MESON_PIN(GPIOY_6, EE_OFF),
MESON_PIN(GPIOY_7, EE_OFF),
MESON_PIN(GPIOY_8, EE_OFF),
MESON_PIN(GPIOY_9, EE_OFF),
MESON_PIN(GPIOY_10, EE_OFF),
MESON_PIN(GPIOY_11, EE_OFF),
MESON_PIN(GPIOY_12, EE_OFF),
MESON_PIN(GPIOY_13, EE_OFF),
MESON_PIN(GPIOY_14, EE_OFF),
MESON_PIN(GPIOY_0),
MESON_PIN(GPIOY_1),
MESON_PIN(GPIOY_3),
MESON_PIN(GPIOY_6),
MESON_PIN(GPIOY_7),
MESON_PIN(GPIOY_8),
MESON_PIN(GPIOY_9),
MESON_PIN(GPIOY_10),
MESON_PIN(GPIOY_11),
MESON_PIN(GPIOY_12),
MESON_PIN(GPIOY_13),
MESON_PIN(GPIOY_14),
MESON_PIN(GPIODV_9, EE_OFF),
MESON_PIN(GPIODV_24, EE_OFF),
MESON_PIN(GPIODV_25, EE_OFF),
MESON_PIN(GPIODV_26, EE_OFF),
MESON_PIN(GPIODV_27, EE_OFF),
MESON_PIN(GPIODV_28, EE_OFF),
MESON_PIN(GPIODV_29, EE_OFF),
MESON_PIN(GPIODV_9),
MESON_PIN(GPIODV_24),
MESON_PIN(GPIODV_25),
MESON_PIN(GPIODV_26),
MESON_PIN(GPIODV_27),
MESON_PIN(GPIODV_28),
MESON_PIN(GPIODV_29),
MESON_PIN(GPIOH_0, EE_OFF),
MESON_PIN(GPIOH_1, EE_OFF),
MESON_PIN(GPIOH_2, EE_OFF),
MESON_PIN(GPIOH_3, EE_OFF),
MESON_PIN(GPIOH_4, EE_OFF),
MESON_PIN(GPIOH_5, EE_OFF),
MESON_PIN(GPIOH_6, EE_OFF),
MESON_PIN(GPIOH_7, EE_OFF),
MESON_PIN(GPIOH_8, EE_OFF),
MESON_PIN(GPIOH_9, EE_OFF),
MESON_PIN(GPIOH_0),
MESON_PIN(GPIOH_1),
MESON_PIN(GPIOH_2),
MESON_PIN(GPIOH_3),
MESON_PIN(GPIOH_4),
MESON_PIN(GPIOH_5),
MESON_PIN(GPIOH_6),
MESON_PIN(GPIOH_7),
MESON_PIN(GPIOH_8),
MESON_PIN(GPIOH_9),
MESON_PIN(CARD_0, EE_OFF),
MESON_PIN(CARD_1, EE_OFF),
MESON_PIN(CARD_2, EE_OFF),
MESON_PIN(CARD_3, EE_OFF),
MESON_PIN(CARD_4, EE_OFF),
MESON_PIN(CARD_5, EE_OFF),
MESON_PIN(CARD_6, EE_OFF),
MESON_PIN(CARD_0),
MESON_PIN(CARD_1),
MESON_PIN(CARD_2),
MESON_PIN(CARD_3),
MESON_PIN(CARD_4),
MESON_PIN(CARD_5),
MESON_PIN(CARD_6),
MESON_PIN(BOOT_0, EE_OFF),
MESON_PIN(BOOT_1, EE_OFF),
MESON_PIN(BOOT_2, EE_OFF),
MESON_PIN(BOOT_3, EE_OFF),
MESON_PIN(BOOT_4, EE_OFF),
MESON_PIN(BOOT_5, EE_OFF),
MESON_PIN(BOOT_6, EE_OFF),
MESON_PIN(BOOT_7, EE_OFF),
MESON_PIN(BOOT_8, EE_OFF),
MESON_PIN(BOOT_9, EE_OFF),
MESON_PIN(BOOT_10, EE_OFF),
MESON_PIN(BOOT_11, EE_OFF),
MESON_PIN(BOOT_12, EE_OFF),
MESON_PIN(BOOT_13, EE_OFF),
MESON_PIN(BOOT_14, EE_OFF),
MESON_PIN(BOOT_15, EE_OFF),
MESON_PIN(BOOT_16, EE_OFF),
MESON_PIN(BOOT_17, EE_OFF),
MESON_PIN(BOOT_18, EE_OFF),
MESON_PIN(BOOT_0),
MESON_PIN(BOOT_1),
MESON_PIN(BOOT_2),
MESON_PIN(BOOT_3),
MESON_PIN(BOOT_4),
MESON_PIN(BOOT_5),
MESON_PIN(BOOT_6),
MESON_PIN(BOOT_7),
MESON_PIN(BOOT_8),
MESON_PIN(BOOT_9),
MESON_PIN(BOOT_10),
MESON_PIN(BOOT_11),
MESON_PIN(BOOT_12),
MESON_PIN(BOOT_13),
MESON_PIN(BOOT_14),
MESON_PIN(BOOT_15),
MESON_PIN(BOOT_16),
MESON_PIN(BOOT_17),
MESON_PIN(BOOT_18),
MESON_PIN(DIF_0_P, EE_OFF),
MESON_PIN(DIF_0_N, EE_OFF),
MESON_PIN(DIF_1_P, EE_OFF),
MESON_PIN(DIF_1_N, EE_OFF),
MESON_PIN(DIF_2_P, EE_OFF),
MESON_PIN(DIF_2_N, EE_OFF),
MESON_PIN(DIF_3_P, EE_OFF),
MESON_PIN(DIF_3_N, EE_OFF),
MESON_PIN(DIF_4_P, EE_OFF),
MESON_PIN(DIF_4_N, EE_OFF),
MESON_PIN(DIF_0_P),
MESON_PIN(DIF_0_N),
MESON_PIN(DIF_1_P),
MESON_PIN(DIF_1_N),
MESON_PIN(DIF_2_P),
MESON_PIN(DIF_2_N),
MESON_PIN(DIF_3_P),
MESON_PIN(DIF_3_N),
MESON_PIN(DIF_4_P),
MESON_PIN(DIF_4_N),
};
static const struct pinctrl_pin_desc meson8b_aobus_pins[] = {
MESON_PIN(GPIOAO_0, 0),
MESON_PIN(GPIOAO_1, 0),
MESON_PIN(GPIOAO_2, 0),
MESON_PIN(GPIOAO_3, 0),
MESON_PIN(GPIOAO_4, 0),
MESON_PIN(GPIOAO_5, 0),
MESON_PIN(GPIOAO_6, 0),
MESON_PIN(GPIOAO_7, 0),
MESON_PIN(GPIOAO_8, 0),
MESON_PIN(GPIOAO_9, 0),
MESON_PIN(GPIOAO_10, 0),
MESON_PIN(GPIOAO_11, 0),
MESON_PIN(GPIOAO_12, 0),
MESON_PIN(GPIOAO_13, 0),
MESON_PIN(GPIOAO_0),
MESON_PIN(GPIOAO_1),
MESON_PIN(GPIOAO_2),
MESON_PIN(GPIOAO_3),
MESON_PIN(GPIOAO_4),
MESON_PIN(GPIOAO_5),
MESON_PIN(GPIOAO_6),
MESON_PIN(GPIOAO_7),
MESON_PIN(GPIOAO_8),
MESON_PIN(GPIOAO_9),
MESON_PIN(GPIOAO_10),
MESON_PIN(GPIOAO_11),
MESON_PIN(GPIOAO_12),
MESON_PIN(GPIOAO_13),
};
/* bank X */
static const unsigned int sd_d0_a_pins[] = { PIN(GPIOX_0, EE_OFF) };
static const unsigned int sd_d1_a_pins[] = { PIN(GPIOX_1, EE_OFF) };
static const unsigned int sd_d2_a_pins[] = { PIN(GPIOX_2, EE_OFF) };
static const unsigned int sd_d3_a_pins[] = { PIN(GPIOX_3, EE_OFF) };
static const unsigned int sdxc_d0_0_a_pins[] = { PIN(GPIOX_4, EE_OFF) };
static const unsigned int sdxc_d47_a_pins[] = { PIN(GPIOX_4, EE_OFF),
PIN(GPIOX_5, EE_OFF), PIN(GPIOX_6, EE_OFF), PIN(GPIOX_7, EE_OFF) };
static const unsigned int sdxc_d13_0_a_pins[] = { PIN(GPIOX_5, EE_OFF),
PIN(GPIOX_6, EE_OFF), PIN(GPIOX_7, EE_OFF) };
static const unsigned int sd_clk_a_pins[] = { PIN(GPIOX_8, EE_OFF) };
static const unsigned int sd_cmd_a_pins[] = { PIN(GPIOX_9, EE_OFF) };
static const unsigned int xtal_32k_out_pins[] = { PIN(GPIOX_10, EE_OFF) };
static const unsigned int xtal_24m_out_pins[] = { PIN(GPIOX_11, EE_OFF) };
static const unsigned int uart_tx_b0_pins[] = { PIN(GPIOX_16, EE_OFF) };
static const unsigned int uart_rx_b0_pins[] = { PIN(GPIOX_17, EE_OFF) };
static const unsigned int uart_cts_b0_pins[] = { PIN(GPIOX_18, EE_OFF) };
static const unsigned int uart_rts_b0_pins[] = { PIN(GPIOX_19, EE_OFF) };
static const unsigned int sd_d0_a_pins[] = { GPIOX_0 };
static const unsigned int sd_d1_a_pins[] = { GPIOX_1 };
static const unsigned int sd_d2_a_pins[] = { GPIOX_2 };
static const unsigned int sd_d3_a_pins[] = { GPIOX_3 };
static const unsigned int sdxc_d0_0_a_pins[] = { GPIOX_4 };
static const unsigned int sdxc_d47_a_pins[] = { GPIOX_4,
GPIOX_5, GPIOX_6, GPIOX_7 };
static const unsigned int sdxc_d13_0_a_pins[] = { GPIOX_5,
GPIOX_6, GPIOX_7 };
static const unsigned int sd_clk_a_pins[] = { GPIOX_8 };
static const unsigned int sd_cmd_a_pins[] = { GPIOX_9 };
static const unsigned int xtal_32k_out_pins[] = { GPIOX_10 };
static const unsigned int xtal_24m_out_pins[] = { GPIOX_11 };
static const unsigned int uart_tx_b0_pins[] = { GPIOX_16 };
static const unsigned int uart_rx_b0_pins[] = { GPIOX_17 };
static const unsigned int uart_cts_b0_pins[] = { GPIOX_18 };
static const unsigned int uart_rts_b0_pins[] = { GPIOX_19 };
static const unsigned int sdxc_d0_1_a_pins[] = { PIN(GPIOX_0, EE_OFF) };
static const unsigned int sdxc_d13_1_a_pins[] = { PIN(GPIOX_1, EE_OFF),
PIN(GPIOX_2, EE_OFF), PIN(GPIOX_3, EE_OFF) };
static const unsigned int pcm_out_a_pins[] = { PIN(GPIOX_4, EE_OFF) };
static const unsigned int pcm_in_a_pins[] = { PIN(GPIOX_5, EE_OFF) };
static const unsigned int pcm_fs_a_pins[] = { PIN(GPIOX_6, EE_OFF) };
static const unsigned int pcm_clk_a_pins[] = { PIN(GPIOX_7, EE_OFF) };
static const unsigned int sdxc_clk_a_pins[] = { PIN(GPIOX_8, EE_OFF) };
static const unsigned int sdxc_cmd_a_pins[] = { PIN(GPIOX_9, EE_OFF) };
static const unsigned int pwm_vs_0_pins[] = { PIN(GPIOX_10, EE_OFF) };
static const unsigned int pwm_e_pins[] = { PIN(GPIOX_10, EE_OFF) };
static const unsigned int pwm_vs_1_pins[] = { PIN(GPIOX_11, EE_OFF) };
static const unsigned int sdxc_d0_1_a_pins[] = { GPIOX_0 };
static const unsigned int sdxc_d13_1_a_pins[] = { GPIOX_1,
GPIOX_2, GPIOX_3 };
static const unsigned int pcm_out_a_pins[] = { GPIOX_4 };
static const unsigned int pcm_in_a_pins[] = { GPIOX_5 };
static const unsigned int pcm_fs_a_pins[] = { GPIOX_6 };
static const unsigned int pcm_clk_a_pins[] = { GPIOX_7 };
static const unsigned int sdxc_clk_a_pins[] = { GPIOX_8 };
static const unsigned int sdxc_cmd_a_pins[] = { GPIOX_9 };
static const unsigned int pwm_vs_0_pins[] = { GPIOX_10 };
static const unsigned int pwm_e_pins[] = { GPIOX_10 };
static const unsigned int pwm_vs_1_pins[] = { GPIOX_11 };
static const unsigned int uart_tx_a_pins[] = { PIN(GPIOX_4, EE_OFF) };
static const unsigned int uart_rx_a_pins[] = { PIN(GPIOX_5, EE_OFF) };
static const unsigned int uart_cts_a_pins[] = { PIN(GPIOX_6, EE_OFF) };
static const unsigned int uart_rts_a_pins[] = { PIN(GPIOX_7, EE_OFF) };
static const unsigned int uart_tx_b1_pins[] = { PIN(GPIOX_8, EE_OFF) };
static const unsigned int uart_rx_b1_pins[] = { PIN(GPIOX_9, EE_OFF) };
static const unsigned int uart_cts_b1_pins[] = { PIN(GPIOX_10, EE_OFF) };
static const unsigned int uart_rts_b1_pins[] = { PIN(GPIOX_20, EE_OFF) };
static const unsigned int uart_tx_a_pins[] = { GPIOX_4 };
static const unsigned int uart_rx_a_pins[] = { GPIOX_5 };
static const unsigned int uart_cts_a_pins[] = { GPIOX_6 };
static const unsigned int uart_rts_a_pins[] = { GPIOX_7 };
static const unsigned int uart_tx_b1_pins[] = { GPIOX_8 };
static const unsigned int uart_rx_b1_pins[] = { GPIOX_9 };
static const unsigned int uart_cts_b1_pins[] = { GPIOX_10 };
static const unsigned int uart_rts_b1_pins[] = { GPIOX_20 };
static const unsigned int iso7816_0_clk_pins[] = { PIN(GPIOX_6, EE_OFF) };
static const unsigned int iso7816_0_data_pins[] = { PIN(GPIOX_7, EE_OFF) };
static const unsigned int spi_sclk_0_pins[] = { PIN(GPIOX_8, EE_OFF) };
static const unsigned int spi_miso_0_pins[] = { PIN(GPIOX_9, EE_OFF) };
static const unsigned int spi_mosi_0_pins[] = { PIN(GPIOX_10, EE_OFF) };
static const unsigned int iso7816_det_pins[] = { PIN(GPIOX_16, EE_OFF) };
static const unsigned int iso7816_reset_pins[] = { PIN(GPIOX_17, EE_OFF) };
static const unsigned int iso7816_1_clk_pins[] = { PIN(GPIOX_18, EE_OFF) };
static const unsigned int iso7816_1_data_pins[] = { PIN(GPIOX_19, EE_OFF) };
static const unsigned int spi_ss0_0_pins[] = { PIN(GPIOX_20, EE_OFF) };
static const unsigned int iso7816_0_clk_pins[] = { GPIOX_6 };
static const unsigned int iso7816_0_data_pins[] = { GPIOX_7 };
static const unsigned int spi_sclk_0_pins[] = { GPIOX_8 };
static const unsigned int spi_miso_0_pins[] = { GPIOX_9 };
static const unsigned int spi_mosi_0_pins[] = { GPIOX_10 };
static const unsigned int iso7816_det_pins[] = { GPIOX_16 };
static const unsigned int iso7816_reset_pins[] = { GPIOX_17 };
static const unsigned int iso7816_1_clk_pins[] = { GPIOX_18 };
static const unsigned int iso7816_1_data_pins[] = { GPIOX_19 };
static const unsigned int spi_ss0_0_pins[] = { GPIOX_20 };
static const unsigned int tsin_clk_b_pins[] = { PIN(GPIOX_8, EE_OFF) };
static const unsigned int tsin_sop_b_pins[] = { PIN(GPIOX_9, EE_OFF) };
static const unsigned int tsin_d0_b_pins[] = { PIN(GPIOX_10, EE_OFF) };
static const unsigned int pwm_b_pins[] = { PIN(GPIOX_11, EE_OFF) };
static const unsigned int i2c_sda_d0_pins[] = { PIN(GPIOX_16, EE_OFF) };
static const unsigned int i2c_sck_d0_pins[] = { PIN(GPIOX_17, EE_OFF) };
static const unsigned int tsin_d_valid_b_pins[] = { PIN(GPIOX_20, EE_OFF) };
static const unsigned int tsin_clk_b_pins[] = { GPIOX_8 };
static const unsigned int tsin_sop_b_pins[] = { GPIOX_9 };
static const unsigned int tsin_d0_b_pins[] = { GPIOX_10 };
static const unsigned int pwm_b_pins[] = { GPIOX_11 };
static const unsigned int i2c_sda_d0_pins[] = { GPIOX_16 };
static const unsigned int i2c_sck_d0_pins[] = { GPIOX_17 };
static const unsigned int tsin_d_valid_b_pins[] = { GPIOX_20 };
/* bank Y */
static const unsigned int tsin_d_valid_a_pins[] = { PIN(GPIOY_0, EE_OFF) };
static const unsigned int tsin_sop_a_pins[] = { PIN(GPIOY_1, EE_OFF) };
static const unsigned int tsin_d17_a_pins[] = { PIN(GPIOY_6, EE_OFF),
PIN(GPIOY_7, EE_OFF), PIN(GPIOY_10, EE_OFF), PIN(GPIOY_11, EE_OFF),
PIN(GPIOY_12, EE_OFF), PIN(GPIOY_13, EE_OFF), PIN(GPIOY_14, EE_OFF) };
static const unsigned int tsin_clk_a_pins[] = { PIN(GPIOY_8, EE_OFF) };
static const unsigned int tsin_d0_a_pins[] = { PIN(GPIOY_9, EE_OFF) };
static const unsigned int tsin_d_valid_a_pins[] = { GPIOY_0 };
static const unsigned int tsin_sop_a_pins[] = { GPIOY_1 };
static const unsigned int tsin_d17_a_pins[] = { GPIOY_6,
GPIOY_7, GPIOY_10, GPIOY_11,
GPIOY_12, GPIOY_13, GPIOY_14 };
static const unsigned int tsin_clk_a_pins[] = { GPIOY_8 };
static const unsigned int tsin_d0_a_pins[] = { GPIOY_9 };
static const unsigned int spdif_out_0_pins[] = { PIN(GPIOY_3, EE_OFF) };
static const unsigned int spdif_out_0_pins[] = { GPIOY_3 };
static const unsigned int xtal_24m_pins[] = { PIN(GPIOY_3, EE_OFF) };
static const unsigned int iso7816_2_clk_pins[] = { PIN(GPIOY_13, EE_OFF) };
static const unsigned int iso7816_2_data_pins[] = { PIN(GPIOY_14, EE_OFF) };
static const unsigned int xtal_24m_pins[] = { GPIOY_3 };
static const unsigned int iso7816_2_clk_pins[] = { GPIOY_13 };
static const unsigned int iso7816_2_data_pins[] = { GPIOY_14 };
/* bank DV */
static const unsigned int pwm_d_pins[] = { PIN(GPIODV_28, EE_OFF) };
static const unsigned int pwm_c0_pins[] = { PIN(GPIODV_29, EE_OFF) };
static const unsigned int pwm_d_pins[] = { GPIODV_28 };
static const unsigned int pwm_c0_pins[] = { GPIODV_29 };
static const unsigned int pwm_vs_2_pins[] = { PIN(GPIODV_9, EE_OFF) };
static const unsigned int pwm_vs_3_pins[] = { PIN(GPIODV_28, EE_OFF) };
static const unsigned int pwm_vs_4_pins[] = { PIN(GPIODV_29, EE_OFF) };
static const unsigned int pwm_vs_2_pins[] = { GPIODV_9 };
static const unsigned int pwm_vs_3_pins[] = { GPIODV_28 };
static const unsigned int pwm_vs_4_pins[] = { GPIODV_29 };
static const unsigned int xtal24_out_pins[] = { PIN(GPIODV_29, EE_OFF) };
static const unsigned int xtal24_out_pins[] = { GPIODV_29 };
static const unsigned int uart_tx_c_pins[] = { PIN(GPIODV_24, EE_OFF) };
static const unsigned int uart_rx_c_pins[] = { PIN(GPIODV_25, EE_OFF) };
static const unsigned int uart_cts_c_pins[] = { PIN(GPIODV_26, EE_OFF) };
static const unsigned int uart_rts_c_pins[] = { PIN(GPIODV_27, EE_OFF) };
static const unsigned int uart_tx_c_pins[] = { GPIODV_24 };
static const unsigned int uart_rx_c_pins[] = { GPIODV_25 };
static const unsigned int uart_cts_c_pins[] = { GPIODV_26 };
static const unsigned int uart_rts_c_pins[] = { GPIODV_27 };
static const unsigned int pwm_c1_pins[] = { PIN(GPIODV_9, EE_OFF) };
static const unsigned int pwm_c1_pins[] = { GPIODV_9 };
static const unsigned int i2c_sda_a_pins[] = { PIN(GPIODV_24, EE_OFF) };
static const unsigned int i2c_sck_a_pins[] = { PIN(GPIODV_25, EE_OFF) };
static const unsigned int i2c_sda_b0_pins[] = { PIN(GPIODV_26, EE_OFF) };
static const unsigned int i2c_sck_b0_pins[] = { PIN(GPIODV_27, EE_OFF) };
static const unsigned int i2c_sda_c0_pins[] = { PIN(GPIODV_28, EE_OFF) };
static const unsigned int i2c_sck_c0_pins[] = { PIN(GPIODV_29, EE_OFF) };
static const unsigned int i2c_sda_a_pins[] = { GPIODV_24 };
static const unsigned int i2c_sck_a_pins[] = { GPIODV_25 };
static const unsigned int i2c_sda_b0_pins[] = { GPIODV_26 };
static const unsigned int i2c_sck_b0_pins[] = { GPIODV_27 };
static const unsigned int i2c_sda_c0_pins[] = { GPIODV_28 };
static const unsigned int i2c_sck_c0_pins[] = { GPIODV_29 };
/* bank H */
static const unsigned int hdmi_hpd_pins[] = { PIN(GPIOH_0, EE_OFF) };
static const unsigned int hdmi_sda_pins[] = { PIN(GPIOH_1, EE_OFF) };
static const unsigned int hdmi_scl_pins[] = { PIN(GPIOH_2, EE_OFF) };
static const unsigned int hdmi_cec_0_pins[] = { PIN(GPIOH_3, EE_OFF) };
static const unsigned int eth_txd1_0_pins[] = { PIN(GPIOH_5, EE_OFF) };
static const unsigned int eth_txd0_0_pins[] = { PIN(GPIOH_6, EE_OFF) };
static const unsigned int clk_24m_out_pins[] = { PIN(GPIOH_9, EE_OFF) };
static const unsigned int hdmi_hpd_pins[] = { GPIOH_0 };
static const unsigned int hdmi_sda_pins[] = { GPIOH_1 };
static const unsigned int hdmi_scl_pins[] = { GPIOH_2 };
static const unsigned int hdmi_cec_0_pins[] = { GPIOH_3 };
static const unsigned int eth_txd1_0_pins[] = { GPIOH_5 };
static const unsigned int eth_txd0_0_pins[] = { GPIOH_6 };
static const unsigned int clk_24m_out_pins[] = { GPIOH_9 };
static const unsigned int spi_ss1_pins[] = { PIN(GPIOH_0, EE_OFF) };
static const unsigned int spi_ss2_pins[] = { PIN(GPIOH_1, EE_OFF) };
static const unsigned int spi_ss0_1_pins[] = { PIN(GPIOH_3, EE_OFF) };
static const unsigned int spi_miso_1_pins[] = { PIN(GPIOH_4, EE_OFF) };
static const unsigned int spi_mosi_1_pins[] = { PIN(GPIOH_5, EE_OFF) };
static const unsigned int spi_sclk_1_pins[] = { PIN(GPIOH_6, EE_OFF) };
static const unsigned int spi_ss1_pins[] = { GPIOH_0 };
static const unsigned int spi_ss2_pins[] = { GPIOH_1 };
static const unsigned int spi_ss0_1_pins[] = { GPIOH_3 };
static const unsigned int spi_miso_1_pins[] = { GPIOH_4 };
static const unsigned int spi_mosi_1_pins[] = { GPIOH_5 };
static const unsigned int spi_sclk_1_pins[] = { GPIOH_6 };
static const unsigned int eth_txd3_pins[] = { PIN(GPIOH_7, EE_OFF) };
static const unsigned int eth_txd2_pins[] = { PIN(GPIOH_8, EE_OFF) };
static const unsigned int eth_tx_clk_pins[] = { PIN(GPIOH_9, EE_OFF) };
static const unsigned int eth_txd3_pins[] = { GPIOH_7 };
static const unsigned int eth_txd2_pins[] = { GPIOH_8 };
static const unsigned int eth_tx_clk_pins[] = { GPIOH_9 };
static const unsigned int i2c_sda_b1_pins[] = { PIN(GPIOH_3, EE_OFF) };
static const unsigned int i2c_sck_b1_pins[] = { PIN(GPIOH_4, EE_OFF) };
static const unsigned int i2c_sda_c1_pins[] = { PIN(GPIOH_5, EE_OFF) };
static const unsigned int i2c_sck_c1_pins[] = { PIN(GPIOH_6, EE_OFF) };
static const unsigned int i2c_sda_d1_pins[] = { PIN(GPIOH_7, EE_OFF) };
static const unsigned int i2c_sck_d1_pins[] = { PIN(GPIOH_8, EE_OFF) };
static const unsigned int i2c_sda_b1_pins[] = { GPIOH_3 };
static const unsigned int i2c_sck_b1_pins[] = { GPIOH_4 };
static const unsigned int i2c_sda_c1_pins[] = { GPIOH_5 };
static const unsigned int i2c_sck_c1_pins[] = { GPIOH_6 };
static const unsigned int i2c_sda_d1_pins[] = { GPIOH_7 };
static const unsigned int i2c_sck_d1_pins[] = { GPIOH_8 };
/* bank BOOT */
static const unsigned int nand_io_pins[] = { PIN(BOOT_0, EE_OFF),
PIN(BOOT_1, EE_OFF), PIN(BOOT_2, EE_OFF), PIN(BOOT_3, EE_OFF),
PIN(BOOT_4, EE_OFF), PIN(BOOT_5, EE_OFF), PIN(BOOT_6, EE_OFF),
PIN(BOOT_7, EE_OFF) };
static const unsigned int nand_io_ce0_pins[] = { PIN(BOOT_8, EE_OFF) };
static const unsigned int nand_io_ce1_pins[] = { PIN(BOOT_9, EE_OFF) };
static const unsigned int nand_io_rb0_pins[] = { PIN(BOOT_10, EE_OFF) };
static const unsigned int nand_ale_pins[] = { PIN(BOOT_11, EE_OFF) };
static const unsigned int nand_cle_pins[] = { PIN(BOOT_12, EE_OFF) };
static const unsigned int nand_wen_clk_pins[] = { PIN(BOOT_13, EE_OFF) };
static const unsigned int nand_ren_clk_pins[] = { PIN(BOOT_14, EE_OFF) };
static const unsigned int nand_dqs_0_pins[] = { PIN(BOOT_15, EE_OFF) };
static const unsigned int nand_dqs_1_pins[] = { PIN(BOOT_18, EE_OFF) };
static const unsigned int nand_io_pins[] = { BOOT_0,
BOOT_1, BOOT_2, BOOT_3,
BOOT_4, BOOT_5, BOOT_6,
BOOT_7 };
static const unsigned int nand_io_ce0_pins[] = { BOOT_8 };
static const unsigned int nand_io_ce1_pins[] = { BOOT_9 };
static const unsigned int nand_io_rb0_pins[] = { BOOT_10 };
static const unsigned int nand_ale_pins[] = { BOOT_11 };
static const unsigned int nand_cle_pins[] = { BOOT_12 };
static const unsigned int nand_wen_clk_pins[] = { BOOT_13 };
static const unsigned int nand_ren_clk_pins[] = { BOOT_14 };
static const unsigned int nand_dqs_0_pins[] = { BOOT_15 };
static const unsigned int nand_dqs_1_pins[] = { BOOT_18 };
static const unsigned int sdxc_d0_c_pins[] = { PIN(BOOT_0, EE_OFF)};
static const unsigned int sdxc_d13_c_pins[] = { PIN(BOOT_1, EE_OFF),
PIN(BOOT_2, EE_OFF), PIN(BOOT_3, EE_OFF) };
static const unsigned int sdxc_d47_c_pins[] = { PIN(BOOT_4, EE_OFF),
PIN(BOOT_5, EE_OFF), PIN(BOOT_6, EE_OFF), PIN(BOOT_7, EE_OFF) };
static const unsigned int sdxc_clk_c_pins[] = { PIN(BOOT_8, EE_OFF) };
static const unsigned int sdxc_cmd_c_pins[] = { PIN(BOOT_10, EE_OFF) };
static const unsigned int nor_d_pins[] = { PIN(BOOT_11, EE_OFF) };
static const unsigned int nor_q_pins[] = { PIN(BOOT_12, EE_OFF) };
static const unsigned int nor_c_pins[] = { PIN(BOOT_13, EE_OFF) };
static const unsigned int nor_cs_pins[] = { PIN(BOOT_18, EE_OFF) };
static const unsigned int sdxc_d0_c_pins[] = { BOOT_0};
static const unsigned int sdxc_d13_c_pins[] = { BOOT_1,
BOOT_2, BOOT_3 };
static const unsigned int sdxc_d47_c_pins[] = { BOOT_4,
BOOT_5, BOOT_6, BOOT_7 };
static const unsigned int sdxc_clk_c_pins[] = { BOOT_8 };
static const unsigned int sdxc_cmd_c_pins[] = { BOOT_10 };
static const unsigned int nor_d_pins[] = { BOOT_11 };
static const unsigned int nor_q_pins[] = { BOOT_12 };
static const unsigned int nor_c_pins[] = { BOOT_13 };
static const unsigned int nor_cs_pins[] = { BOOT_18 };
static const unsigned int sd_d0_c_pins[] = { PIN(BOOT_0, EE_OFF) };
static const unsigned int sd_d1_c_pins[] = { PIN(BOOT_1, EE_OFF) };
static const unsigned int sd_d2_c_pins[] = { PIN(BOOT_2, EE_OFF) };
static const unsigned int sd_d3_c_pins[] = { PIN(BOOT_3, EE_OFF) };
static const unsigned int sd_cmd_c_pins[] = { PIN(BOOT_8, EE_OFF) };
static const unsigned int sd_clk_c_pins[] = { PIN(BOOT_10, EE_OFF) };
static const unsigned int sd_d0_c_pins[] = { BOOT_0 };
static const unsigned int sd_d1_c_pins[] = { BOOT_1 };
static const unsigned int sd_d2_c_pins[] = { BOOT_2 };
static const unsigned int sd_d3_c_pins[] = { BOOT_3 };
static const unsigned int sd_cmd_c_pins[] = { BOOT_8 };
static const unsigned int sd_clk_c_pins[] = { BOOT_10 };
/* bank CARD */
static const unsigned int sd_d1_b_pins[] = { PIN(CARD_0, EE_OFF) };
static const unsigned int sd_d0_b_pins[] = { PIN(CARD_1, EE_OFF) };
static const unsigned int sd_clk_b_pins[] = { PIN(CARD_2, EE_OFF) };
static const unsigned int sd_cmd_b_pins[] = { PIN(CARD_3, EE_OFF) };
static const unsigned int sd_d3_b_pins[] = { PIN(CARD_4, EE_OFF) };
static const unsigned int sd_d2_b_pins[] = { PIN(CARD_5, EE_OFF) };
static const unsigned int sd_d1_b_pins[] = { CARD_0 };
static const unsigned int sd_d0_b_pins[] = { CARD_1 };
static const unsigned int sd_clk_b_pins[] = { CARD_2 };
static const unsigned int sd_cmd_b_pins[] = { CARD_3 };
static const unsigned int sd_d3_b_pins[] = { CARD_4 };
static const unsigned int sd_d2_b_pins[] = { CARD_5 };
static const unsigned int sdxc_d13_b_pins[] = { PIN(CARD_0, EE_OFF),
PIN(CARD_4, EE_OFF), PIN(CARD_5, EE_OFF) };
static const unsigned int sdxc_d0_b_pins[] = { PIN(CARD_1, EE_OFF) };
static const unsigned int sdxc_clk_b_pins[] = { PIN(CARD_2, EE_OFF) };
static const unsigned int sdxc_cmd_b_pins[] = { PIN(CARD_3, EE_OFF) };
static const unsigned int sdxc_d13_b_pins[] = { CARD_0,
CARD_4, CARD_5 };
static const unsigned int sdxc_d0_b_pins[] = { CARD_1 };
static const unsigned int sdxc_clk_b_pins[] = { CARD_2 };
static const unsigned int sdxc_cmd_b_pins[] = { CARD_3 };
/* bank AO */
static const unsigned int uart_tx_ao_a_pins[] = { PIN(GPIOAO_0, 0) };
static const unsigned int uart_rx_ao_a_pins[] = { PIN(GPIOAO_1, 0) };
static const unsigned int uart_cts_ao_a_pins[] = { PIN(GPIOAO_2, 0) };
static const unsigned int uart_rts_ao_a_pins[] = { PIN(GPIOAO_3, 0) };
static const unsigned int i2c_mst_sck_ao_pins[] = { PIN(GPIOAO_4, 0) };
static const unsigned int i2c_mst_sda_ao_pins[] = { PIN(GPIOAO_5, 0) };
static const unsigned int clk_32k_in_out_pins[] = { PIN(GPIOAO_6, 0) };
static const unsigned int remote_input_pins[] = { PIN(GPIOAO_7, 0) };
static const unsigned int hdmi_cec_1_pins[] = { PIN(GPIOAO_12, 0) };
static const unsigned int ir_blaster_pins[] = { PIN(GPIOAO_13, 0) };
static const unsigned int uart_tx_ao_a_pins[] = { GPIOAO_0 };
static const unsigned int uart_rx_ao_a_pins[] = { GPIOAO_1 };
static const unsigned int uart_cts_ao_a_pins[] = { GPIOAO_2 };
static const unsigned int uart_rts_ao_a_pins[] = { GPIOAO_3 };
static const unsigned int i2c_mst_sck_ao_pins[] = { GPIOAO_4 };
static const unsigned int i2c_mst_sda_ao_pins[] = { GPIOAO_5 };
static const unsigned int clk_32k_in_out_pins[] = { GPIOAO_6 };
static const unsigned int remote_input_pins[] = { GPIOAO_7 };
static const unsigned int hdmi_cec_1_pins[] = { GPIOAO_12 };
static const unsigned int ir_blaster_pins[] = { GPIOAO_13 };
static const unsigned int pwm_c2_pins[] = { PIN(GPIOAO_3, 0) };
static const unsigned int i2c_sck_ao_pins[] = { PIN(GPIOAO_4, 0) };
static const unsigned int i2c_sda_ao_pins[] = { PIN(GPIOAO_5, 0) };
static const unsigned int ir_remote_out_pins[] = { PIN(GPIOAO_7, 0) };
static const unsigned int i2s_am_clk_out_pins[] = { PIN(GPIOAO_8, 0) };
static const unsigned int i2s_ao_clk_out_pins[] = { PIN(GPIOAO_9, 0) };
static const unsigned int i2s_lr_clk_out_pins[] = { PIN(GPIOAO_10, 0) };
static const unsigned int i2s_out_01_pins[] = { PIN(GPIOAO_11, 0) };
static const unsigned int pwm_c2_pins[] = { GPIOAO_3 };
static const unsigned int i2c_sck_ao_pins[] = { GPIOAO_4 };
static const unsigned int i2c_sda_ao_pins[] = { GPIOAO_5 };
static const unsigned int ir_remote_out_pins[] = { GPIOAO_7 };
static const unsigned int i2s_am_clk_out_pins[] = { GPIOAO_8 };
static const unsigned int i2s_ao_clk_out_pins[] = { GPIOAO_9 };
static const unsigned int i2s_lr_clk_out_pins[] = { GPIOAO_10 };
static const unsigned int i2s_out_01_pins[] = { GPIOAO_11 };
static const unsigned int uart_tx_ao_b0_pins[] = { PIN(GPIOAO_0, 0) };
static const unsigned int uart_rx_ao_b0_pins[] = { PIN(GPIOAO_1, 0) };
static const unsigned int uart_cts_ao_b_pins[] = { PIN(GPIOAO_2, 0) };
static const unsigned int uart_rts_ao_b_pins[] = { PIN(GPIOAO_3, 0) };
static const unsigned int uart_tx_ao_b1_pins[] = { PIN(GPIOAO_4, 0) };
static const unsigned int uart_rx_ao_b1_pins[] = { PIN(GPIOAO_5, 0) };
static const unsigned int spdif_out_1_pins[] = { PIN(GPIOAO_6, 0) };
static const unsigned int spdif_out_2_pins[] = { PIN(GPIOAO_13, 0) };
static const unsigned int uart_tx_ao_b0_pins[] = { GPIOAO_0 };
static const unsigned int uart_rx_ao_b0_pins[] = { GPIOAO_1 };
static const unsigned int uart_cts_ao_b_pins[] = { GPIOAO_2 };
static const unsigned int uart_rts_ao_b_pins[] = { GPIOAO_3 };
static const unsigned int uart_tx_ao_b1_pins[] = { GPIOAO_4 };
static const unsigned int uart_rx_ao_b1_pins[] = { GPIOAO_5 };
static const unsigned int spdif_out_1_pins[] = { GPIOAO_6 };
static const unsigned int spdif_out_2_pins[] = { GPIOAO_13 };
static const unsigned int i2s_in_ch01_pins[] = { PIN(GPIOAO_6, 0) };
static const unsigned int i2s_ao_clk_in_pins[] = { PIN(GPIOAO_9, 0) };
static const unsigned int i2s_lr_clk_in_pins[] = { PIN(GPIOAO_10, 0) };
static const unsigned int i2s_in_ch01_pins[] = { GPIOAO_6 };
static const unsigned int i2s_ao_clk_in_pins[] = { GPIOAO_9 };
static const unsigned int i2s_lr_clk_in_pins[] = { GPIOAO_10 };
/* bank DIF */
static const unsigned int eth_rxd1_pins[] = { PIN(DIF_0_P, EE_OFF) };
static const unsigned int eth_rxd0_pins[] = { PIN(DIF_0_N, EE_OFF) };
static const unsigned int eth_rx_dv_pins[] = { PIN(DIF_1_P, EE_OFF) };
static const unsigned int eth_rx_clk_pins[] = { PIN(DIF_1_N, EE_OFF) };
static const unsigned int eth_txd0_1_pins[] = { PIN(DIF_2_P, EE_OFF) };
static const unsigned int eth_txd1_1_pins[] = { PIN(DIF_2_N, EE_OFF) };
static const unsigned int eth_tx_en_pins[] = { PIN(DIF_3_P, EE_OFF) };
static const unsigned int eth_ref_clk_pins[] = { PIN(DIF_3_N, EE_OFF) };
static const unsigned int eth_mdc_pins[] = { PIN(DIF_4_P, EE_OFF) };
static const unsigned int eth_mdio_en_pins[] = { PIN(DIF_4_N, EE_OFF) };
static const unsigned int eth_rxd1_pins[] = { DIF_0_P };
static const unsigned int eth_rxd0_pins[] = { DIF_0_N };
static const unsigned int eth_rx_dv_pins[] = { DIF_1_P };
static const unsigned int eth_rx_clk_pins[] = { DIF_1_N };
static const unsigned int eth_txd0_1_pins[] = { DIF_2_P };
static const unsigned int eth_txd1_1_pins[] = { DIF_2_N };
static const unsigned int eth_tx_en_pins[] = { DIF_3_P };
static const unsigned int eth_ref_clk_pins[] = { DIF_3_N };
static const unsigned int eth_mdc_pins[] = { DIF_4_P };
static const unsigned int eth_mdio_en_pins[] = { DIF_4_N };
static struct meson_pmx_group meson8b_cbus_groups[] = {
GPIO_GROUP(GPIOX_0, EE_OFF),
GPIO_GROUP(GPIOX_1, EE_OFF),
GPIO_GROUP(GPIOX_2, EE_OFF),
GPIO_GROUP(GPIOX_3, EE_OFF),
GPIO_GROUP(GPIOX_4, EE_OFF),
GPIO_GROUP(GPIOX_5, EE_OFF),
GPIO_GROUP(GPIOX_6, EE_OFF),
GPIO_GROUP(GPIOX_7, EE_OFF),
GPIO_GROUP(GPIOX_8, EE_OFF),
GPIO_GROUP(GPIOX_9, EE_OFF),
GPIO_GROUP(GPIOX_10, EE_OFF),
GPIO_GROUP(GPIOX_11, EE_OFF),
GPIO_GROUP(GPIOX_16, EE_OFF),
GPIO_GROUP(GPIOX_17, EE_OFF),
GPIO_GROUP(GPIOX_18, EE_OFF),
GPIO_GROUP(GPIOX_19, EE_OFF),
GPIO_GROUP(GPIOX_20, EE_OFF),
GPIO_GROUP(GPIOX_21, EE_OFF),
GPIO_GROUP(GPIOX_0),
GPIO_GROUP(GPIOX_1),
GPIO_GROUP(GPIOX_2),
GPIO_GROUP(GPIOX_3),
GPIO_GROUP(GPIOX_4),
GPIO_GROUP(GPIOX_5),
GPIO_GROUP(GPIOX_6),
GPIO_GROUP(GPIOX_7),
GPIO_GROUP(GPIOX_8),
GPIO_GROUP(GPIOX_9),
GPIO_GROUP(GPIOX_10),
GPIO_GROUP(GPIOX_11),
GPIO_GROUP(GPIOX_16),
GPIO_GROUP(GPIOX_17),
GPIO_GROUP(GPIOX_18),
GPIO_GROUP(GPIOX_19),
GPIO_GROUP(GPIOX_20),
GPIO_GROUP(GPIOX_21),
GPIO_GROUP(GPIOY_0, EE_OFF),
GPIO_GROUP(GPIOY_1, EE_OFF),
GPIO_GROUP(GPIOY_3, EE_OFF),
GPIO_GROUP(GPIOY_6, EE_OFF),
GPIO_GROUP(GPIOY_7, EE_OFF),
GPIO_GROUP(GPIOY_8, EE_OFF),
GPIO_GROUP(GPIOY_9, EE_OFF),
GPIO_GROUP(GPIOY_10, EE_OFF),
GPIO_GROUP(GPIOY_11, EE_OFF),
GPIO_GROUP(GPIOY_12, EE_OFF),
GPIO_GROUP(GPIOY_13, EE_OFF),
GPIO_GROUP(GPIOY_14, EE_OFF),
GPIO_GROUP(GPIOY_0),
GPIO_GROUP(GPIOY_1),
GPIO_GROUP(GPIOY_3),
GPIO_GROUP(GPIOY_6),
GPIO_GROUP(GPIOY_7),
GPIO_GROUP(GPIOY_8),
GPIO_GROUP(GPIOY_9),
GPIO_GROUP(GPIOY_10),
GPIO_GROUP(GPIOY_11),
GPIO_GROUP(GPIOY_12),
GPIO_GROUP(GPIOY_13),
GPIO_GROUP(GPIOY_14),
GPIO_GROUP(GPIODV_9, EE_OFF),
GPIO_GROUP(GPIODV_24, EE_OFF),
GPIO_GROUP(GPIODV_25, EE_OFF),
GPIO_GROUP(GPIODV_26, EE_OFF),
GPIO_GROUP(GPIODV_27, EE_OFF),
GPIO_GROUP(GPIODV_28, EE_OFF),
GPIO_GROUP(GPIODV_29, EE_OFF),
GPIO_GROUP(GPIODV_9),
GPIO_GROUP(GPIODV_24),
GPIO_GROUP(GPIODV_25),
GPIO_GROUP(GPIODV_26),
GPIO_GROUP(GPIODV_27),
GPIO_GROUP(GPIODV_28),
GPIO_GROUP(GPIODV_29),
GPIO_GROUP(GPIOH_0, EE_OFF),
GPIO_GROUP(GPIOH_1, EE_OFF),
GPIO_GROUP(GPIOH_2, EE_OFF),
GPIO_GROUP(GPIOH_3, EE_OFF),
GPIO_GROUP(GPIOH_4, EE_OFF),
GPIO_GROUP(GPIOH_5, EE_OFF),
GPIO_GROUP(GPIOH_6, EE_OFF),
GPIO_GROUP(GPIOH_7, EE_OFF),
GPIO_GROUP(GPIOH_8, EE_OFF),
GPIO_GROUP(GPIOH_9, EE_OFF),
GPIO_GROUP(GPIOH_0),
GPIO_GROUP(GPIOH_1),
GPIO_GROUP(GPIOH_2),
GPIO_GROUP(GPIOH_3),
GPIO_GROUP(GPIOH_4),
GPIO_GROUP(GPIOH_5),
GPIO_GROUP(GPIOH_6),
GPIO_GROUP(GPIOH_7),
GPIO_GROUP(GPIOH_8),
GPIO_GROUP(GPIOH_9),
GPIO_GROUP(DIF_0_P, EE_OFF),
GPIO_GROUP(DIF_0_N, EE_OFF),
GPIO_GROUP(DIF_1_P, EE_OFF),
GPIO_GROUP(DIF_1_N, EE_OFF),
GPIO_GROUP(DIF_2_P, EE_OFF),
GPIO_GROUP(DIF_2_N, EE_OFF),
GPIO_GROUP(DIF_3_P, EE_OFF),
GPIO_GROUP(DIF_3_N, EE_OFF),
GPIO_GROUP(DIF_4_P, EE_OFF),
GPIO_GROUP(DIF_4_N, EE_OFF),
GPIO_GROUP(DIF_0_P),
GPIO_GROUP(DIF_0_N),
GPIO_GROUP(DIF_1_P),
GPIO_GROUP(DIF_1_N),
GPIO_GROUP(DIF_2_P),
GPIO_GROUP(DIF_2_N),
GPIO_GROUP(DIF_3_P),
GPIO_GROUP(DIF_3_N),
GPIO_GROUP(DIF_4_P),
GPIO_GROUP(DIF_4_N),
GPIO_GROUP(BOOT_0, EE_OFF),
GPIO_GROUP(BOOT_1, EE_OFF),
GPIO_GROUP(BOOT_2, EE_OFF),
GPIO_GROUP(BOOT_3, EE_OFF),
GPIO_GROUP(BOOT_4, EE_OFF),
GPIO_GROUP(BOOT_5, EE_OFF),
GPIO_GROUP(BOOT_6, EE_OFF),
GPIO_GROUP(BOOT_7, EE_OFF),
GPIO_GROUP(BOOT_8, EE_OFF),
GPIO_GROUP(BOOT_10, EE_OFF),
GPIO_GROUP(BOOT_0),
GPIO_GROUP(BOOT_1),
GPIO_GROUP(BOOT_2),
GPIO_GROUP(BOOT_3),
GPIO_GROUP(BOOT_4),
GPIO_GROUP(BOOT_5),
GPIO_GROUP(BOOT_6),
GPIO_GROUP(BOOT_7),
GPIO_GROUP(BOOT_8),
GPIO_GROUP(BOOT_10),
/* bank X */
GROUP(sd_d0_a, 8, 5),
@@ -583,20 +581,20 @@ static struct meson_pmx_group meson8b_cbus_groups[] = {
};
static struct meson_pmx_group meson8b_aobus_groups[] = {
GPIO_GROUP(GPIOAO_0, 0),
GPIO_GROUP(GPIOAO_1, 0),
GPIO_GROUP(GPIOAO_2, 0),
GPIO_GROUP(GPIOAO_3, 0),
GPIO_GROUP(GPIOAO_4, 0),
GPIO_GROUP(GPIOAO_5, 0),
GPIO_GROUP(GPIOAO_6, 0),
GPIO_GROUP(GPIOAO_7, 0),
GPIO_GROUP(GPIOAO_8, 0),
GPIO_GROUP(GPIOAO_9, 0),
GPIO_GROUP(GPIOAO_10, 0),
GPIO_GROUP(GPIOAO_11, 0),
GPIO_GROUP(GPIOAO_12, 0),
GPIO_GROUP(GPIOAO_13, 0),
GPIO_GROUP(GPIOAO_0),
GPIO_GROUP(GPIOAO_1),
GPIO_GROUP(GPIOAO_2),
GPIO_GROUP(GPIOAO_3),
GPIO_GROUP(GPIOAO_4),
GPIO_GROUP(GPIOAO_5),
GPIO_GROUP(GPIOAO_6),
GPIO_GROUP(GPIOAO_7),
GPIO_GROUP(GPIOAO_8),
GPIO_GROUP(GPIOAO_9),
GPIO_GROUP(GPIOAO_10),
GPIO_GROUP(GPIOAO_11),
GPIO_GROUP(GPIOAO_12),
GPIO_GROUP(GPIOAO_13),
/* bank AO */
GROUP(uart_tx_ao_a, 0, 12),
@@ -921,25 +919,25 @@ static struct meson_pmx_func meson8b_aobus_functions[] = {
static struct meson_bank meson8b_cbus_banks[] = {
/* name first last irq pullen pull dir out in */
BANK("X", PIN(GPIOX_0, EE_OFF), PIN(GPIOX_21, EE_OFF), 97,
BANK("X", GPIOX_0, GPIOX_21, 97,
4, 0, 4, 0, 0, 0, 1, 0, 2, 0),
BANK("Y", PIN(GPIOY_0, EE_OFF), PIN(GPIOY_16, EE_OFF), 80,
BANK("Y", GPIOY_0, GPIOY_16, 80,
3, 0, 3, 0, 3, 0, 4, 0, 5, 0),
BANK("DV", PIN(GPIODV_0, EE_OFF), PIN(GPIODV_29, EE_OFF), 50,
BANK("DV", GPIODV_0, GPIODV_29, 50,
0, 0, 0, 0, 6, 0, 7, 0, 8, 0),
BANK("H", PIN(GPIOH_0, EE_OFF), PIN(GPIOH_9, EE_OFF), 14,
BANK("H", GPIOH_0, GPIOH_9, 14,
1, 16, 1, 16, 9, 19, 10, 19, 11, 19),
BANK("CARD", PIN(CARD_0, EE_OFF), PIN(CARD_6, EE_OFF), 43,
BANK("CARD", CARD_0, CARD_6, 43,
2, 20, 2, 20, 0, 22, 1, 22, 2, 22),
BANK("BOOT", PIN(BOOT_0, EE_OFF), PIN(BOOT_18, EE_OFF), 24,
BANK("BOOT", BOOT_0, BOOT_18, 24,
2, 0, 2, 0, 9, 0, 10, 0, 11, 0),
BANK("DIF", PIN(DIF_0_P, EE_OFF), PIN(DIF_4_N, EE_OFF), -1,
BANK("DIF", DIF_0_P, DIF_4_N, -1,
5, 8, 5, 8, 12, 12, 13, 12, 14, 12),
};
static struct meson_bank meson8b_aobus_banks[] = {
/* name first last irq pullen pull dir out in */
BANK("AO", PIN(GPIOAO_0, 0), PIN(GPIOAO_13, 0), -1,
BANK("AO", GPIOAO_0, GPIOAO_13, -1,
0, 0, 0, 16, 0, 0, 0, 16, 1, 0),
};
@@ -947,7 +945,6 @@ static struct meson_domain_data meson8b_periphs_domain_data = {
.name = "cbus-banks",
.banks = meson8b_cbus_banks,
.num_banks = ARRAY_SIZE(meson8b_cbus_banks),
.pin_base = 14,
.num_pins = 115,
};
@@ -955,7 +952,6 @@ static struct meson_domain_data meson8b_aobus_domain_data = {
.name = "aobus-banks",
.banks = meson8b_aobus_banks,
.num_banks = ARRAY_SIZE(meson8b_aobus_banks),
.pin_base = 0,
.num_pins = 14,
};

220
drivers/amlogic/pinctrl/pinctrl-mesonaxg.c
View File

@@ -19,451 +19,449 @@
#include <linux/arm-smccc.h>
#include "pinctrl-meson.h"
#define EE_OFF 15
static const struct meson_desc_pin mesonaxg_periphs_pins[] = {
MESON_PINCTRL_PIN(MESON_PIN(GPIOZ_0, EE_OFF), 0x2, 0,
MESON_PINCTRL_PIN(MESON_PIN(GPIOZ_0), 0x2, 0,
MESON_FUNCTION(0x0, "gpio"),
MESON_FUNCTION(0x1, "spi_a"), /*SPI_CLK_A*/
MESON_FUNCTION(0x2, "uart_b")), /*UART_RTS_EE_B*/
MESON_PINCTRL_PIN(MESON_PIN(GPIOZ_1, EE_OFF), 0x2, 4,
MESON_PINCTRL_PIN(MESON_PIN(GPIOZ_1), 0x2, 4,
MESON_FUNCTION(0x0, "gpio"),
MESON_FUNCTION(0x1, "spi_a"), /*SPI_MOSI_A*/
MESON_FUNCTION(0x2, "uart_b")), /*UART_CTS_EE_B*/
MESON_PINCTRL_PIN(MESON_PIN(GPIOZ_2, EE_OFF), 0x2, 8,
MESON_PINCTRL_PIN(MESON_PIN(GPIOZ_2), 0x2, 8,
MESON_FUNCTION(0x0, "gpio"),
MESON_FUNCTION(0x1, "spi_a"), /*SPI_MISO_A*/
MESON_FUNCTION(0x2, "uart_b")), /*UART_TX_EE_B*/
MESON_PINCTRL_PIN(MESON_PIN(GPIOZ_3, EE_OFF), 0x2, 12,
MESON_PINCTRL_PIN(MESON_PIN(GPIOZ_3), 0x2, 12,
MESON_FUNCTION(0x0, "gpio"),
MESON_FUNCTION(0x1, "spi_a"), /*SPI_SS0_A*/
MESON_FUNCTION(0x2, "uart_b")), /*UART_RX_EE_B*/
MESON_PINCTRL_PIN(MESON_PIN(GPIOZ_4, EE_OFF), 0x2, 16,
MESON_PINCTRL_PIN(MESON_PIN(GPIOZ_4), 0x2, 16,
MESON_FUNCTION(0x0, "gpio"),
MESON_FUNCTION(0x1, "spi_a"), /*SPI_SS1_A*/
MESON_FUNCTION(0x2, "pwm_b"), /*PWM_B*/
MESON_FUNCTION(0x3, "spdif_in")), /*SPDIF_IN*/
MESON_PINCTRL_PIN(MESON_PIN(GPIOZ_5, EE_OFF), 0x2, 20,
MESON_PINCTRL_PIN(MESON_PIN(GPIOZ_5), 0x2, 20,
MESON_FUNCTION(0x0, "gpio"),
MESON_FUNCTION(0x1, "spi_a"), /*SPI_SS2_A*/
MESON_FUNCTION(0x2, "pwm_a"), /*PWM_A*/
MESON_FUNCTION(0x3, "spdif_out")), /*SPDIF_OUT*/
MESON_PINCTRL_PIN(MESON_PIN(GPIOZ_6, EE_OFF), 0x2, 24,
MESON_PINCTRL_PIN(MESON_PIN(GPIOZ_6), 0x2, 24,
MESON_FUNCTION(0x0, "gpio"),
MESON_FUNCTION(0x1, "i2c_a"), /*I2C_SCK_A*/
MESON_FUNCTION(0x2, "uart_ao_b")), /*UART_CTS_AO_B*/
MESON_PINCTRL_PIN(MESON_PIN(GPIOZ_7, EE_OFF), 0x2, 28,
MESON_PINCTRL_PIN(MESON_PIN(GPIOZ_7), 0x2, 28,
MESON_FUNCTION(0x0, "gpio"),
MESON_FUNCTION(0x1, "i2c_a"), /*I2C_SDA_A*/
MESON_FUNCTION(0x2, "uart_ao_b")), /*UART_RTS_AO_B*/
MESON_PINCTRL_PIN(MESON_PIN(GPIOZ_8, EE_OFF), 0x3, 0,
MESON_PINCTRL_PIN(MESON_PIN(GPIOZ_8), 0x3, 0,
MESON_FUNCTION(0x0, "gpio"),
MESON_FUNCTION(0x1, "i2c_b"), /*I2C_SCK_B*/
MESON_FUNCTION(0x2, "uart_ao_b")), /*UART_TX_AO_B*/
MESON_PINCTRL_PIN(MESON_PIN(GPIOZ_9, EE_OFF), 0x3, 4,
MESON_PINCTRL_PIN(MESON_PIN(GPIOZ_9), 0x3, 4,
MESON_FUNCTION(0x0, "gpio"),
MESON_FUNCTION(0x1, "i2c_b"), /*I2C_SDA_B*/
MESON_FUNCTION(0x2, "uart_ao_b")), /*UART_RX_AO_B*/
MESON_PINCTRL_PIN(MESON_PIN(GPIOZ_10, EE_OFF), 0x3, 8,
MESON_PINCTRL_PIN(MESON_PIN(GPIOZ_10), 0x3, 8,
MESON_FUNCTION(0x0, "gpio")),
MESON_PINCTRL_PIN(MESON_PIN(BOOT_0, EE_OFF), 0x0, 0,
MESON_PINCTRL_PIN(MESON_PIN(BOOT_0), 0x0, 0,
MESON_FUNCTION(0x0, "gpio"),
MESON_FUNCTION(0x1, "emmc"), /*EMMC_D0*/
MESON_FUNCTION(0x1, "nandflash")), /*EMMC_D0*/
MESON_PINCTRL_PIN(MESON_PIN(BOOT_1, EE_OFF), 0x0, 4,
MESON_PINCTRL_PIN(MESON_PIN(BOOT_1), 0x0, 4,
MESON_FUNCTION(0x0, "gpio"),
MESON_FUNCTION(0x1, "emmc"),
MESON_FUNCTION(0x1, "nandflash")), /*EMMC_D1*/
MESON_PINCTRL_PIN(MESON_PIN(BOOT_2, EE_OFF), 0x0, 8,
MESON_PINCTRL_PIN(MESON_PIN(BOOT_2), 0x0, 8,
MESON_FUNCTION(0x0, "gpio"),
MESON_FUNCTION(0x1, "emmc"),
MESON_FUNCTION(0x1, "nandflash")), /*EMMC_D2*/
MESON_PINCTRL_PIN(MESON_PIN(BOOT_3, EE_OFF), 0x0, 12,
MESON_PINCTRL_PIN(MESON_PIN(BOOT_3), 0x0, 12,
MESON_FUNCTION(0x0, "gpio"),
MESON_FUNCTION(0x1, "emmc"), /*EMMC_D3*/
MESON_FUNCTION(0x1, "nandflash"),
MESON_FUNCTION(0x3, "norflash")), /*NOR_HOLD*/
MESON_PINCTRL_PIN(MESON_PIN(BOOT_4, EE_OFF), 0x0, 16,
MESON_PINCTRL_PIN(MESON_PIN(BOOT_4), 0x0, 16,
MESON_FUNCTION(0x0, "gpio"),
MESON_FUNCTION(0x1, "emmc"), /*EMMC_D4*/
MESON_FUNCTION(0x1, "nandflash"),
MESON_FUNCTION(0x3, "norflash")), /*NOR_D*/
MESON_PINCTRL_PIN(MESON_PIN(BOOT_5, EE_OFF), 0x0, 20,
MESON_PINCTRL_PIN(MESON_PIN(BOOT_5), 0x0, 20,
MESON_FUNCTION(0x0, "gpio"),
MESON_FUNCTION(0x1, "emmc"), /*EMMC_D5*/
MESON_FUNCTION(0x1, "nandflash"),
MESON_FUNCTION(0x3, "norflash")), /*NOR_Q*/
MESON_PINCTRL_PIN(MESON_PIN(BOOT_6, EE_OFF), 0x0, 24,
MESON_PINCTRL_PIN(MESON_PIN(BOOT_6), 0x0, 24,
MESON_FUNCTION(0x0, "gpio"),
MESON_FUNCTION(0x1, "emmc"), /*EMMC_D6*/
MESON_FUNCTION(0x1, "nandflash"),
MESON_FUNCTION(0x3, "norflash")), /*NOR_C*/
MESON_PINCTRL_PIN(MESON_PIN(BOOT_7, EE_OFF), 0x0, 28,
MESON_PINCTRL_PIN(MESON_PIN(BOOT_7), 0x0, 28,
MESON_FUNCTION(0x0, "gpio"),
MESON_FUNCTION(0x1, "emmc"),
MESON_FUNCTION(0x1, "nandflash")), /*EMMC_D7*/
MESON_PINCTRL_PIN(MESON_PIN(BOOT_8, EE_OFF), 0x1, 0,
MESON_PINCTRL_PIN(MESON_PIN(BOOT_8), 0x1, 0,
MESON_FUNCTION(0x0, "gpio"),
MESON_FUNCTION(0x1, "emmc"), /*EMMC_CLK*/
MESON_FUNCTION(0x2, "nandflash")), /*NAND_CE0 */
MESON_PINCTRL_PIN(MESON_PIN(BOOT_9, EE_OFF), 0x1, 4,
MESON_PINCTRL_PIN(MESON_PIN(BOOT_9), 0x1, 4,
MESON_FUNCTION(0x0, "gpio"),
MESON_FUNCTION(0x2, "nandflash"), /*NAND_ALE*/
MESON_FUNCTION(0x3, "norflash")), /*NOR_WP*/
MESON_PINCTRL_PIN(MESON_PIN(BOOT_10, EE_OFF), 0x1, 8,
MESON_PINCTRL_PIN(MESON_PIN(BOOT_10), 0x1, 8,
MESON_FUNCTION(0x0, "gpio"),
MESON_FUNCTION(0x1, "emmc"), /*EMMC_CMD*/
MESON_FUNCTION(0x2, "nandflash")), /*NAND_CLE */
MESON_PINCTRL_PIN(MESON_PIN(BOOT_11, EE_OFF), 0x1, 12,
MESON_PINCTRL_PIN(MESON_PIN(BOOT_11), 0x1, 12,
MESON_FUNCTION(0x0, "gpio"),
MESON_FUNCTION(0x2, "nandflash")), /*NAND_WEN_CLK*/
MESON_PINCTRL_PIN(MESON_PIN(BOOT_12, EE_OFF), 0x1, 16,
MESON_PINCTRL_PIN(MESON_PIN(BOOT_12), 0x1, 16,
MESON_FUNCTION(0x0, "gpio"),
MESON_FUNCTION(0x2, "nandflash")), /*NAND_REN_WR */
MESON_PINCTRL_PIN(MESON_PIN(BOOT_13, EE_OFF), 0x1, 20,
MESON_PINCTRL_PIN(MESON_PIN(BOOT_13), 0x1, 20,
MESON_FUNCTION(0x0, "gpio"),
MESON_FUNCTION(0x1, "emmc"), /*EMMC_DS*/
MESON_FUNCTION(0x2, "nandflash")), /*NAND_RB0*/
MESON_PINCTRL_PIN(MESON_PIN(BOOT_14, EE_OFF), 0x1, 24,
MESON_PINCTRL_PIN(MESON_PIN(BOOT_14), 0x1, 24,
MESON_FUNCTION(0x0, "gpio"),
MESON_FUNCTION(0x3, "norflash")), /*NOR_CS */
MESON_PINCTRL_PIN(MESON_PIN(GPIOA_0, EE_OFF), 0xb, 0,
MESON_PINCTRL_PIN(MESON_PIN(GPIOA_0), 0xb, 0,
MESON_FUNCTION(0x0, "gpio"),
MESON_FUNCTION(0x1, "mclk"), /*MCLK_A*/
MESON_FUNCTION(0x2, "pwm_vs"), /*PWM_VS*/
MESON_FUNCTION(0x5, "wifi")), /*WIFI_BEACON*/
MESON_PINCTRL_PIN(MESON_PIN(GPIOA_1, EE_OFF), 0xb, 4,
MESON_PINCTRL_PIN(MESON_PIN(GPIOA_1), 0xb, 4,
MESON_FUNCTION(0x0, "gpio"),
MESON_FUNCTION(0x1, "mclk"), /*MCLK_B*/
MESON_FUNCTION(0x3, "spdif_in"), /*SPDIF_IN*/
MESON_FUNCTION(0x4, "spdif_out"), /*SPDIF_OUT*/
MESON_FUNCTION(0x5, "wifi")), /*WIFI_BEACON*/
MESON_PINCTRL_PIN(MESON_PIN(GPIOA_2, EE_OFF), 0xb, 8,
MESON_PINCTRL_PIN(MESON_PIN(GPIOA_2), 0xb, 8,
MESON_FUNCTION(0x0, "gpio"),
MESON_FUNCTION(0x1, "tdmc_out"), /*TDMC_SCLK*/
MESON_FUNCTION(0x2, "tdmc_in"), /*TDMC_SLV_SCLK*/
MESON_FUNCTION(0x3, "spi_b")), /*SPI_MOSI_B*/
MESON_PINCTRL_PIN(MESON_PIN(GPIOA_3, EE_OFF), 0xb, 12,
MESON_PINCTRL_PIN(MESON_PIN(GPIOA_3), 0xb, 12,
MESON_FUNCTION(0x0, "gpio"),
MESON_FUNCTION(0x1, "tdmc_out"), /*TDMC_FS*/
MESON_FUNCTION(0x2, "tdmc_in"), /*TDMC_SLV_FS*/
MESON_FUNCTION(0x3, "spi_b")), /*SPI_MISO_B*/
MESON_PINCTRL_PIN(MESON_PIN(GPIOA_4, EE_OFF), 0xb, 16,
MESON_PINCTRL_PIN(MESON_PIN(GPIOA_4), 0xb, 16,
MESON_FUNCTION(0x0, "gpio"),
MESON_FUNCTION(0x1, "tdmc_out"), /*TDMC_DOUT0*/
MESON_FUNCTION(0x2, "tdmc_in"), /*TDMC_DIN0*/
MESON_FUNCTION(0x3, "spi_b")), /*SPI_CLK_B*/
MESON_PINCTRL_PIN(MESON_PIN(GPIOA_5, EE_OFF), 0xb, 20,
MESON_PINCTRL_PIN(MESON_PIN(GPIOA_5), 0xb, 20,
MESON_FUNCTION(0x0, "gpio"),
MESON_FUNCTION(0x1, "tdmc_out"), /*TDMC_DOUT1*/
MESON_FUNCTION(0x2, "tdmc_in"), /*TDMC_DIN1*/
MESON_FUNCTION(0x3, "spi_b")), /*SPI_SS0_B*/
MESON_PINCTRL_PIN(MESON_PIN(GPIOA_6, EE_OFF), 0xb, 24,
MESON_PINCTRL_PIN(MESON_PIN(GPIOA_6), 0xb, 24,
MESON_FUNCTION(0x0, "gpio"),
MESON_FUNCTION(0x1, "tdmc_out"), /*TDMC_DOUT2*/
MESON_FUNCTION(0x2, "tdmc_in"), /*TDMC_DIN2*/
MESON_FUNCTION(0x3, "spi_b"), /*SPI_SS1_B*/
MESON_FUNCTION(0x4, "i2c_d")), /*I2C_SDA_D*/
MESON_PINCTRL_PIN(MESON_PIN(GPIOA_7, EE_OFF), 0xb, 28,
MESON_PINCTRL_PIN(MESON_PIN(GPIOA_7), 0xb, 28,
MESON_FUNCTION(0x0, "gpio"),
MESON_FUNCTION(0x1, "tdmc_out"), /*TDMC_DOUT3*/
MESON_FUNCTION(0x2, "tdmc_in"), /*TDMC_DIN3*/
MESON_FUNCTION(0x3, "spdif_in"), /*SPDIF_IN*/
MESON_FUNCTION(0x4, "i2c_d")), /*I2C_SCK_D*/
MESON_PINCTRL_PIN(MESON_PIN(GPIOA_8, EE_OFF), 0xc, 0,
MESON_PINCTRL_PIN(MESON_PIN(GPIOA_8), 0xc, 0,
MESON_FUNCTION(0x0, "gpio"),
MESON_FUNCTION(0x1, "tdmb_out"), /*TDMB_SCLK*/
MESON_FUNCTION(0x2, "tdmb_in")), /*TDMB_SLV_SCLK*/
MESON_PINCTRL_PIN(MESON_PIN(GPIOA_9, EE_OFF), 0xc, 4,
MESON_PINCTRL_PIN(MESON_PIN(GPIOA_9), 0xc, 4,
MESON_FUNCTION(0x0, "gpio"),
MESON_FUNCTION(0x1, "tdmb_out"), /*TDMB_FS*/
MESON_FUNCTION(0x2, "tdmb_in")), /*TDMB_SLV_FS*/
MESON_PINCTRL_PIN(MESON_PIN(GPIOA_10, EE_OFF), 0xc, 8,
MESON_PINCTRL_PIN(MESON_PIN(GPIOA_10), 0xc, 8,
MESON_FUNCTION(0x0, "gpio"),
MESON_FUNCTION(0x1, "tdmb_out"), /*TDMB_DOUT0*/
MESON_FUNCTION(0x2, "tdmb_in")), /*TDMB_DIN0*/
MESON_PINCTRL_PIN(MESON_PIN(GPIOA_11, EE_OFF), 0xc, 12,
MESON_PINCTRL_PIN(MESON_PIN(GPIOA_11), 0xc, 12,
MESON_FUNCTION(0x0, "gpio"),
MESON_FUNCTION(0x1, "tdmb_out"), /*TDMB_DOUT1*/
MESON_FUNCTION(0x2, "tdmb_in"), /*TDMB_DIN1*/
MESON_FUNCTION(0x3, "spdif_out")), /*SPDIF_OUT*/
MESON_PINCTRL_PIN(MESON_PIN(GPIOA_12, EE_OFF), 0xc, 16,
MESON_PINCTRL_PIN(MESON_PIN(GPIOA_12), 0xc, 16,
MESON_FUNCTION(0x0, "gpio"),
MESON_FUNCTION(0x1, "tdmb_out"), /*TDMB_DOUT2*/
MESON_FUNCTION(0x2, "tdmb_in"), /*TDMB_DIN2*/
MESON_FUNCTION(0x4, "i2c_d")), /*I2C_SDA_D*/
MESON_PINCTRL_PIN(MESON_PIN(GPIOA_13, EE_OFF), 0xc, 20,
MESON_PINCTRL_PIN(MESON_PIN(GPIOA_13), 0xc, 20,
MESON_FUNCTION(0x0, "gpio"),
MESON_FUNCTION(0x1, "tdmb_out"), /*TDMB_DOUT3*/
MESON_FUNCTION(0x2, "tdmb_in"), /*TDMB_DIN3*/
MESON_FUNCTION(0x4, "i2c_d")), /*I2C_SCK_D*/
MESON_PINCTRL_PIN(MESON_PIN(GPIOA_14, EE_OFF), 0xc, 24,
MESON_PINCTRL_PIN(MESON_PIN(GPIOA_14), 0xc, 24,
MESON_FUNCTION(0x0, "gpio"),
MESON_FUNCTION(0x1, "pdm"), /*PDM_DCLK*/
MESON_FUNCTION(0x3, "pwm_a"), /*PWM_A*/
MESON_FUNCTION(0x5, "wifi")), /*WIFI_BEACON*/
MESON_PINCTRL_PIN(MESON_PIN(GPIOA_15, EE_OFF), 0xc, 28,
MESON_PINCTRL_PIN(MESON_PIN(GPIOA_15), 0xc, 28,
MESON_FUNCTION(0x0, "gpio"),
MESON_FUNCTION(0x1, "pdm"), /*PDM_DIN0*/
MESON_FUNCTION(0x2, "tdmc_out"), /*TDMC_DOUT2*/
MESON_FUNCTION(0x3, "pwm_b"), /*PWM_B*/
MESON_FUNCTION(0x4, "tdmc_in")), /*TDMC_DIN2*/
MESON_PINCTRL_PIN(MESON_PIN(GPIOA_16, EE_OFF), 0xd, 0,
MESON_PINCTRL_PIN(MESON_PIN(GPIOA_16), 0xd, 0,
MESON_FUNCTION(0x0, "gpio"),
MESON_FUNCTION(0x1, "pdm"), /*PDM_DIN1*/
MESON_FUNCTION(0x2, "tdmc_out"), /*TDMC_DOUT3*/
MESON_FUNCTION(0x3, "pwm_c"), /*PWM_C*/
MESON_FUNCTION(0x4, "tdmc_in")), /*TDMC_DIN3*/
MESON_PINCTRL_PIN(MESON_PIN(GPIOA_17, EE_OFF), 0xd, 4,
MESON_PINCTRL_PIN(MESON_PIN(GPIOA_17), 0xd, 4,
MESON_FUNCTION(0x0, "gpio"),
MESON_FUNCTION(0x1, "pdm"), /*PDM_DIN2*/
MESON_FUNCTION(0x2, "tdmb_out"), /*TDMB_DOUT2*/
MESON_FUNCTION(0x3, "i2c_c"), /*I2C_SDA_C*/
MESON_FUNCTION(0x4, "tdmb_in"), /*TDMB_DIN2*/
MESON_FUNCTION(0x5, "eth")), /*ETH_MDIO*/
MESON_PINCTRL_PIN(MESON_PIN(GPIOA_18, EE_OFF), 0xd, 8,
MESON_PINCTRL_PIN(MESON_PIN(GPIOA_18), 0xd, 8,
MESON_FUNCTION(0x0, "gpio"),
MESON_FUNCTION(0x1, "pdm"), /*PDM_DIN3*/
MESON_FUNCTION(0x2, "tdmb_out"), /*TDMB_DOUT3*/
MESON_FUNCTION(0x3, "i2c_c"), /*I2C_SCK_C*/
MESON_FUNCTION(0x4, "tdmb_in"), /*TDMB_DIN3*/
MESON_FUNCTION(0x5, "eth")), /*ETH_MDC*/
MESON_PINCTRL_PIN(MESON_PIN(GPIOA_19, EE_OFF), 0xd, 12,
MESON_PINCTRL_PIN(MESON_PIN(GPIOA_19), 0xd, 12,
MESON_FUNCTION(0x0, "gpio"),
MESON_FUNCTION(0x1, "spdif_in"), /*SPDIF_IN*/
MESON_FUNCTION(0x2, "spdif_out"), /*SPDIF_OUT*/
MESON_FUNCTION(0x3, "pdm"), /*PDM_DCLK*/
MESON_FUNCTION(0x4, "i2c_d")), /*I2C_SDA_D*/
MESON_PINCTRL_PIN(MESON_PIN(GPIOA_20, EE_OFF), 0xd, 16,
MESON_PINCTRL_PIN(MESON_PIN(GPIOA_20), 0xd, 16,
MESON_FUNCTION(0x0, "gpio"),
MESON_FUNCTION(0x1, "spdif_out"), /*SPDIF_OUT*/
MESON_FUNCTION(0x2, "spdif_in"), /*SPDIF_IN*/
MESON_FUNCTION(0x4, "i2c_d"), /*I2C_SCK_D*/
MESON_FUNCTION(0x5, "wifi")), /*WIFI_BEACON*/
MESON_PINCTRL_PIN(MESON_PIN(GPIOX_0, EE_OFF), 0x4, 0,
MESON_PINCTRL_PIN(MESON_PIN(GPIOX_0), 0x4, 0,
MESON_FUNCTION(0x0, "gpio"),
MESON_FUNCTION(0x1, "sdio"), /*SDIO_D0*/
MESON_FUNCTION(0x2, "jtag")), /*JTAG_TDO*/
MESON_PINCTRL_PIN(MESON_PIN(GPIOX_1, EE_OFF), 0x4, 4,
MESON_PINCTRL_PIN(MESON_PIN(GPIOX_1), 0x4, 4,
MESON_FUNCTION(0x0, "gpio"),
MESON_FUNCTION(0x1, "sdio"), /*SDIO_D1*/
MESON_FUNCTION(0x2, "jtag")), /*JTAG_TDI*/
MESON_PINCTRL_PIN(MESON_PIN(GPIOX_2, EE_OFF), 0x4, 8,
MESON_PINCTRL_PIN(MESON_PIN(GPIOX_2), 0x4, 8,
MESON_FUNCTION(0x0, "gpio"),
MESON_FUNCTION(0x1, "sdio"), /*SDIO_D2*/
MESON_FUNCTION(0x2, "uart_ao_a")), /*UART_RX_AO_A*/
MESON_PINCTRL_PIN(MESON_PIN(GPIOX_3, EE_OFF), 0x4, 12,
MESON_PINCTRL_PIN(MESON_PIN(GPIOX_3), 0x4, 12,
MESON_FUNCTION(0x0, "gpio"),
MESON_FUNCTION(0x1, "sdio"), /*SDIO_D3*/
MESON_FUNCTION(0x2, "uart_ao_a")), /*UART_TX_AO_A*/
MESON_PINCTRL_PIN(MESON_PIN(GPIOX_4, EE_OFF), 0x4, 16,
MESON_PINCTRL_PIN(MESON_PIN(GPIOX_4), 0x4, 16,
MESON_FUNCTION(0x0, "gpio"),
MESON_FUNCTION(0x1, "sdio"), /*SDIO_CLK*/
MESON_FUNCTION(0x2, "jtag")), /*JTAG_CLK*/
MESON_PINCTRL_PIN(MESON_PIN(GPIOX_5, EE_OFF), 0x4, 20,
MESON_PINCTRL_PIN(MESON_PIN(GPIOX_5), 0x4, 20,
MESON_FUNCTION(0x0, "gpio"),
MESON_FUNCTION(0x1, "sdio"), /*SDIO_CMD*/
MESON_FUNCTION(0x2, "jtag")), /*JTAG_TMS*/
MESON_PINCTRL_PIN(MESON_PIN(GPIOX_6, EE_OFF), 0x4, 24,
MESON_PINCTRL_PIN(MESON_PIN(GPIOX_6), 0x4, 24,
MESON_FUNCTION(0x0, "gpio")),
MESON_PINCTRL_PIN(MESON_PIN(GPIOX_7, EE_OFF), 0x4, 28,
MESON_PINCTRL_PIN(MESON_PIN(GPIOX_7), 0x4, 28,
MESON_FUNCTION(0x0, "gpio")),
MESON_PINCTRL_PIN(MESON_PIN(GPIOX_8, EE_OFF), 0x5, 0,
MESON_PINCTRL_PIN(MESON_PIN(GPIOX_8), 0x5, 0,
MESON_FUNCTION(0x0, "gpio"),
MESON_FUNCTION(0x1, "uart_a"), /*UART_TX_EE_A*/
MESON_FUNCTION(0x4, "eth")), /*ETH_TXD0*/
MESON_PINCTRL_PIN(MESON_PIN(GPIOX_9, EE_OFF), 0x5, 4,
MESON_PINCTRL_PIN(MESON_PIN(GPIOX_9), 0x5, 4,
MESON_FUNCTION(0x0, "gpio"),
MESON_FUNCTION(0x1, "uart_a"), /*UART_RX_EE_A*/
MESON_FUNCTION(0x4, "eth")), /*ETH_TXD1*/
MESON_PINCTRL_PIN(MESON_PIN(GPIOX_10, EE_OFF), 0x5, 8,
MESON_PINCTRL_PIN(MESON_PIN(GPIOX_10), 0x5, 8,
MESON_FUNCTION(0x0, "gpio"),
MESON_FUNCTION(0x1, "uart_a"), /*UART_CTS_EE_A*/
MESON_FUNCTION(0x3, "pwm_c"), /*PWM_C*/
MESON_FUNCTION(0x4, "eth")), /*ETH_TXEN*/
MESON_PINCTRL_PIN(MESON_PIN(GPIOX_11, EE_OFF), 0x5, 12,
MESON_PINCTRL_PIN(MESON_PIN(GPIOX_11), 0x5, 12,
MESON_FUNCTION(0x0, "gpio"),
MESON_FUNCTION(0x1, "uart_a"), /*UART_RTS_EE_A*/
MESON_FUNCTION(0x3, "pwm_d")), /*PWM_D*/
MESON_PINCTRL_PIN(MESON_PIN(GPIOX_12, EE_OFF), 0x5, 16,
MESON_PINCTRL_PIN(MESON_PIN(GPIOX_12), 0x5, 16,
MESON_FUNCTION(0x0, "gpio"),
MESON_FUNCTION(0x1, "tdma_out"), /*TDMA_OUT*/
MESON_FUNCTION(0x2, "tdma_in"), /*TDMA_IN*/
MESON_FUNCTION(0x4, "eth")), /*ETH_RGMII_RX_CLK*/
MESON_PINCTRL_PIN(MESON_PIN(GPIOX_13, EE_OFF), 0x5, 20,
MESON_PINCTRL_PIN(MESON_PIN(GPIOX_13), 0x5, 20,
MESON_FUNCTION(0x0, "gpio"),
MESON_FUNCTION(0x1, "tdma_out"), /*TDMA_OUT*/
MESON_FUNCTION(0x2, "tdma_in"), /*TDMA_IN*/
MESON_FUNCTION(0x4, "eth")), /*ETH_RXD0*/
MESON_PINCTRL_PIN(MESON_PIN(GPIOX_14, EE_OFF), 0x5, 24,
MESON_PINCTRL_PIN(MESON_PIN(GPIOX_14), 0x5, 24,
MESON_FUNCTION(0x0, "gpio"),
MESON_FUNCTION(0x1, "tdma_in"), /*TDMA_IN*/
MESON_FUNCTION(0x2, "tdma_out"), /*TDMA_OUT*/
MESON_FUNCTION(0x4, "eth")), /*ETH_RXD1*/
MESON_PINCTRL_PIN(MESON_PIN(GPIOX_15, EE_OFF), 0x5, 28,
MESON_PINCTRL_PIN(MESON_PIN(GPIOX_15), 0x5, 28,
MESON_FUNCTION(0x0, "gpio"),
MESON_FUNCTION(0x1, "tdma_out"), /*TDMA_OUT*/
MESON_FUNCTION(0x2, "tdma_out1"), /*TDMA_OUT1*/
MESON_FUNCTION(0x3, "tdma_in"), /*TDMA_IN*/
MESON_FUNCTION(0x4, "eth")), /*ETH_RX_DV*/
MESON_PINCTRL_PIN(MESON_PIN(GPIOX_16, EE_OFF), 0x6, 0,
MESON_PINCTRL_PIN(MESON_PIN(GPIOX_16), 0x6, 0,
MESON_FUNCTION(0x0, "gpio"),
MESON_FUNCTION(0x1, "i2c_b"), /*I2C_SCK_B*/
MESON_FUNCTION(0x2, "uart_b"), /*UART_TX_EE_B*/
MESON_FUNCTION(0x3, "pwm_d"), /*PWM_D*/
MESON_FUNCTION(0x4, "spi_b")), /*SPI_SS0_B*/
MESON_PINCTRL_PIN(MESON_PIN(GPIOX_17, EE_OFF), 0x6, 4,
MESON_PINCTRL_PIN(MESON_PIN(GPIOX_17), 0x6, 4,
MESON_FUNCTION(0x0, "gpio"),
MESON_FUNCTION(0x1, "i2c_b"), /*I2C_SDA_B*/
MESON_FUNCTION(0x2, "uart_b"), /*UART_RX_EE_B*/
MESON_FUNCTION(0x3, "pwm_c"), /*PWM_C*/
MESON_FUNCTION(0x4, "spi_b")), /*SPI_MOSI_B*/
MESON_PINCTRL_PIN(MESON_PIN(GPIOX_18, EE_OFF), 0x6, 8,
MESON_PINCTRL_PIN(MESON_PIN(GPIOX_18), 0x6, 8,
MESON_FUNCTION(0x0, "gpio"),
MESON_FUNCTION(0x1, "i2c_c"), /*I2C_SCK_C*/
MESON_FUNCTION(0x2, "uart_b"), /*UART_RTS_EE_B*/
MESON_FUNCTION(0x3, "pwm_a"), /*PWM_A*/
MESON_FUNCTION(0x4, "spi_b")), /*SPI_MISO_B*/
MESON_PINCTRL_PIN(MESON_PIN(GPIOX_19, EE_OFF), 0x6, 12,
MESON_PINCTRL_PIN(MESON_PIN(GPIOX_19), 0x6, 12,
MESON_FUNCTION(0x0, "gpio"),
MESON_FUNCTION(0x1, "i2c_c"), /*I2C_SDA_C*/
MESON_FUNCTION(0x2, "uart_b"), /*UART_CTS_EE_B*/
MESON_FUNCTION(0x3, "pwm_b"), /*PWM_B*/
MESON_FUNCTION(0x4, "spi_b")), /*SPI_CLK_B*/
MESON_PINCTRL_PIN(MESON_PIN(GPIOX_20, EE_OFF), 0x6, 16,
MESON_PINCTRL_PIN(MESON_PIN(GPIOX_20), 0x6, 16,
MESON_FUNCTION(0x0, "gpio"),
MESON_FUNCTION(0x1, "pwm_a")), /*PWM_A*/
MESON_PINCTRL_PIN(MESON_PIN(GPIOX_21, EE_OFF), 0x6, 20,
MESON_PINCTRL_PIN(MESON_PIN(GPIOX_21), 0x6, 20,
MESON_FUNCTION(0x0, "gpio"),
MESON_FUNCTION(0x4, "eth")), /*ETH_MDIO*/
MESON_PINCTRL_PIN(MESON_PIN(GPIOX_22, EE_OFF), 0x6, 24,
MESON_PINCTRL_PIN(MESON_PIN(GPIOX_22), 0x6, 24,
MESON_FUNCTION(0x0, "gpio"),
MESON_FUNCTION(0x4, "eth")), /*ETH_MDC*/
MESON_PINCTRL_PIN(MESON_PIN(GPIOY_0, EE_OFF), 0x8, 0,
MESON_PINCTRL_PIN(MESON_PIN(GPIOY_0), 0x8, 0,
MESON_FUNCTION(0x0, "gpio"),
MESON_FUNCTION(0x1, "eth")), /*ETH_MDIO*/
MESON_PINCTRL_PIN(MESON_PIN(GPIOY_1, EE_OFF), 0x8, 4,
MESON_PINCTRL_PIN(MESON_PIN(GPIOY_1), 0x8, 4,
MESON_FUNCTION(0x0, "gpio"),
MESON_FUNCTION(0x1, "eth")), /*ETH_MDC*/
MESON_PINCTRL_PIN(MESON_PIN(GPIOY_2, EE_OFF), 0x8, 8,
MESON_PINCTRL_PIN(MESON_PIN(GPIOY_2), 0x8, 8,
MESON_FUNCTION(0x0, "gpio"),
MESON_FUNCTION(0x1, "eth")), /*ETH_RGMII_RX_CLK*/
MESON_PINCTRL_PIN(MESON_PIN(GPIOY_3, EE_OFF), 0x8, 12,
MESON_PINCTRL_PIN(MESON_PIN(GPIOY_3), 0x8, 12,
MESON_FUNCTION(0x0, "gpio"),
MESON_FUNCTION(0x1, "eth")), /*ETH_RX_DV*/
MESON_PINCTRL_PIN(MESON_PIN(GPIOY_4, EE_OFF), 0x8, 16,
MESON_PINCTRL_PIN(MESON_PIN(GPIOY_4), 0x8, 16,
MESON_FUNCTION(0x0, "gpio"),
MESON_FUNCTION(0x1, "eth")), /*ETH_RXD0*/
MESON_PINCTRL_PIN(MESON_PIN(GPIOY_5, EE_OFF), 0x8, 20,
MESON_PINCTRL_PIN(MESON_PIN(GPIOY_5), 0x8, 20,
MESON_FUNCTION(0x0, "gpio"),
MESON_FUNCTION(0x1, "eth")), /*ETH_RXD1*/
MESON_PINCTRL_PIN(MESON_PIN(GPIOY_6, EE_OFF), 0x8, 24,
MESON_PINCTRL_PIN(MESON_PIN(GPIOY_6), 0x8, 24,
MESON_FUNCTION(0x0, "gpio"),
MESON_FUNCTION(0x1, "eth")), /*ETH_RXD2_RGMII*/
MESON_PINCTRL_PIN(MESON_PIN(GPIOY_7, EE_OFF), 0x8, 28,
MESON_PINCTRL_PIN(MESON_PIN(GPIOY_7), 0x8, 28,
MESON_FUNCTION(0x0, "gpio"),
MESON_FUNCTION(0x1, "eth")), /*ETH_RXD3_RGMII*/
MESON_PINCTRL_PIN(MESON_PIN(GPIOY_8, EE_OFF), 0x9, 0,
MESON_PINCTRL_PIN(MESON_PIN(GPIOY_8), 0x9, 0,
MESON_FUNCTION(0x0, "gpio"),
MESON_FUNCTION(0x1, "eth")), /*ETH_RGMII_TX_CLK*/
MESON_PINCTRL_PIN(MESON_PIN(GPIOY_9, EE_OFF), 0x9, 4,
MESON_PINCTRL_PIN(MESON_PIN(GPIOY_9), 0x9, 4,
MESON_FUNCTION(0x0, "gpio"),
MESON_FUNCTION(0x1, "eth")), /*ETH_TXEN*/
MESON_PINCTRL_PIN(MESON_PIN(GPIOY_10, EE_OFF), 0x9, 8,
MESON_PINCTRL_PIN(MESON_PIN(GPIOY_10), 0x9, 8,
MESON_FUNCTION(0x0, "gpio"),
MESON_FUNCTION(0x1, "eth")), /*ETH_TXD0*/
MESON_PINCTRL_PIN(MESON_PIN(GPIOY_11, EE_OFF), 0x9, 12,
MESON_PINCTRL_PIN(MESON_PIN(GPIOY_11), 0x9, 12,
MESON_FUNCTION(0x0, "gpio"),
MESON_FUNCTION(0x1, "eth")), /*ETH_TXD1*/
MESON_PINCTRL_PIN(MESON_PIN(GPIOY_12, EE_OFF), 0x9, 16,
MESON_PINCTRL_PIN(MESON_PIN(GPIOY_12), 0x9, 16,
MESON_FUNCTION(0x0, "gpio"),
MESON_FUNCTION(0x1, "eth")), /*ETH_TXD2_RGMII*/
MESON_PINCTRL_PIN(MESON_PIN(GPIOY_13, EE_OFF), 0x9, 20,
MESON_PINCTRL_PIN(MESON_PIN(GPIOY_13), 0x9, 20,
MESON_FUNCTION(0x0, "gpio"),
MESON_FUNCTION(0x1, "eth")), /*ETH_TXD3_RGMII*/
MESON_PINCTRL_PIN(MESON_PIN(GPIOY_14, EE_OFF), 0x9, 24,
MESON_PINCTRL_PIN(MESON_PIN(GPIOY_14), 0x9, 24,
MESON_FUNCTION(0x0, "gpio")),
MESON_PINCTRL_PIN(MESON_PIN(GPIOY_15, EE_OFF), 0x9, 28,
MESON_PINCTRL_PIN(MESON_PIN(GPIOY_15), 0x9, 28,
MESON_FUNCTION(0x0, "gpio")),
};
static const struct meson_desc_pin mesonaxg_aobus_pins[] = {
MESON_PINCTRL_PIN(MESON_PIN(GPIOAO_0, 0), 0x0, 0,
MESON_PINCTRL_PIN(MESON_PIN(GPIOAO_0), 0x0, 0,
MESON_FUNCTION(0x0, "gpio_ao"),
MESON_FUNCTION(0x1, "uart_ao_a")), /*UART_TX_AO_A*/
MESON_PINCTRL_PIN(MESON_PIN(GPIOAO_1, 0), 0x0, 4,
MESON_PINCTRL_PIN(MESON_PIN(GPIOAO_1), 0x0, 4,
MESON_FUNCTION(0x0, "gpio_ao"),
MESON_FUNCTION(0x1, "uart_ao_a")), /*UART_RX_AO_A*/
MESON_PINCTRL_PIN(MESON_PIN(GPIOAO_2, 0), 0x0, 8,
MESON_PINCTRL_PIN(MESON_PIN(GPIOAO_2), 0x0, 8,
MESON_FUNCTION(0x0, "gpio_ao"),
MESON_FUNCTION(0x1, "uart_ao_b"), /*UART_CTS_AO_B*/
MESON_FUNCTION(0x2, "uart_ao_a"), /*UART_CTS_AO_A*/
MESON_FUNCTION(0x3, "pwm_ao_b")), /* PWMAO_B */
MESON_PINCTRL_PIN(MESON_PIN(GPIOAO_3, 0), 0x0, 12,
MESON_PINCTRL_PIN(MESON_PIN(GPIOAO_3), 0x0, 12,
MESON_FUNCTION(0x0, "gpio_ao"),
MESON_FUNCTION(0x1, "uart_ao_b"), /*UART_RTS_AO_B*/
MESON_FUNCTION(0x2, "uart_ao_a"), /*UART_RTS_AO_A*/
MESON_FUNCTION(0x3, "pwm_ao_a"), /* PWMAO_A */
MESON_FUNCTION(0x4, "jtag")), /*JTAG_TDI */
MESON_PINCTRL_PIN(MESON_PIN(GPIOAO_4, 0), 0x0, 16,
MESON_PINCTRL_PIN(MESON_PIN(GPIOAO_4), 0x0, 16,
MESON_FUNCTION(0x0, "gpio_ao"),
MESON_FUNCTION(0x1, "uart_ao_b"), /*UART_TX_AO_B*/
MESON_FUNCTION(0x2, "i2c_ao"), /*I2C_SCK_AO*/
MESON_FUNCTION(0x4, "jtag")), /*JTAG_TDO */
MESON_PINCTRL_PIN(MESON_PIN(GPIOAO_5, 0), 0x0, 20,
MESON_PINCTRL_PIN(MESON_PIN(GPIOAO_5), 0x0, 20,
MESON_FUNCTION(0x0, "gpio_ao"),
MESON_FUNCTION(0x1, "uart_ao_b"), /*UART_RX_AO_B*/
MESON_FUNCTION(0x2, "i2c_ao"), /*I2C_SDA_AO*/
MESON_FUNCTION(0x4, "jtag")), /*JTAG_CLK */
MESON_PINCTRL_PIN(MESON_PIN(GPIOAO_6, 0), 0x0, 24,
MESON_PINCTRL_PIN(MESON_PIN(GPIOAO_6), 0x0, 24,
MESON_FUNCTION(0x0, "gpio"),
MESON_FUNCTION(0x1, "ir_in")), /*IR_REMOTE_INPUT*/
MESON_PINCTRL_PIN(MESON_PIN(GPIOAO_7, 0), 0x0, 28,
MESON_PINCTRL_PIN(MESON_PIN(GPIOAO_7), 0x0, 28,
MESON_FUNCTION(0x0, "gpio"),
MESON_FUNCTION(0x1, "ir_out"), /*IR_REMOTE_OUT*/
MESON_FUNCTION(0x4, "jtag")), /*JTAG_TMS*/
MESON_PINCTRL_PIN(MESON_PIN(GPIOAO_8, 0), 0x1, 0,
MESON_PINCTRL_PIN(MESON_PIN(GPIOAO_8), 0x1, 0,
MESON_FUNCTION(0x0, "gpio_ao"),
MESON_FUNCTION(0x1, "clk32"), /*CLK_32K_IN*/
MESON_FUNCTION(0x2, "i2c_ao"), /*I2C_SCK_AO*/
MESON_FUNCTION(0x3, "pwm_ao_c")), /*PWMAO_C */
MESON_PINCTRL_PIN(MESON_PIN(GPIOAO_9, 0), 0x1, 4,
MESON_PINCTRL_PIN(MESON_PIN(GPIOAO_9), 0x1, 4,
MESON_FUNCTION(0x0, "gpio_ao"),
MESON_FUNCTION(0x2, "i2c_ao"), /*I2C_SDA_AO*/
MESON_FUNCTION(0x3, "pwm_ao_d")), /*PWMAO_D */
MESON_PINCTRL_PIN(MESON_PIN(GPIOAO_10, 0), 0x1, 8,
MESON_PINCTRL_PIN(MESON_PIN(GPIOAO_10), 0x1, 8,
MESON_FUNCTION(0x0, "gpio_ao"),
MESON_FUNCTION(0x1, "i2c_slave_ao"),/*I2C_SLAVE_SCK_AO*/
MESON_FUNCTION(0x2, "i2c_ao")), /*I2C_SCK_AO */
MESON_PINCTRL_PIN(MESON_PIN(GPIOAO_11, 0), 0x1, 12,
MESON_PINCTRL_PIN(MESON_PIN(GPIOAO_11), 0x1, 12,
MESON_FUNCTION(0x0, "gpio_ao"),
MESON_FUNCTION(0x1, "i2c_slave_ao"),/*I2C_SLAVE_SDA_AO*/
MESON_FUNCTION(0x2, "i2c_ao")), /*I2C_SDA_AO */
MESON_PINCTRL_PIN(MESON_PIN(GPIOAO_12, 0), 0x1, 16,
MESON_PINCTRL_PIN(MESON_PIN(GPIOAO_12), 0x1, 16,
MESON_FUNCTION(0x0, "gpio_ao"),
MESON_FUNCTION(0x1, "clk12"), /*CLK12_24*/
MESON_FUNCTION(0x3, "pwm_ao_b")), /*PWMAO_B */
MESON_PINCTRL_PIN(MESON_PIN(GPIOAO_13, 0), 0x1, 20,
MESON_PINCTRL_PIN(MESON_PIN(GPIOAO_13), 0x1, 20,
MESON_FUNCTION(0x0, "gpio_ao"),
MESON_FUNCTION(0x1, "clk25"), /*CLK25_EE*/
MESON_FUNCTION(0x2, "gen_clk_ao"), /*GEN_CLK_AO */
MESON_FUNCTION(0x3, "pwm_ao_c"), /*PWMAO_C */
MESON_FUNCTION(0x4, "gen_clk")), /*GEN_CLK_EE*/
MESON_PINCTRL_PIN(MESON_PIN(GPIO_TEST_N, 0), 0x1, 24,
MESON_PINCTRL_PIN(MESON_PIN(GPIO_TEST_N), 0x1, 24,
MESON_FUNCTION(0x0, "gpio_ao")),
};
static struct meson_bank mesonaxg_periphs_banks[] = {
/* name first last irq pullen pull dir out in */
BANK("A", PIN(GPIOA_0, EE_OFF), PIN(GPIOA_20, EE_OFF), 40,
BANK("A", GPIOA_0, GPIOA_20, 40,
0, 0, 0, 0, 0, 0, 1, 0, 2, 0),
BANK("Y", PIN(GPIOY_0, EE_OFF), PIN(GPIOY_15, EE_OFF), 84,
BANK("Y", GPIOY_0, GPIOY_15, 84,
1, 0, 1, 0, 3, 0, 4, 0, 5, 0),
BANK("X", PIN(GPIOX_0, EE_OFF), PIN(GPIOX_22, EE_OFF), 61,
BANK("X", GPIOX_0, GPIOX_22, 61,
2, 0, 2, 0, 6, 0, 7, 0, 8, 0),
BANK("Z", PIN(GPIOZ_0, EE_OFF), PIN(GPIOZ_10, EE_OFF), 14,
BANK("Z", GPIOZ_0, GPIOZ_10, 14,
3, 0, 3, 0, 9, 0, 10, 0, 11, 0),
BANK("BOOT", PIN(BOOT_0, EE_OFF), PIN(BOOT_14, EE_OFF), 25,
BANK("BOOT", BOOT_0, BOOT_14, 25,
4, 0, 4, 0, 12, 0, 13, 0, 14, 0),
};
@@ -481,9 +479,9 @@ static struct meson_bank mesonaxg_periphs_banks[] = {
*/
static struct meson_bank mesonaxg_aobus_banks[] = {
/* name first last irq pullen pull dir out in */
BANK("AO", PIN(GPIOAO_0, 0), PIN(GPIOAO_13, 0), 0,
BANK("AO", GPIOAO_0, GPIOAO_13, 0,
0, 16, 0, 0, 0, 0, 0, 16, 1, 0),
BANK("TEST", PIN(GPIO_TEST_N, 0), PIN(GPIO_TEST_N, 0), -1,
BANK("TEST", GPIO_TEST_N, GPIO_TEST_N, -1,
0, 30, 0, 14, 0, 14, 0, 31, 1, 31),
};
@@ -491,7 +489,6 @@ static struct meson_domain_data mesonaxg_periphs_domain_data = {
.name = "periphs-banks",
.banks = mesonaxg_periphs_banks,
.num_banks = ARRAY_SIZE(mesonaxg_periphs_banks),
.pin_base = 15,
.num_pins = 86,
};
@@ -499,7 +496,6 @@ static struct meson_domain_data mesonaxg_aobus_domain_data = {
.name = "aobus-banks",
.banks = mesonaxg_aobus_banks,
.num_banks = ARRAY_SIZE(mesonaxg_aobus_banks),
.pin_base = 0,
.num_pins = 15,
};

1186
drivers/amlogic/pinctrl/pinctrl_gxl.c
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