From fd65ecb2e4530d816fb3dc0a3a6080ef191110e2 Mon Sep 17 00:00:00 2001 From: Tao Huang Date: Mon, 8 Oct 2018 19:48:14 +0800 Subject: [PATCH] Revert "clk: rockchip: rk1808: fix PMU_CRU offset" This reverts commit 3e9d3367b9300edfdd022026627510de5700e50b. PMU_CRU offset is 0x4000 Change-Id: Ibce2c7fc6b7995c128dde4809446b1b428f893aa Signed-off-by: Tao Huang --- drivers/clk/rockchip/clk.h | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/clk/rockchip/clk.h b/drivers/clk/rockchip/clk.h index 61d7a5aedcfd..3056082c37ba 100644 --- a/drivers/clk/rockchip/clk.h +++ b/drivers/clk/rockchip/clk.h @@ -107,10 +107,10 @@ struct clk; #define RK1808_EMMC_CON0 0x390 #define RK1808_EMMC_CON1 0x394 -#define RK1808_PMU_PLL_CON(x) ((x) * 0x4 + 0xc000) -#define RK1808_PMU_MODE_CON 0xc020 -#define RK1808_PMU_CLKSEL_CON(x) ((x) * 0x4 + 0xc040) -#define RK1808_PMU_CLKGATE_CON(x) ((x) * 0x4 + 0xc080) +#define RK1808_PMU_PLL_CON(x) ((x) * 0x4 + 0x4000) +#define RK1808_PMU_MODE_CON 0x4020 +#define RK1808_PMU_CLKSEL_CON(x) ((x) * 0x4 + 0x4040) +#define RK1808_PMU_CLKGATE_CON(x) ((x) * 0x4 + 0x4080) #define RK2928_PLL_CON(x) ((x) * 0x4) #define RK2928_MODE_CON 0x40