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arm64: dts: px30: support cpu/cluster idle

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Change-Id: I41b08eb568471dcf1537cb7afa637bdf6a7df2c8
Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>
This commit is contained in:
XiaoDong Huang
2018-03-22 10:57:28 +08:00
committed by Tao Huang
parent dd37ccac7f
commit fd769fde5b
2 changed files with 35 additions and 1 deletions
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2
Documentation/devicetree/bindings/timer/rockchip,rk-timer.txt
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@@ -2,7 +2,7 @@ Rockchip rk timer
Required properties: Required properties:
- compatible: shall be one of: - compatible: shall be one of:
"rockchip,rk3288-timer" - for rk3036, rk3188, rk322x, rk3288, rk3368 "rockchip,rk3288-timer" - for px30, rk3036, rk3188, rk322x, rk3288, rk3368
"rockchip,rk3399-timer" - for rk3399 "rockchip,rk3399-timer" - for rk3399
- reg: base address of the timer register starting with TIMERS CONTROL register - reg: base address of the timer register starting with TIMERS CONTROL register
- interrupts: should contain the interrupts for Timer0 - interrupts: should contain the interrupts for Timer0

34
arch/arm64/boot/dts/rockchip/px30.dtsi
View File

@@ -53,6 +53,7 @@
#cooling-cells = <2>; #cooling-cells = <2>;
dynamic-power-coefficient = <90>; dynamic-power-coefficient = <90>;
operating-points-v2 = <&cpu0_opp_table>; operating-points-v2 = <&cpu0_opp_table>;
cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;
}; };
cpu1: cpu@1 { cpu1: cpu@1 {
@@ -61,6 +62,7 @@
reg = <0x0 0x1>; reg = <0x0 0x1>;
enable-method = "psci"; enable-method = "psci";
operating-points-v2 = <&cpu0_opp_table>; operating-points-v2 = <&cpu0_opp_table>;
cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;
}; };
cpu2: cpu@2 { cpu2: cpu@2 {
device_type = "cpu"; device_type = "cpu";
@@ -68,6 +70,7 @@
reg = <0x0 0x2>; reg = <0x0 0x2>;
enable-method = "psci"; enable-method = "psci";
operating-points-v2 = <&cpu0_opp_table>; operating-points-v2 = <&cpu0_opp_table>;
cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;
}; };
cpu3: cpu@3 { cpu3: cpu@3 {
device_type = "cpu"; device_type = "cpu";
@@ -75,6 +78,29 @@
reg = <0x0 0x3>; reg = <0x0 0x3>;
enable-method = "psci"; enable-method = "psci";
operating-points-v2 = <&cpu0_opp_table>; operating-points-v2 = <&cpu0_opp_table>;
cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;
};
idle-states {
entry-method = "psci";
CPU_SLEEP: cpu-sleep {
compatible = "arm,idle-state";
local-timer-stop;
arm,psci-suspend-param = <0x0010000>;
entry-latency-us = <120>;
exit-latency-us = <250>;
min-residency-us = <900>;
};
CLUSTER_SLEEP: cluster-sleep {
compatible = "arm,idle-state";
local-timer-stop;
arm,psci-suspend-param = <0x1010000>;
entry-latency-us = <400>;
exit-latency-us = <500>;
min-residency-us = <2000>;
};
}; };
}; };
@@ -742,6 +768,14 @@
status = "disabled"; status = "disabled";
}; };
rktimer: rktimer@ff210000 {
compatible = "rockchip,rk3288-timer";
reg = <0x0 0xff210000 0x0 0x1000>;
interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH 0>;
clocks = <&cru PCLK_TIMER>, <&cru SCLK_TIMER0>;
clock-names = "pclk", "timer";
};
amba { amba {
compatible = "simple-bus"; compatible = "simple-bus";
#address-cells = <2>; #address-cells = <2>;