From ff85829e05368d9289e58b5b9d294ff2fa19f760 Mon Sep 17 00:00:00 2001
From: Elaine Zhang <zhangqing@rock-chips.com>
Date: Thu, 19 Nov 2020 10:46:05 +0800
Subject: [PATCH] arm64: dts: rockchip: rk3568: add mpll node

MPLL is the clock on the security cru, configured with 800M in security,
which can be used by GPU.

Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Change-Id: Ie20ebda1b9976c7da60f278c3d744937a8451747
---
 arch/arm64/boot/dts/rockchip/rk3568.dtsi | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3568.dtsi b/arch/arm64/boot/dts/rockchip/rk3568.dtsi
index 4831c4fc5a84..653a0596e645 100644
--- a/arch/arm64/boot/dts/rockchip/rk3568.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3568.dtsi
@@ -213,6 +213,13 @@
 		#clock-cells = <0>;
 	};
 
+	mpll: mpll {
+		compatible = "fixed-clock";
+		#clock-cells = <0>;
+		clock-frequency = <800000000>;
+		clock-output-names = "mpll";
+	};
+
 	xin24m: xin24m {
 		compatible = "fixed-clock";
 		#clock-cells = <0>;