From ff9bbf0db5dc4928731bb8cf1b9c27faaf4ca58c Mon Sep 17 00:00:00 2001 From: Elaine Zhang Date: Mon, 12 Jun 2023 11:41:21 +0800 Subject: [PATCH] arm64: dts: rockchip: rk3588: Fixed the rkvenc1 init frequency Make sure that the init frequency is within the design range Fixes: fd4c1a5ee2fe ("arm64: dts: rockchip: rk3588: Fixed the init frequency") Signed-off-by: Elaine Zhang Change-Id: I62d9f2c5c87663f17b0f1dbff9b2109d05b5a5fa --- arch/arm64/boot/dts/rockchip/rk3588s.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi index 13bb83867fd1..7df9e84add24 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi @@ -3409,9 +3409,9 @@ interrupt-names = "irq_rkvenc1"; clocks = <&cru ACLK_RKVENC1>, <&cru HCLK_RKVENC1>, <&cru CLK_RKVENC1_CORE>; clock-names = "aclk_vcodec", "hclk_vcodec", "clk_core"; - rockchip,normal-rates = <600000000>, <0>, <800000000>; + rockchip,normal-rates = <500000000>, <0>, <800000000>; assigned-clocks = <&cru ACLK_RKVENC1>, <&cru CLK_RKVENC1_CORE>; - assigned-clock-rates = <600000000>, <800000000>; + assigned-clock-rates = <500000000>, <800000000>; resets = <&cru SRST_A_RKVENC1>, <&cru SRST_H_RKVENC1>, <&cru SRST_RKVENC1_CORE>; reset-names = "video_a", "video_h", "video_core"; rockchip,skip-pmu-idle-request;