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Author SHA1 Message Date
Huibin Hong
8bbdc17821 arm64: rockchip_linux_defconfig: enable ARM64_PSEUDO_NMI 
Signed-off-by: Huibin Hong <huibin.hong@rock-chips.com>
Change-Id: Ied7ee74d250c8f56c0545a8e2c4a3b480a361b72
 2021-12-21 19:32:47 +08:00
Huibin Hong
c87fd4d0d4 arm64: rockchip_defconfig: enable ARM64_PSEUDO_NMI 
Signed-off-by: Huibin Hong <huibin.hong@rock-chips.com>
Change-Id: I0a765fcf5740353dc1a092cf63604a3cf5099a67
 2021-12-21 19:32:47 +08:00
Huibin Hong
58e8ae42ae fiq debugger: support nmi mode 
Signed-off-by: Huibin Hong <huibin.hong@rock-chips.com>
Change-Id: I1c3b3591d1760eba773a7d754530e70e80118893
 2021-12-21 19:32:47 +08:00
Guochun Huang
69622cf227 arm64: dts: rockchip: add route_dsi0/1 for rk3588 evb 
Signed-off-by: Guochun Huang <hero.huang@rock-chips.com>
Change-Id: Ic4c04cc5229a6b7363f690fa84998f3658ca3fd2
 2021-12-21 19:10:33 +08:00
Li Huang
3b60b0cbdb video: rockchip: rga3: Fixup wrong r2y csc convert on rga3 
Signed-off-by: Li Huang <putin.li@rock-chips.com>
Change-Id: Ic2d3737152268e9c6f6f5504a691289b82c5151e
 2021-12-21 19:06:57 +08:00
Jon Lin
c7c9c50b55 arm64: dts: rockchip: rk3588: Set the default value of spi data strength to level1 
1.The EVB signal test of this configuration is good.
2.This confitguration is compatible with 16MHz and 50MHz SI test case.

Change-Id: Ie259e2e8229d68013efa13278b0479c5dc73739c
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
 2021-12-21 18:23:31 +08:00
Jon Lin
6a0b6f63ed arm64: dts: rockchip: rk3588s: remove spi high-speed pinctrl configuration 
Change-Id: Ibde8d4498f0bd056803aafdad71a09d925a7927a
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
 2021-12-21 18:23:31 +08:00
Jon Lin
88700feb96 arm64: dts: rockchip: rk3588s-evb4-lp4x: remove spi high-speed pinctrl configuration 
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
Change-Id: I2096aec71a3a6cea31199e832d73d2acbeac843d
 2021-12-21 18:23:31 +08:00
Jon Lin
5eb1bc4ab4 spi: rockchip-test: Support more devcies 
Change-Id: I6fac8ab28095396aa21f6b696e8cfb2984862b86
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
 2021-12-21 18:23:03 +08:00
Finley Xiao
f12b2a431a arm64: dts: rockchip: rk3588: Modify opp table for gpu 
Use scmi clk for gpu.

Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Change-Id: I395baa35afd9719d02c4f70ba428b9bf917a66f8
 2021-12-21 18:13:32 +08:00
Finley Xiao
38f95dea72 arm64: dts: rockchip: rk3588s: Add volt-mem-read-margin for gpu 
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Change-Id: Ib6b50a308321e5940a938d55099673297ec30fb7
 2021-12-21 18:13:26 +08:00
Finley Xiao
34af47df70 MALI: bifrost: Implement rk3588_gpu_set_read_margin() 
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Change-Id: I02ea2bc1feb987b94832182ee7ea94fd1b4ee6cf
 2021-12-21 18:13:20 +08:00
Finley Xiao
b962421460 MALI: bifrost: change BASE_MAX_NR_CLOCKS_REGULATORS to 4 
Add a new scmi clk for changing gpu clock rate.

Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Change-Id: Ib2496a528a44a4106e1becf0d99335e207d85667
 2021-12-21 18:13:12 +08:00
Finley Xiao
d805bd29b1 arm64: dts: rockchip: rk3588: Modify opp table for cpub 
Use scmi clk for cpub.

Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Change-Id: I08ad60860a14d7bbe4c6f726f66a2eb40db610d6
 2021-12-21 15:14:22 +08:00
Finley Xiao
eedb02740c arm64: dts: rockchip: rk3588s: Add volt-mem-read-margin for cpub 
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Change-Id: Ieb99848f01503da84e1d79f1b1ff4dbdafb55aa1
 2021-12-21 15:14:05 +08:00
Finley Xiao
8ee8a15511 arm64: dts: rockchip: rk3588-rk806: Change max microvolt to 1050mV for cpub 
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Change-Id: I2a6f5359826e1963e7684598927b539e97b313b7
 2021-12-21 15:13:10 +08:00
Finley Xiao
75997fe10d cpufreq: rockchip: Implement rk3588_cpu_set_read_margin() 
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Change-Id: I3a15176f783cfc311299dc0e59e718d6c57fefd1
 2021-12-21 15:10:39 +08:00
Finley Xiao
ddd6a0b49a soc: rockchip: opp_select: Add struct rockchip_opp_info 
Add support to get soc info and set voltage read margin.

Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Change-Id: I254a92ba124655e3efc4922a7425c1f13d384adf
 2021-12-21 15:01:01 +08:00
Jianhui Wang
8136b9a8ac arm64: dts: rockchip: rk3588s-tablet: enable charge animation 
Signed-off-by: Jianhui Wang <wjh@rock-chips.com>
Change-Id: Id08c71e7495e35a822710e9468224495df3ab767
 2021-12-21 11:30:01 +08:00
Shaoxing Chen
fd0fb9aaf3 arm64: dts: rockchip: Change i2c0 pinctrl to i2c0m2 for rk3588s-evb4 
Signed-off-by: Shaoxing Chen <csx@rock-chips.com>
Change-Id: Icc98f1cc5b5f84e61be656a64c0158f836cd8bb2
 2021-12-21 11:13:29 +08:00
Jianhui Wang
90d8cc803e arm64: dts: rockchip: rk3588s-tablet: mpp: rkvenc2: Fix dual core issue 
Signed-off-by: Jianhui Wang <wjh@rock-chips.com>
Change-Id: I5559206fbd6329c152b66ee20d920e29f767efb5
 2021-12-21 11:09:40 +08:00
Wangqiang Guo
4cddee210f power: supply: bq25703: Delete unnecessary work queues 
Signed-off-by: Wangqiang Guo <kay.guo@rock-chips.com>
Change-Id: I6a0be2b5977f25bea37ee2c46417697f5885972b
 2021-12-21 10:56:14 +08:00
Hongjin Li
c8d1352dd9 arm64: dts: rockchip: Enable jpege ccu, mmu and cores for rk3588 evb/nvr 
Modify the device tree of different platforms,
enable jpege core, mmu and ccu.

Signed-off-by: Hongjin Li <vic.hong@rock-chips.com>
Change-Id: I741d27934e7ca65536b4eb032ebec083ea181462
 2021-12-20 20:04:28 +08:00
Hongjin Li
62212251f6 video: rockchip: mpp: vepu2: Modify core_id, adapted jpege cores 
Create a new folder under proc according to core_id

Change-Id: I3750a94246c1b0abbb2eec178a272602aecc8e0c
Signed-off-by: Hongjin Li <vic.hong@rock-chips.com>
 2021-12-20 19:40:39 +08:00
Hongjin Li
f0fa0c6217 arm64: dts: rockchip: rk3588: Modify the jpeg encoding device tree 
Modify the label of the jpeg-encoded device node

Change-Id: If34ae2e13fd5813eea0e16f26ab0dff8d5e3b212
Signed-off-by: Hongjin Li <vic.hong@rock-chips.com>
 2021-12-20 19:39:19 +08:00
Hongjin Li
64707a83e1 video: rockchip: mpp: vepu2: Modify vepu2 shutdown when ccu is enabled 
Process the shutdown of vepu2 according to whether ccu is enabled

Change-Id: I54d5839d31540fb8a4e5f96e1d13d558daa29a4e
Signed-off-by: Hongjin Li <vic.hong@rock-chips.com>
 2021-12-20 19:28:20 +08:00
Elaine Zhang
3169038e48 clk: rockchip: rk3588: modify dclk max prate to 594M 
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Change-Id: I3b96d53a89fd9e86a534b120b2e5f02a71c8848f
 2021-12-20 18:46:22 +08:00
Nickey Yang
2110967774 Revert "arm64: dts: rockchip: add rk3588 pc demo board" 
This reverts commit ce731352ff.

Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com>
Change-Id: Icd659f3adc263398b46013ee1c1926886af1846b
 2021-12-20 17:24:15 +08:00
XiaoTan Luo
85c295956e arm64: dts: rockchip: rk3588-evb: change hdmi sound name to support pulseaudio ucm2 
Signed-off-by: XiaoTan Luo <lxt@rock-chips.com>
Change-Id: Icdd01e2fbcc0cc8738eaa8e0e91e534815a37df6
 2021-12-20 14:29:13 +08:00
XiaoTan Luo
d8c83dc4e3 arm64: dts: rockchip: rk3588-evb1-lp4: change es8388 sound card name 
pulseaudio ucm2 config can not handle the character "," or long name,
so change it.

Signed-off-by: XiaoTan Luo <lxt@rock-chips.com>
Change-Id: I79cfc70089227cceb9d792c171551f1d95eb6ded
 2021-12-20 14:27:31 +08:00
Ding Wei
7ffe0e5793 iommu/rockchip: If shootdown_entire set, not zap, when iommu unmap 
Change-Id: I99241903e186da764c1e1ee9042c63de5cf71e74
Signed-off-by: Ding Wei <leo.ding@rock-chips.com>
 2021-12-20 14:22:15 +08:00
Shunhua Lan
9e859cce5f arm64: dts: rockchip: rk3588s-tablet: use multicodecs instead of simple-audio-card 
Signed-off-by: Shunhua Lan <lsh@rock-chips.com>
Change-Id: I6c4b970fbbe42dd5bf185b75eae6ba6cad1657c5
 2021-12-20 12:07:32 +08:00
Damon Ding
6d0528b160 arm64: dts: rockchip: rk3588: mount rgb node on sys_grf node 
The clk_inv feature of rgb depends on the sys_grf.

Signed-off-by: Damon Ding <damon.ding@rock-chips.com>
Change-Id: Id2588f6c389b2e53c7260670e4d4fe9e8c6b9aea
 2021-12-20 11:50:56 +08:00
Zefa Chen
cc74e23cf4 media: rockchip: rkcif fixed some format err for bt1120/bt656 
Signed-off-by: Zefa Chen <zefa.chen@rock-chips.com>
Change-Id: Ia992d800a68e4045662ccd7445d55913bc77e287
 2021-12-20 11:28:49 +08:00
Zain Wang
b9ef4803ff arm64: dts: rockchip: add rk3588-nvr-demo-v10-ipc-4x-linux.dts 
rk3588 nvr demo add four cameras config of imx464

Signed-off-by: Yiqing Zeng <zack.zeng@rock-chips.com>
Signed-off-by: Zain Wang <wzz@rock-chips.com>
Change-Id: Ifb4a7960efb3544595a0b70a2fdb97829c40e51c
 2021-12-17 18:46:35 +08:00
Wyon Bi
9d4c703bdf drm/bridge: analogix_dp: Fix AUX channel access error handling 
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
Change-Id: Ie06285f729ff6a02f8ccdea51de16757df7abf4d
 2021-12-17 17:35:34 +08:00
Wang Panzhenzhuan
50a4c0688f media: i2c: add sensor driver gc08a3 
Signed-off-by: Wang Panzhenzhuan <randy.wang@rock-chips.com>
Change-Id: If638ad4847f90fe16455b2152cd04fd10128bbb8
 2021-12-17 16:17:57 +08:00
Tao Huang
075efac6c8 phy: rockchip: csi2-dphy: Remove unused variable csi2dphy_dev_mutex 
drivers/phy/rockchip/phy-rockchip-csi2-dphy.c:32:21: warning: unused variable 'csi2dphy_dev_mutex' [-Wunused-variable]
static DEFINE_MUTEX(csi2dphy_dev_mutex);
                    ^

Fixes: d9b335b5d8 ("phy: rockchip: csi2-dphy: fix compile error")
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
Change-Id: I51d1ff99ccd762d1968964ddbb3974f7d9b173cd
 2021-12-16 19:08:25 +08:00
Algea Cao
6b84df2152 drm/rockchip: dw_hdmi: Support rk3588 hdr10 
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
Change-Id: Ib7618b7627fca48efe4a9812a1b60106b9e1b834
 2021-12-16 19:06:51 +08:00
Li Huang
157ec69b58 video: rockchip: rga3: Update version to 1.1.7 
Complete policy judgtment on rd_mode

Signed-off-by: Li Huang <putin.li@rock-chips.com>
Change-Id: I1a29357e2bbbc3739cd0b0946cc3f45d46468f49
 2021-12-16 16:44:22 +08:00
Li Huang
882ca19fdf video: rockchip: rga3: RGA3 support vir address with IOMMU 
Signed-off-by: Li Huang <putin.li@rock-chips.com>
Change-Id: I5e06e323b5e544fc62944aa1d27539af874278de
 2021-12-16 16:23:28 +08:00
Andy Yan
0faa161629 arm64: dts: rockchip: Enable eDP logo for rk3588s-evb1-lp4x 
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Change-Id: Ie406e717796243ba32f6c88856b4927a167c20c4
 2021-12-16 15:52:02 +08:00
Damon Ding
99e6d9420b arm64: dts: rockchip: rk3588: enable route_dsi for evb 
Signed-off-by: Damon Ding <damon.ding@rock-chips.com>
Change-Id: I98465f2f5c1a1ba8b52f848f475e3ad078f2565a
 2021-12-16 15:52:02 +08:00
Andy Yan
7d8e2d7447 arm64: dts: rockchip: Add drm-logo memory-region for rk3588-android 
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Change-Id: Ic19e3c48bc4134a405968185eac20ecbf923f0f0
 2021-12-16 15:52:02 +08:00
Damon Ding
88db12f927 arm64: dts: rockchip: rk3588: add route node for logo display 
Signed-off-by: Damon Ding <damon.ding@rock-chips.com>
Change-Id: Iaa015bcdcec02bcec8a1b926b761bd59494d7c29
 2021-12-16 15:52:02 +08:00
Damon Ding
9e02641588 arm64: dts: rockchip: rk3588: modify driver strength for bt656 pins 
According to the SI report, reduce the driver strength
from 40ohm to 50ohm.

Signed-off-by: Damon Ding <damon.ding@rock-chips.com>
Change-Id: Iffd65851dfe6ac8032764a3fb44334d5c3dcd154
 2021-12-16 11:24:05 +08:00
Wang Panzhenzhuan
8159a8ebd3 media: i2c: imx415: fix get mode & change format issues 
1. fix set_fmt & ioctl get mode unmatched issue.
2. need to set default vblank when change format.
3. enum all supported mode mbus_code, not just cur_mode.

Signed-off-by: Wang Panzhenzhuan <randy.wang@rock-chips.com>
Change-Id: Ibca6481e11d8f97ce8827ff753c5f0afdf6f809c
 2021-12-16 11:22:08 +08:00
Zhang Yubing
f7f93c659c phy: rockchip: usbdp: optimize phy power consumption 
When usb dp phy config as USB + DP mode, the phy clk is work
and the dp lane is enabled by initial action, whether the dp
function need work or not. In the case only usb function
work, which will consume more power.

To improve this issue, we release the dp phy pll reset and
enable the dp lane when dp power on.

Signed-off-by: Zhang Yubing <yubing.zhang@rock-chips.com>
Change-Id: I678edc130ddef07f85b007577089a9689e12e2d4
 2021-12-16 11:16:43 +08:00
Frank Wang
8794953a3e arm64: dts: rockchip: rk3588: add utmi clk for usbdp phy 
In the current implementation, the U3 PHY init is invoked earlier than
U2 PHY by DWC3 controller. However, the DWC3 needs UTMI clock provided
by U2 PHY when U3 PHY is ready, without this dependence, the DWC3 gadget
may be abnormal while the cable switch to U2 port from U3 port.
So exporse the UTMI clock to U3 PHY to fix it simply.

Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
Change-Id: Id20e65dde5bff3b5eccf8325e7010351aaa65654
 2021-12-16 10:51:42 +08:00
Cai YiWei
1bedc1faa4 media: rockchip: isp: 3a params config first 
Change-Id: I1ef172650a6ac3a7cd5d71d53e9adfefd0c8af1e
Signed-off-by: Cai YiWei <cyw@rock-chips.com>
 2021-12-16 10:21:21 +08:00