Commit Graph

1066174 Commits

Author SHA1 Message Date
Elon Zhang
a42bf32b08 arm64: dts: rockchip: add optee node
Remove default optee node in SoC core devicetree because optee
is not an inherent component in SoC.

Add optee node to supply OP-TEE required properties for Android
products which need OP-TEE enable default.

Change-Id: I0754a3498c5e6d7b7db57bb35c42c3875afd27c9
Signed-off-by: Elon Zhang <zhangzj@rock-chips.com>
2021-11-02 18:03:02 +08:00
Lee Jones
aee113fcef ANDROID: Incremental fs: Fix dentry get/put imbalance on vfs_mkdir() failure
Syz{bot,kaller} reports[0]:

  BUG: Dentry ffff888119d8a000{i=0,n=.index}  still in use (1) [unmount of ramfs ramfs]
  ------------[ cut here ]------------
  WARNING: CPU: 0 PID: 367 at fs/dcache.c:1616 umount_check+0x18d/0x1d0 fs/dcache.c:1607
  Modules linked in:
  CPU: 0 PID: 367 Comm: syz-executor388 Not tainted 5.10.75-syzkaller-01082-g234d53d2bb60 #0
  Hardware name: Google Compute Engine/Google Compute Engine, BIOS Google 01/01/2011
  RIP: 0010:umount_check+0x18d/0x1d0 fs/dcache.c:1607
  Code: 8b 0b 49 81 c6 f8 03 00 00 48 c7 c7 00 40 2e 85 4c 89 e6 48 8b 55 d0 4c 89 e1 45 89 f8 31 c0 41 56 e8 ae d9 9e ff 48 83 c4 08 <0f> 0b e9 f1 fe ff ff 89 d9 80 e1 07 80 c1 03 38 c1 0f 8c c9 fe ff
  RSP: 0018:ffffc9000096f770 EFLAGS: 00010292
  RAX: 0000000000000055 RBX: ffffffff866af200 RCX: 1ad6b89836e5b500
  RDX: 0000000000000000 RSI: 0000000000000002 RDI: 0000000000000000
  RBP: ffffc9000096f7a0 R08: ffffffff81545368 R09: 0000000000000003
  R10: fffff5200012de41 R11: 0000000000000004 R12: ffff888119d8a000
  R13: dffffc0000000000 R14: ffff88811d7373f8 R15: 0000000000000001
  FS:  0000000000000000(0000) GS:ffff8881f7000000(0000) knlGS:0000000000000000
  CS:  0010 DS: 0000 ES: 0000 CR0: 0000000080050033
  CR2: 00007f01b7bddb68 CR3: 000000010c4f0000 CR4: 00000000003506b0
  DR0: 0000000000000000 DR1: 0000000000000000 DR2: 0000000000000000
  DR3: 0000000000000000 DR6: 00000000fffe0ff0 DR7: 0000000000000400
  Call Trace:
   d_walk+0x309/0x540 fs/dcache.c:1326
   do_one_tree fs/dcache.c:1623 [inline]
   shrink_dcache_for_umount+0x8e/0x1b0 fs/dcache.c:1639
   generic_shutdown_super+0x66/0x2c0 fs/super.c:447
   kill_anon_super fs/super.c:1108 [inline]
   kill_litter_super+0x75/0xa0 fs/super.c:1117
   ramfs_kill_sb+0x44/0x50 fs/ramfs/inode.c:270
   deactivate_locked_super+0xb0/0x100 fs/super.c:335
   deactivate_super+0xa5/0xd0 fs/super.c:366
   cleanup_mnt+0x45f/0x510 fs/namespace.c:1118
   __cleanup_mnt+0x19/0x20 fs/namespace.c:1125
   task_work_run+0x147/0x1b0 kernel/task_work.c:154
   exit_task_work include/linux/task_work.h:30 [inline]
   do_exit+0x70e/0x23a0 kernel/exit.c:813
   do_group_exit+0x16a/0x2d0 kernel/exit.c:910
   get_signal+0x133e/0x1f80 kernel/signal.c:2790
   arch_do_signal+0x8d/0x620 arch/x86/kernel/signal.c:805
   exit_to_user_mode_loop kernel/entry/common.c:161 [inline]
   exit_to_user_mode_prepare+0xaa/0xe0 kernel/entry/common.c:191
   syscall_exit_to_user_mode+0x24/0x40 kernel/entry/common.c:266
   do_syscall_64+0x3d/0x70 arch/x86/entry/common.c:56
   entry_SYSCALL_64_after_hwframe+0x44/0xa9
  RIP: 0033:0x7f01b7b884f9
  Code: Unable to access opcode bytes at RIP 0x7f01b7b884cf.
  RSP: 002b:00007f01b7b19308 EFLAGS: 00000246 ORIG_RAX: 00000000000000ca
  RAX: fffffffffffffe00 RBX: 00007f01b7c103f8 RCX: 00007f

Which was due to a missing dput() before returning from a vfs_mkdir() failure.

Bug: 203827798
Link: [0] https://syzkaller.appspot.com/bug?extid=81b5ca9b2848f4dad8fa
Reported-by: syzbot+81b5ca9b2848f4dad8fa@syzkaller.appspotmail.com
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Change-Id: Iaef9aa0aecc964645aaca5fe8d79388ae28527bd
2021-11-02 09:01:06 +00:00
Tao Huang
34b8de920b arm64: rockchip_gki.config: Enable CONFIG_SND_SOC_ROCKCHIP_I2S/SPDIFRX
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
Change-Id: I6465604705f6c4d03059cdf01275949a6833a64b
2021-11-02 15:26:39 +08:00
Sugar Zhang
0e437bc40b arm64: rockchip_defconfig: Enable i2s/spdifrx config
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Change-Id: Ie6e49d1a48acab3e3e1aa74ba8394d7b5df7bd81
2021-11-02 15:25:04 +08:00
Sugar Zhang
0e5036c7b4 ASoC: rockchip: Add support for spdif receiver
The SPDIF receiver is a self-clocking, serial, unidirectional
interface for the interconnection of digital audio equipment
for consumer and professional applications.

Change-Id: Ic73337671b37c8c45352e523a875281edd552d1b
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
2021-11-02 15:24:42 +08:00
William Wu
9228f832cd arm64: dts: rockchip: rk3588: add usb nodes for evbs
This patch add vbus regulator and fusb302 nodes for
rk3588 and rk3588s evbs, and also disable unused usb
controllers and phys node.

Signed-off-by: William Wu <william.wu@rock-chips.com>
Change-Id: I59678e7cd34de76ed09cc55010a1d8533fe58602
2021-11-02 15:15:52 +08:00
Lin Jinhan
b56b10f007 arm64: dts: rockchip: rk3588s: add rng node
Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
Change-Id: Ifb8964053daa6b593dd2c2c6a3b8caab8526e56d
2021-11-02 15:12:50 +08:00
Lin Jinhan
c6aead9a16 arm64: dts: rockchip: rk3588s: add crypto node
Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
Change-Id: I516df4d5719f101c92fc39dd7b62af1a80c40777
2021-11-02 15:07:02 +08:00
Jianqun Xu
17e9559f67 arm64: dts: rockchip: rk356x-evb: fix pcie supply to regulator-fixed
The pcie supply design is (rk3566 evb2 example)
DC12V
  -> VCC12V_PCIE(controlled by GPIO0_C2_H)
  -> VCC3V3_PCIE(controlled by GPIO0_C2_H)
  -> VCC5V0_SYS
       -> VCC3V3_PI6C(controlled by GPIO0_C2_H)

The pci phy driver only want to enable or disable the VCC3V3_PCIE power.

Suggested from pcie owner to ignore the VCC12V_PCIE and VCC3V3_PI6C, so
the dts only need to add regulator node for VCC3V3_PCIE.

Most of time we keep the regulator name same as the hardware design, so
the dts node is
    vcc3v3_pcie: gpio-regulator {
        compatible = "regulator-fixed";
        regulator-name = "vcc3v3_pcie";
        regulator-min-microvolt = <3300000>;
        regulator-max-microvolt = <3300000>;
        enable-active-high;
        gpio = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>;
        vin-supply = <&dc_12v>;
    };

The regulator type is "regulator-fixed" since its voltage always be
3.3v, min and max should be 3300000 make the regulator has a voltage
value.

The regulator can be enabled or disabled by regulator_enable or
regulator_disable function, so make the GPIO0_B7 as "ena_pin" for the
regulator.

The regulator is supplied by DCIN_12V, so add the vin-supply.

Some boards need a delay before enabling trainning for power to be
stable from the measurement.

By measurement, 5ms is enough for power and refclk to be stable.

Change-Id: Iaf70abe9c9e06504af067dc0e3d60b775557c026
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
2021-11-02 14:43:52 +08:00
Jianqun Xu
eff93358f1 pci: dwc: rockchip: fix pci power enable/disable
Change-Id: I4337746b7db995b3c6de29b50b9edc7a6bc10a81
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
2021-11-02 14:38:57 +08:00
Shawn Lin
959a4d84f2 mmc: dw_mmc-rockchip: Improve v2 tuning
v2 tuning has a defect that if invalid space is laid
between 90 and 180, and the PVT might make the invalid
space back and forth. To overcome this weakness, we don't
need to select phase from beginning, and should directly
chose the next one against the last phase selected.

Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Change-Id: I0cbeb1dba524c2e23a3719d28b868af3ed49e20b
2021-11-02 14:38:57 +08:00
Guochun Huang
a124131bab drm/rockchip: dsi: add to get dsc info from dts
Change-Id: Idbf1503e775a26d24ba1965495d531e30b7cc6c6
Signed-off-by: Guochun Huang <hero.huang@rock-chips.com>
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
2021-11-02 10:25:20 +08:00
Liujie Xie
9cafb6afaa ANDROID: GKI: Update symbols to symbol list
Update symbols to symbol list externed by oem modules.

Leaf changes summary: 2 artifacts changed
Changed leaf types summary: 0 leaf type changed
Removed/Changed/Added functions summary: 0 Removed, 0 Changed, 1 Added function
Removed/Changed/Added variables summary: 0 Removed, 0 Changed, 1 Added variable

1 Added function:

  [A] 'function int __traceiter_android_vh_cpu_up(void*, unsigned int)'

1 Added variable:

  [A] 'tracepoint __tracepoint_android_vh_cpu_up'

Bug: 193384408
Change-Id: I5c0f08e4a5b07c2277189aabdee1d49f2a690189
Signed-off-by: Liujie Xie <xieliujie@oppo.com>
2021-11-01 17:13:13 +00:00
Suren Baghdasaryan
6ad609468d ANDROID: Fix mmu_notifier imbalance
SPF patchset introduced an mmu_notifier imbalance by adding a new exit
path that skips mmu_notifier_invalidate_range_only_end after calling
mmu_notifier_invalidate_range_start. This triggers a BUG in KVM driver
checking for mmu_notifier_count to remain balanced

Fixes: afeec97a8d ("FROMLIST: mm: prepare for FAULT_FLAG_SPECULATIVE")
Bug: 161210518
Signed-off-by: Suren Baghdasaryan <surenb@google.com>
Change-Id: Ibe9d1f0903a23b48c9d733b81249b190e5321c2f
2021-11-01 16:47:30 +00:00
Jindong Yue
62f22f5c05 ANDROID: ABI: Update symbol list for IMX
Add vb2_create_bufs symbol required by vsiv4l2.ko.

Leaf changes summary: 1 artifact changed
Changed leaf types summary: 0 leaf type changed
Removed/Changed/Added functions summary: 0 Removed, 0 Changed, 1 Added function
Removed/Changed/Added variables summary: 0 Removed, 0 Changed, 0 Added variable

1 Added function:

  [A] 'function int vb2_create_bufs(vb2_queue*, v4l2_create_buffers*)'

Bug: 194108974
Signed-off-by: Jindong Yue <jindong.yue@nxp.com>
Change-Id: I7b52e5fafbe58889a4bd6cce4f9b3676471e28ce
2021-11-01 15:37:09 +00:00
Sugar Zhang
131a63013b arm64: dts: rockchip: rk3588: Add property for dedicated i2s nodes
These controllers only have playback or capture capability.

Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Change-Id: I69791088e4fd3e9a623b938279a7580b928dc89a
2021-11-01 20:31:21 +08:00
Sugar Zhang
f3378c3aa6 ASoC: dt-bindings: rockchip: Add compatible for rk3588 codec digital
This patch adds compatible string for rk3588 codec digital.

Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Change-Id: Iaaceed2f8a9a64e6e6616d5105b3910bb839f13f
2021-11-01 20:30:55 +08:00
Sugar Zhang
b906f67703 ASoC: rk_codec_digital: Add support for rk3588 SoC
This patch adds support for rk3588 SoC.

Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Change-Id: I8dbd270afce20f6c2f3573a15129c4dff8eb1b12
2021-11-01 20:30:44 +08:00
Sugar Zhang
08e779ab0c ASoC: dt-bindings: rockchip: Add compatible for rk3588 pdm
This patch adds compatible string for rk3588 pdm.

Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Change-Id: Ie64bfb76b5d5776856623c09281a9bd85fe48447
2021-11-01 20:30:27 +08:00
Sugar Zhang
3ce4fe6dca ASoC: rockchip: pdm: Add support for rk3588 pdm
This patch add support for rk3588 pdm which is the same
with rv1126.

Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Change-Id: I5df248970c9fdfd27e048cc1a6bb60898c50e8f3
2021-11-01 20:30:09 +08:00
Sugar Zhang
8af9719df9 ASoC: dt-bindings: rockchip: Add compatible for rk3588 spdif
This patch adds compatible string for rk3588 spdif.

Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Change-Id: Id984b337bfbc3dfe92d03b789003fcc0a9612a30
2021-11-01 20:29:42 +08:00
Sugar Zhang
3f861f2110 ASoC: rockchip: spdif: Add support for rk3588 spdif
This patch adds support for rk3588 spdif which is the same
with rk3366.

Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Change-Id: Ia6677fc9281868edd9960337aa9726b36b754e3e
2021-11-01 20:29:42 +08:00
shengfei Xu
5aa669c9f1 arm64: dts: rockchip: rk806: fix the name for the nldo4
the name is consistent with the schematic diagram of the hardware.

Signed-off-by: shengfei Xu <xsf@rock-chips.com>
Change-Id: I97c7bebcf1358e461ab37846e0b0034483e20760
2021-11-01 20:21:24 +08:00
Jianqun Xu
7c8d7f9e36 arm64: dts: rockchip: rk3568-evb fix vcc5v0_usb nodes
Add min/max voltage for usb regulators, also add vin-supply for them.

From rk3568-evb1 hardware design, the power tree about usb is
DC12V
  ->  VCC5V0_USB(controlled by EXT_EN from PMIC)
        ->  VCC5V0_HOST(controlled by GPIO0_A6)
	->  VCC5V0_OTG(controlled by GPIO0_A5)

The EXT_EN from PMIC RK809 is designed for device power off to cut off
the usb 5.0v power, during system on, it keeps always on.

Change-Id: I21e431b4b41022b101b6db92b0769d096679b67c
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Signed-off-by: William Wu <william.wu@rock-chips.com>
2021-11-01 20:12:47 +08:00
ZiHan Huang
18a99b5a86 arm64: dts: rockchip: add rk3588 linux base dts
Signed-off-by: ZiHan Huang <zack.huang@rock-chips.com>
Change-Id: Ib59ec583e110f2fcb0599ca5c591c55e01518e44
2021-11-01 20:10:57 +08:00
Jiachiam Liu
f5284c5c9c ANDROID: Update symbol list for mtk
Leaf changes summary: 2 artifacts changed
Changed leaf types summary: 0 leaf type changed
Removed/Changed/Added functions summary: 0 Removed, 0 Changed, 1 Added function
Removed/Changed/Added variables summary: 0 Removed, 0 Changed, 1 Added variable

1 Added function:

  [A] 'function int __traceiter_android_vh_scmi_timeout_sync(void*, int*)'

1 Added variable:

  [A] 'tracepoint __tracepoint_android_vh_scmi_timeout_sync'

Bug: 204502634
Signed-off-by: Jiachiam Liu <jiachiam.liu@mediatek.com>
Change-Id: I3820936488980ba11e581c14424252d35cced7f3
2021-11-01 18:18:23 +08:00
Yifeng Zhao
d69e2f24c6 arm64: dts: rockchip: rk3588: modify sdhci compatible to matching drive
Fixes: 0d390428b5 ("arm64: dts: rockchip: Add base dts for rk3588 soc")
Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Change-Id: I45699bc7cb24ffe9ccd31e0552835bd005ab8c7f
2021-11-01 18:09:54 +08:00
Cai YiWei
c75bd88eba media: rockchip: ispp: replace iommu detach/attach
Change-Id: I1cf46cb9cba85be418f32d218dd70452c8062d42
Signed-off-by: Cai YiWei <cyw@rock-chips.com>
2021-10-30 15:49:49 +08:00
Cai YiWei
4aed134bfe media: rockchip: isp: replace iommu detach/attach
fix NULL Pointer when isp to reset
[ 4486.719609]  __iommu_dma_unmap+0x14/0x7c
[ 4486.719968]  iommu_dma_unmap_sg+0x64/0x90
[ 4486.720348]  __iommu_unmap_sg_attrs+0x48/0x5c
[ 4486.720745]  vb2_dma_sg_dmabuf_ops_detach+0x60/0x80
[ 4486.721192]  dma_buf_detach+0x88/0x9c

iommu_detach_device will set domain to null,
and __iommu_dma_unmap using domain but no check.

Change-Id: I3c679565c6a7e67783e1750fc4d028191a9c9fcf
Signed-off-by: Cai YiWei <cyw@rock-chips.com>
2021-10-30 15:49:49 +08:00
Steve Muckle
8a30a2cadd ANDROID: GKI: update virtual device symbol list
No ABI changes expected.

Bug: 202405948
Signed-off-by: Steve Muckle <smuckle@google.com>
Change-Id: I26010314259d1325999fbe9a640532031a44a6cc
2021-10-30 00:17:37 +00:00
Eric Biggers
cf721d6c46 ANDROID: ABI: add new symbols required by fips140.ko
Add KMI_SYMBOL_LIST_ADD_ONLY=1 to build.config.gki.aarch64.fips140, then
regenerate the fips140 symbol list and ABI XML as follows:

    BUILD_CONFIG=common/build.config.gki.aarch64.fips140 build/build_abi.sh --update-symbol-list
    BUILD_CONFIG=common/build.config.gki.aarch64 build/build_abi.sh --update --print-report

Leaf changes summary: 7 artifacts changed
Changed leaf types summary: 0 leaf type changed
Removed/Changed/Added functions summary: 0 Removed, 0 Changed, 7 Added functions
Removed/Changed/Added variables summary: 0 Removed, 0 Changed, 0 Added variable

7 Added functions:

  [A] 'function int ahash_register_instance(crypto_template*, ahash_instance*)'
  [A] 'function int crypto_grab_spawn(crypto_spawn*, crypto_instance*, const char*, u32, u32)'
  [A] 'function int crypto_register_aeads(aead_alg*, int)'
  [A] 'function int crypto_register_ahashes(ahash_alg*, int)'
  [A] 'function int crypto_register_rng(rng_alg*)'
  [A] 'function crypto_tfm* crypto_spawn_tfm(crypto_spawn*, u32, u32)'
  [A] 'function void crypto_unregister_rng(rng_alg*)'

Bug: 188620248
Change-Id: Ibc066a431decc123f428ecf5ae0b51b1ad838a8a
Signed-off-by: Eric Biggers <ebiggers@google.com>
2021-10-29 14:32:49 -07:00
Eric Biggers
482b0323cf ANDROID: fips140: zeroize temporary values from integrity check
FIPS 140-3 requires this for some reason.

Bug: 188620248
Change-Id: I7c286532097e1d8971faf4d8be31b801f9007e3b
Signed-off-by: Eric Biggers <ebiggers@google.com>
(cherry picked from commit c14d52059b)
2021-10-29 13:32:14 -07:00
Eric Biggers
ecf9341134 ANDROID: fips140: remove in-place updating of live algorithms
The lab has confirmed that it is actually fine for users to keep using
non-FIPS code after the module has loaded if they were already using it
beforehand.  So remove the code that tried to prevent this by updating
live algorithms in-place.  Similarly, remove the call to
synchronize_rcu_tasks() which no longer has any purpose.

We still need to move the live algorithms to a private list, so keep
doing that.  Keep appending "+orig" to cra_name as well, and start doing
the same for cra_driver_name too.

Bug: 188620248
Change-Id: I29c9faec7d7314484a03f9729924b2f892552c7c
Signed-off-by: Eric Biggers <ebiggers@google.com>
(cherry picked from commit 54aecb72db)
2021-10-29 13:32:14 -07:00
Eric Biggers
e45108ecff ANDROID: fips140: block crypto operations until tests complete
As per the new guidance from the lab, the module must block crypto
operations until the tests have completed.  It's unclear what this means
exactly (given that technically this is impossible), but let's make some
changes that should be enough to comply with the requirement's intent.

First, register the library functions and update the live algorithms
after the tests rather than before the tests.  This is a trivial change.

Much more problematic is the fact that the algorithms are registered
with the kernel's crypto framework before the tests run, as the tests
depend on the framework.  Unfortunately, the lab believes that the
kernel isn't allowed to enforce the ordering here; the module itself
must.  Moreover, trying to solve this by copying the crypto API
framework into the module proved to be heavily problematic.

Thus, implement an alternate solution: make the module override the tfm
initialization function of every algorithm it registers, so that it can
wait for the tests to complete before allowing the use of any algorithm.
This is sufficient if the user makes a supported sequence of API calls.

Bug: 153614920
Bug: 188620248
Change-Id: I11ffba90c08114dda4e91c4be7ce8b608c4e14c1
Signed-off-by: Eric Biggers <ebiggers@google.com>
(cherry picked from commit 02e48f383b)
2021-10-29 13:32:14 -07:00
Ard Biesheuvel
6b995f5a54 ANDROID: fips140: preserve RELA sections without relying on the module loader
Instead of having a special case in the core kernel's module loader that
treats a module called 'fips140.ko' in a special way, use a host tool to
tweak the ELF metadata of this module so that the RELA data is preserved
and accessible to the module init code.

This is done in the following way:
- each RELA section that we care about (the ones for .text and .rodata
  at the moment) is copied into a new section called .init.rela.<name>
  with the SHF_ALLOC attribute, so that the module loader will copy it
  into __init memory at load time;
- for each such section, an offset/count tuple is added as a global
  variable to the module;
- the count field of those tuples is populated directly by the host tool
  based on the actual size of the RELA section in question;
- the offset field is decorated with a place-relative relocation against
  the start of the copied RELA section via a weak symbol reference,
  which causes an entry to be emitted into the ELF symbol table;
- these ELF symbol table entries are updated by the host tool and turned
  into STT_SECTION type symbols with STB_GLOBAL linkage, carrying the
  correct section index.

With these changes in place, the unmodified module loader will load all
required information into memory in a way that permits the module init
code to locate the relocations, and apply them in reverse.

Bug: 153614920
Bug: 188620248
Change-Id: I07d9704febdf913834502dd09c19aa4a04d983b1
Signed-off-by: Ard Biesheuvel <ardb@google.com>
(cherry picked from commit 502af6e349)
2021-10-29 13:32:14 -07:00
Ard Biesheuvel
e8d56bd78b ANDROID: module: apply special LTO treatment to .text even if CFI is disabled
We currently only emit directives for handling the .text section into
the module linker script if both LTO and CFI are enabled, while for
other sections, we do this even if CFI is not enabled. This is
inconsistent at best, but as it also interferes with the assumption in
the fips140.ko module that the .text._start and .text._end input
sections are placed at the very start and end of the .text section,
which currently can only be relied upon if CFI is enabled.

So rearrange the #ifdef so that it only covers the .text.__cfi_check
input section. Note that aligning to page size is likely to be redundant
in any case, given that the .text section is laid out first, and module
allocations are page aligned to begin with, so making that part
unconditional is unlikely to make an observeable difference in the
output.

Bug: 153614920
Bug: 188620248
Fixes: 6be141eb36 ("ANDROID: crypto: fips140 - perform load time integrity check")
Change-Id: I3f9ed0ae8fa8fe5693c8d2964566cbb42c101aa7
Signed-off-by: Ard Biesheuvel <ardb@google.com>
(cherry picked from commit 6ae8277450)
2021-10-29 13:32:13 -07:00
Eric Biggers
52b70d491b ANDROID: fips140: use FIPS140_CFLAGS when compiling fips140-selftests.c
These flags are supposed to be used when building all source files for
the module.

Bug: 188620248
Fixes: b7397e89db ("ANDROID: fips140: add power-up cryptographic self-tests")
Change-Id: I41cacff040c8a8a0065dd3cfc537303f1ff18335
Signed-off-by: Eric Biggers <ebiggers@google.com>
(cherry picked from commit 422bc2feb7)
2021-10-29 13:32:13 -07:00
Eric Biggers
e5b14396f9 ANDROID: fips140: take into account AES-GCM not being approvable
Unfortunately, the AES-GCM implementations won't actually be able to be
FIPS-approved.  One consequence of this is that the "cmac" template will
need to be tested with all underlying "aes" implementations, as the
equivalent test with "gcm" won't count as fulfilling the requirement to
test all AES implementations in an authenticated mode when supported.
Update the self-tests and comments accordingly.

Bug: 153614920
Bug: 188620248
Change-Id: I874b0718a5ff9d4e2dea2353448266e87f3f0d0b
Signed-off-by: Eric Biggers <ebiggers@google.com>
(cherry picked from commit a9765fb6dc)
2021-10-29 13:32:13 -07:00
Eric Biggers
960ebb2b56 ANDROID: fips140: add jitterentropy to fips140 module
Although jitterentropy doesn't necessarily need to be part of
fips140.ko, it does need to have the SP800-90B health tests enabled, and
that requires that it be compiled with the fips_enabled flag set.  The
easiest way to do this is just to include a copy of it in fips140.ko.

Bug: 153614920
Bug: 188620248
Change-Id: I9dc0281e07e08e0650e3d340897c697722ad3b1a
Signed-off-by: Eric Biggers <ebiggers@google.com>
(cherry picked from commit cae2421105)
2021-10-29 13:32:13 -07:00
Eric Biggers
2ee56aad31 ANDROID: fips140: add AES-CMAC
AES-CMAC is a FIPS allowed algorithm, and fips140.ko already has
arm64 implementations of it.  Meanwhile, GKI includes both these arm64
implementations as well as the "cmac" template.  Add the "cmac" template
to fips140.ko too and add a self-test for AES-CMAC, so that we can
include AES-CMAC in the set of algorithms which will be certified.

As with a number of the other algorithms, the criteria for which
algorithms need to be in the certified set are still not particularly
clear, but the latest guidance we've received is to error on the side of
including algorithms.

Bug: 153614920
Bug: 188620248
Change-Id: I6c1d9281fe848a7101d5ef94ab48e5a41bbcc6f8
Signed-off-by: Eric Biggers <ebiggers@google.com>
(cherry picked from commit 038dc9f2cc)
2021-10-29 13:32:13 -07:00
Eric Biggers
2b5843ae2d ANDROID: fips140: add AES-CBC-CTS
AES-CBC-CTS is a FIPS allowed algorithm, and fips140.ko already has
arm64 implementations of it.  Meanwhile, GKI includes both these arm64
implementations as well as the "cts" template.  Add the "cts" template
to fips140.ko too and add a self-test for AES-CBC-CTS, so that we can
include AES-CBC-CTS in the set of algorithms which will be certified.

There appears to be no support for CBC-CTS mode in pycryptodome or
python-cryptography, so I manually added the test vector.

As with a number of the other algorithms, the criteria for which
algorithms need to be in the certified set are still not particularly
clear, but the latest guidance we've received is to error on the side of
including algorithms.  Android uses AES-CBC-CTS for filenames
encryption, which may be relevant (though arguably this use case doesn't
actually require a FIPS approved algorithm).

Bug: 153614920
Bug: 188620248
Change-Id: I53ffbd1d38493592eeaf471bc0007978ec400878
Signed-off-by: Eric Biggers <ebiggers@google.com>
(cherry picked from commit e2cfdfbc51)
2021-10-29 13:32:13 -07:00
Eric Biggers
1be58af077 ANDROID: fips140: remove non-prediction-resistant DRBG test
The lab has confirmed that this test is not required.

Bug: 153614920
Bug: 188620248
Change-Id: Ie55031beacd00f093db3a7ba30fe0844a2ce363b
Signed-off-by: Eric Biggers <ebiggers@google.com>
(cherry picked from commit ea902862ea)
2021-10-29 13:32:13 -07:00
Eric Biggers
17ccefe140 ANDROID: fips140: use full 16-byte IV
By using the initial_value parameter when creating the pycryptodome
AES-CTR instance, we can use any 16-byte IV, like the other AES modes.
Therefore, there's no need for the last 4 bytes of the IV to be 0.
This doesn't really matter, but it seems nice to avoid this quirk.

Bug: 153614920
Bug: 188620248
Change-Id: If33de260b1119f2b3e004164199b08364781ab23
Signed-off-by: Eric Biggers <ebiggers@google.com>
(cherry picked from commit fa5a44b364)
2021-10-29 13:32:13 -07:00
Eric Biggers
b397a0387c ANDROID: fips140: test all implementations
Test all implementations of each algorithm rather than just the highest
priority implementation.  This aligns with the revised guidance we have
received from the lab.

We can still skip some tests in some cases, as per the FIPS 140-2
Implementation Guidance document.  See the comments for details.

To align with the new scope of the tests, the fips140.broken_alg module
parameter now must specify an implementation (e.g. "sha256-ce") rather
than an algorithm (e.g. "sha256").

No change to the DRBG tests is required, as it turns out the module only
includes HMAC_DRBG.  However, clarify the comment about the DRBG tests.

On a Pixel device, this increases the running time of the fips140 tests
from 0.5ms to 3.1 ms (very roughly; there's a lot of variation).  This
is still very fast, so it isn't expected to be a problem.

Bug: 153614920
Bug: 173104584
Bug: 188620248
Change-Id: I555b535dd45f0164b7744a2c9338c501bb88de86
Signed-off-by: Eric Biggers <ebiggers@google.com>
(cherry picked from commit abe0780696)
2021-10-29 13:32:12 -07:00
Bicycle Tsai
82c940e0e1 ANDROID: Update symbol list for mtk
Generated with:
BUILD_CONFIG=common/build.config.gki.aarch64 build/build_abi.sh --update

Leaf changes summary: 2 artifacts changed
Changed leaf types summary: 0 leaf type changed
Removed/Changed/Added functions summary: 0 Removed, 0 Changed, 1 Added
function
Removed/Changed/Added variables summary: 0 Removed, 0 Changed, 1 Added
variable

1 Added function:

  [A] 'function int
__traceiter_android_vh_snd_soc_card_get_comp_chain(void*, bool*)'

1 Added variable:

  [A] 'tracepoint __tracepoint_android_vh_snd_soc_card_get_comp_chain'

Bug: 198732156
Signed-off-by: Bicycle Tsai <bicycle.tsai@mediatek.com>
Change-Id: I1327ec4b1ba8df264007ebdeab86c15785d5a46a
2021-10-29 23:37:17 +08:00
Bicycle Tsai
8d68a30fe1 ANDROID: ASoC: soc-pcm: Get all BEs along DAPM path
dpcm_end_walk_at_be() stops the graph walk when first BE is found for
the given FE component. In a component model we may want to connect
multiple DAIs from different components.

android_vh_snd_soc_card_get_comp_chain can be registered here
to allows DAI/component chaining.

Later PCM operations can be called for all these listed components for a
valid DAPM path.

ALSA machine driver can setup component_chaining like below code slice.

static void my_board_component_chaining_hook(void *data, bool *ret)
{
        *ret = true;
}

static int my_board_dev_probe(struct platform_device *pdev)
{

        register_trace_android_vh_snd_soc_card_get_comp_chain(
                my_board_component_chaining_hook, NULL);

        return 0;
}

static int my_board_dev_remove(struct platform_device *pdev)
{
        unregister_trace_android_vh_snd_soc_card_get_comp_chain(
                my_board_component_chaining_hook, NULL);

        return 0;
}

static struct platform_driver my_board_driver = {
        ...
        .probe = my_board_dev_probe,
        .remove = my_board_dev_remove,
        ...
};

Bug: 198732156
Signed-off-by: Bicycle Tsai <bicycle.tsai@mediatek.com>
Change-Id: Ife5df291d40af9ec83d57462b6a08aba95d9119d
2021-10-29 22:04:59 +08:00
Wyon Bi
f065eedfb5 arm64: dts: rockchip: rk3588: Add aux clock for dp1
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
Change-Id: I145d47f35da3b6cc80a0591dcff5cb23ff118db4
2021-10-29 19:10:12 +08:00
Wyon Bi
409ff5b0ce arm64: dts: rockchip: rk3588s: Add aux clock for dp0
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
Change-Id: I4f712f94ec2ab15c30cd9d827513cf778743f000
2021-10-29 19:10:02 +08:00
Zhang Yubing
a5a1823c18 arm64: dts: rockchip: rk3588: Add display-subsystem
Signed-off-by: Zhang Yubing <yubing.zhang@rock-chips.com>
Change-Id: I84edbac259ed7f4573139ecb3ed03a7ebb29db23
2021-10-29 19:09:15 +08:00
Finley Xiao
187019e367 arm64: dts: rockchip: rk3568: Add vop-frame-bw-dmc-freq
Fix vop POST_BUF_EMPTY irq err when rotate screen.

Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Change-Id: I3c0d5c52efa8612ce6bf24f6748ccab7c1c05a57
2021-10-29 19:00:34 +08:00