Add a PHY provider driver for the rk3399 SoC Type-c PHY. The USB
Type-C PHY is designed to support the USB3 and DP applications. The
PHY basically has two main components: USB3 and DisplyPort. USB3
operates in SuperSpeed mode and the DP can operate at RBR, HBR and
HBR2 data rates. Hence, create 2 PHY deivces, the phy[0] for DP,
and phy[1] for USB3.
(am from https://patchwork.kernel.org/patch/9260745/)
Change-Id: I0cd851a59c00a1249415da109598007a09088591
Signed-off-by: Chris Zhong <zyw@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
This patch prevents OTG0 and OTG1 PHY from entering suspend mode.
Because if PHY enter suspend, it will cause DWC3 controller work
abnormally now. We can revert it if fusb302 driver is merged.
Change-Id: I74c3ee5d3e1b925e8dc758bdc6d67372df421b98
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
This patch add USB2 PHY1 OTG port configurations for rk3399,
it support PHY1 suspend and bvalid detect, but not support
usb battery charger detect.
Change-Id: I7a6aaf484d6ad2ad097a7d9679a56aa545f217c8
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
Rockchip USB2 phy provides utmi_avalid and utmi_bvalid for
user to check UTMI vbus status. Generally, both of them can
reflect the vbus status correctly, and the utmi_bvalid has
higher sensitivity, so we select the utmi_bvalid to get vbus
status by default.
But some special SoCs may not provide utmi_bvalid, so we
need to select utmi_avalid in this case.
Change-Id: I0d47c2237f852cb67ebd82fe2673b2bd2e6ccce6
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
For rk3366 and rk3399, the usb-phy IP block is different than
previous chips, so we should use a new driver to handle them.
Change-Id: I44ebe883664e9fb2fce8707bab2d9159c546e51f
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
This patch add otg-port support. For now, however,
it only support BC1.2 charger detect, power management,
and hold a wakelock when work as SDP(e.g. connect to PC),
and it need to implement otg device/host switch in future.
Change-Id: Ib58aef748211f947da439ebe59fa5cf8dc1fa010
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
We enable it by default as we could see the usage of PCB layout
will not stuff this registor. For currently boards which soldered
it already, there should be no harmful.
Change-Id: Idc05c244dbaeebb1028e4828aa7a7d655899beb8
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Add phy driver for the Rockchip DisplayPort PHY module. This
is required to get DisplayPort working in Rockchip SoCs.
Change-Id: Ied28937c12584aee9654af775d4cf0cac4eddec5
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
(cherry pick from commit fd968973de)
This patch does not aim to upstream, just use locally.
If needed, the different SoC can register its own callback function
to tunning the default parameters of phy.
Change-Id: I19b2a4f9e0cb04b139dd64eae1c856fbe9142665
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
Revise the value of macro which is belong to ctrl_base register.
Change-Id: Ic0943b233d4244dadf42d09343136aae012ac1b4
Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
The newer SoCs (rk3366, rk3399) take a different usb-phy IP block (INNO)
than rk3288 and before, meanwhile, most of phy-related registers are also
different from the past, so a new phy driver is required necessarily.
Change-Id: I32320fd516af146ef9b7816d5b167e1b682a659b
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
Need to control phy's digital block before enabling pll and
waiting for it into locked state.
Change-Id: I04037f5496fd5c1ef4e24853eb32b43ce326ff01
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
According to the databook, 10.2us is the max time for
dll to be ready to work. However from the test, some chips
need 20us for dll to ready. So this patch add some extra
margin for dllrdy to be ready to meet the reality.
Change-Id: Ie5362b4403309d260ac621b8b20a0f5b579d3153
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Let's expose the freq-sel, dr-sel, opdalay to dt for user
to decide how to configure their phy.
Change-Id: Ib9ef40b263d3fd669c7bbda666d28c0c55ff6d8e
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
selecting utmi interface signals from utmi interface of usb20
host0 controller to usb2phy, when phy is resumed.
Change-Id: I487e836b89177cd8bc2dc56400f4dc277c8d2bf0
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
1. Add a new compatible for rk3399;
2. Support gpio operation for vbus-drv.
Change-Id: I2eb1ac377db0bcb907d009c56fba22f1951c128e
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
We need to init some signal related stuff
to make sure the SI meet the requirement.
Change-Id: I829203fb9cd2e93aa6acaa5288667f600370d781
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
This patch rename "reg" property to "reg_offset".
We rename it to fix the compile issue on ARM64 platform:
(reg_format): "reg" property in /phy has invalid length (4 bytes)
(#address-cells == 2, #size-cells == 2)
This's because "reg" is very special one which should keep the
*-cells with its parent node and can't be overwrited even if we
do that explicitly. On 32-bit plafform, the default *-cells
fit for what we assign to "reg". But that's not correct for 64-bit
platform. So we can see two possible solutions to fix this problem:
A) make phy-rockchip-emmc as a child phy node and overwrite its
parent's #address-cells and #size-cells.
B) avoid using this special property.
we use it just for passing on a offset for different Socs, and there's
no requirement to change the code to make phy-rockchip-emmc as a child
node. so choose option B) is sane.
Change-Id: Ib6a10cb8c3629ec3983854f1bfb7c2426edf79d2
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
For InnoSilicon usb2.0 phy, there is no siddq bit for operating,
what is more, when we control usb phy to suspend, its Plls will
not be affected. So we can operate resume/suspend bits directly
when it is going to power on/off.
Change-Id: I6bfe6b1a90b1bdcb0b0d5b670d579a625b22c0ba
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
If phy_pm_runtime_get_sync failed but we already
enable regulator, current code return directly without
doing regulator_disable. This patch fix this problem
and cleanup err handle of phy_power_on to be more readable.
Fixes: 3be88125d8 ("phy: core: Support regulator ...")
Cc: <stable@vger.kernel.org> # v3.18+
Cc: Roger Quadros <rogerq@ti.com>
Cc: Axel Lin <axel.lin@ingics.com>
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
(cherry picked from commit b82fcabe21)
Change-Id: I1cb5327d624d88a97096eccaa94924b851dcce27
This patch to add a generic PHY driver for ROCKCHIP eMMC PHY.
Access the PHY via registers provided by GRF (general register
files) module.
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
(cherry picked from git.kernel.org kishon/linux-phy next
commit 9743f1c935995a55ddd926943ee7b3cfb4718208)
Change-Id: Ia24ccd041392e64efd28868ffccc8da4419bd29f
commit 58a66dba1b upstream.
If we reload phy-twl4030-usb, we get a warning about unbalanced
pm_runtime_enable. Let's fix the issue and also fix idling of the
device on unload before we attempt to shut it down.
If we don't properly idle the PHY before shutting it down on removal,
the twl4030 ends up consuming about 62mW of extra power compared to
running idle with the module loaded.
Cc: Bin Liu <b-liu@ti.com>
Cc: Felipe Balbi <balbi@ti.com>
Cc: Kishon Vijay Abraham I <kishon@ti.com>
Cc: NeilBrown <neil@brown.name>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
commit b241d31ef2 upstream.
Otherwise rmmod omap2430; rmmod phy-twl4030-usb; modprobe omap2430
will try to use a non-existing phy and oops:
Unable to handle kernel paging request at virtual address b6f7c1f0
...
[<c048a284>] (devm_usb_get_phy_by_node) from [<bf0758ac>]
(omap2430_musb_init+0x44/0x2b4 [omap2430])
[<bf0758ac>] (omap2430_musb_init [omap2430]) from [<bf055ec0>]
(musb_init_controller+0x194/0x878 [musb_hdrc])
Cc: Bin Liu <b-liu@ti.com>
Cc: Felipe Balbi <balbi@ti.com>
Cc: Kishon Vijay Abraham I <kishon@ti.com>
Cc: NeilBrown <neil@brown.name>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
The USB phys on Rockchip SoCs contain their own internal PLLs to create
the 480MHz needed. Additionally this PLL output is also fed back into the
core clock-controller as possible source for clocks like the GPU or others.
Until now this was modelled incorrectly with a "virtual" factor clock in
the clock controller. The one big caveat is that if we turn off the usb phy
via the siddq signal, all analog components get turned off, including the
PLLs. It is therefore possible that a source clock gets disabled without
the clock driver ever knowing, possibly making the system hang.
Therefore register the phy-plls as real clocks that the clock driver can
then reference again normally, making the clock hirarchy finally reflect
the actual hardware.
The phy-ops get converted to simply turning that new clock on and off
which in turn controls the siddq signal of the phy.
Through this the driver gains handling for platform-specific data, to
handle the phy->clock name association.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
(cherry picked from commit b74fe7c761)
Change-Id: Ie05464a9523af86b602d4801cb9b842f65d08670
We need custom handling for these two socs in the driver shortly,
so add the necessary compatible values to binding and driver.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
(cherry picked from commit c2bfc3b888)
Change-Id: I63cf61e12b1f3bb56856accc38949c6cd8c0ce8e
This unclutters the loop in probe a lot and makes current (and future)
error handling easier to read.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
(cherry picked from commit 97dd910109)
Change-Id: I5c2ccfbd42e52b77649f01bca2a86767f27fe32f
This introduces a common struct that holds data belonging to
the umbrella device that contains all the phys and that we
want to use later.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
(cherry picked from commit 5fdbb97dec)
Change-Id: I48dd87b0b39739e0c75d0613e881b2b57e8cb6f2
Currently the phy driver only gets the optional clock reference but
never puts it again, neither during error handling nor on remove.
Fix that by moving the clk_put to a devm-action that gets called at
the right time when all other devm actions are done.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
(cherry picked from commit 75d390fecf)
Change-Id: I976d5a49448febdb7da5b5c35455c708bfc83899
On driver detach, devm_phy_release() will put a refcount to
the phy, so gets a refconut to it before return.
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
for_each_available_child_of_node performs an of_node_get on each iteration,
so a return from the middle of the loop requires an of_node_put.
A simplified version of the semantic patch that finds this problem is as
follows (http://coccinelle.lip6.fr):
// <smpl>
@@
expression root,e;
local idexpression child;
@@
for_each_available_child_of_node(root, child) {
... when != of_node_put(child)
when != e = child
(
return child;
|
* return ...;
)
...
}
// </smpl>
Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
for_each_child_of_node performs an of_node_get on each iteration,
so a return from the middle of the loop requires an of_node_put.
A simplified version of the semantic patch that finds this problem is as
follows (http://coccinelle.lip6.fr):
// <smpl>
@@
expression root,e;
local idexpression child;
@@
for_each_child_of_node(root, child) {
... when != of_node_put(child)
when != e = child
(
return child;
|
* return ...;
)
...
}
// </smpl>
Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
for_each_child_of_node performs an of_node_get on each iteration,
so a return from the middle of the loop requires an of_node_put.
A simplified version of the semantic patch that finds this problem is as
follows (http://coccinelle.lip6.fr):
// <smpl>
@@
expression root,e;
local idexpression child;
@@
for_each_child_of_node(root, child) {
... when != of_node_put(child)
when != e = child
(
return child;
|
* return ...;
)
...
}
// </smpl>
Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
for_each_available_child_of_node performs an of_node_get on each iteration,
so a return from the middle of the loop requires an of_node_put.
A simplified version of the semantic patch that finds this problem is as
follows (http://coccinelle.lip6.fr):
// <smpl>
@@
expression root,e;
local idexpression child;
@@
for_each_available_child_of_node(root, child) {
... when != of_node_put(child)
when != e = child
(
return child;
|
* return ...;
)
...
}
// </smpl>
Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Tested-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
for_each_available_child_of_node performs an of_node_get on each iteration,
so a return from the middle of the loop requires an of_node_put.
A simplified version of the semantic patch that finds this problem is as
follows (http://coccinelle.lip6.fr):
// <smpl>
@@
expression root,e;
local idexpression child;
@@
for_each_available_child_of_node(root, child) {
... when != of_node_put(child)
when != e = child
(
return child;
|
* return ...;
)
...
}
// </smpl>
Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr>
Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
for_each_child_of_node performs an of_node_get on each iteration,
so a return from the middle of the loop requires an of_node_put.
A simplified version of the semantic patch that finds this problem is as
follows (http://coccinelle.lip6.fr):
// <smpl>
@@
expression root,e;
local idexpression child;
@@
for_each_child_of_node(root, child) {
... when != of_node_put(child)
when != e = child
(
return child;
|
* return ...;
)
...
}
// </smpl>
Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
for_each_available_child_of_node performs an of_node_get on each iteration,
so a return from the middle of the loop requires an of_node_put.
A simplified version of the semantic patch that finds this problem is as
follows (http://coccinelle.lip6.fr):
// <smpl>
@@
expression root,e;
local idexpression child;
@@
for_each_available_child_of_node(root, child) {
... when != of_node_put(child)
when != e = child
(
return child;
|
* return ...;
)
...
}
// </smpl>
Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr>
Acked-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
The sun9i usb phy driver calls of_usb_get_phy_mode(), which is not
available if USB is disabled:
drivers/built-in.o: In function `sun9i_usb_phy_probe':
:(.text+0x7fb0): undefined reference to `of_usb_get_phy_mode'
This adds a dependency to avoid the randconfig build errors.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Fixes: 9c3b443026 ("phy: Add driver to support individual USB PHYs on sun9i")
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Pull USB updates from Greg KH:
"Here is the big USB patchset for 4.4-rc1.
As usual, most of the changes are in the gadget subsystem, and we
removed a host controller for a device that is no longer in existance,
and probably never was even made public. There is also other minor
driver updates and new device ids, full details in the changelog.
All of these have been in linux-next for a while"
* tag 'usb-4.4-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb: (233 commits)
USB: core: Codestyle fix in urb.c
usb: misc: usb3503: Use i2c_add_driver helper macro
usb: host: lpc32xx: don't unregister phy device
usb: host: lpc32xx: balance clk enable/disable on removal
usb: host: lpc32xx: fix warnings caused by enabling unprepared clock
uwb: drp: Use setup_timer
uwb: neh: Use setup_timer
uwb: rsv: Use setup_timer
USB: qcserial: add Sierra Wireless MC74xx/EM74xx
usb: chipidea: otg: don't wait vbus drops below BSV when starts host
chipidea: ci_hdrc_pci: use PCI_VDEVICE() instead of PCI_DEVICE()
doc: dt-binding: ci-hdrc-usb2: split vendor specific properties
usb: chipidea: imx: add imx6ul usb support
doc: dt-binding: ci-hdrc-usb2: improve property description
usb: chipidea: imx: add usb support for imx7d
Doc: usb: ci-hdrc-usb2: Add phy-clkgate-delay-us entry
usb: chipidea: Add support for 'phy-clkgate-delay-us' property
usb: chipidea: Use extcon framework for VBUS and ID detect
usb: gadget: net2280: restore ep_cfg after defect7374 workaround
usb: dwc2: host: Fix use after free w/ simultaneous irqs
...
Both data->id_det_gpio and data->vbus_det_gpio are optional, so use
devm_gpiod_get_optional for them.
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Exynos USB2 PHY has separate power supply, which is usually provided by
VBUS regulator. This patch adds support for it. VBUS regulator is
optional, to keep compatibility with boards, which have VBUS provided
from some always-on power source.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Tested-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
This platform driver has a OF device ID table but the OF module
alias information is not created so module autoloading won't work.
Signed-off-by: Luis de Bethencourt <luisbg@osg.samsung.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
rockchip phy are enable when soc reset, to save power consumption,
we disable it when probe, and enable each phy when it use
Signed-off-by: huang lin <hl@rock-chips.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
