PD3.0 Spec 6.4.4.3.2 say that only Responder supports 12 or more SVIDs,
the Discover SVIDs Command Shall be executed multiple times until a
Discover SVIDs VDO is returned ending either with a SVID value of
0x0000 in the last part of the last VDO or with a VDO containing two
SVIDs with values of 0x0000.
In the current implementation, if the last VDO does not find that the
Discover SVIDs Command would be executed multiple times even if the
Responder SVIDs are less than 12, and we found some odd dockers just
meet this case. So fix it.
Acked-by: Heikki Krogerus <heikki.krogerus@linux.intel.com>
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
Link: https://lore.kernel.org/r/20230316081149.24519-1-frank.wang@rock-chips.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
The hibernation code is broken and has never been enabled in mainline
and should thus be dropped.
Specifically, the scratch buffer DMA mapping would have been leaked on
every suspend cycle since commit 51f5d49ad6 ("usb: dwc3: core:
simplify suspend/resume operations") if this feature was ever enabled.
The related error handling was also broken and could have resulted in
attempts to unmap never mapped buffers, etc.
This effectively revert commit 0ffcaf3798 ("usb: dwc3: core: allocate
scratch buffers").
Acked-by: Thinh Nguyen <Thinh.Nguyen@synopsys.com>
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Link: https://lore.kernel.org/r/20230404072524.19014-6-johan+linaro@kernel.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
It's needed on STM32MP15, when using the integrated full-speed PHY. This
clock is an output of USBPHYC, and the HS USBPHYC is not attached as PHY
in this case (managed directly by dwc2 ggpio glue):
&usbotg_hs {
compatible = "st,stm32mp15-fsotg", "snps,dwc2";
pinctrl-names = "default";
pinctrl-0 = <&usbotg_hs_pins_a &usbotg_fs_dp_dm_pins_a>;
vbus-supply = <&vbus_otg>;
status = "okay";
};
USBPHYC clock output must be used, so it can be properly enabled as a
clock provider.
Without this, currently, when the dualport High-Speed USBPHYC isn't
requested by either USBH or OTG, it remains uninitialized when probing
OTG: OTG configured with full-speed PHY isn't properly clocked, resulting
in error log like:
[ 2.383138] dwc2 49000000.usb-otg: dwc2_core_reset: HANG! Soft Reset
timeout GRSTCTL_CSFTRST.
Signed-off-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com>
Link: https://lore.kernel.org/r/20230414084137.1050487-5-fabrice.gasnier@foss.st.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Add support for the utmi clock. It's needed on STM32MP15, when using
the integrated full-speed PHY. This clock is an output of USBPHYC, but
HS USBPHYC is not attached as PHY in this case: Full-Speed PHY is directly
managed in dwc2 glue, through GGPIO register. Typical DT when using FS PHY
&usbotg_hs {
compatible = "st,stm32mp15-fsotg", "snps,dwc2";
pinctrl-names = "default";
pinctrl-0 = <&usbotg_hs_pins_a &usbotg_fs_dp_dm_pins_a>;
vbus-supply = <&vbus_otg>;
status = "okay";
};
In this configuration, USBPHYC clock output must be defined, so it can
be properly enabled as a clock provider:
clocks = <&rcc USBO_K>, <&usbphyc>;
clock-names = "otg", "utmi";
Acked-by: Minas Harutyunyan <hminas@synopsys.com>
Signed-off-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com>
Link: https://lore.kernel.org/r/20230414084137.1050487-4-fabrice.gasnier@foss.st.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Commit ac82b56bda ("usb: gadget: tegra-xudc: Add vbus_draw support")
populated the vbus_draw callback for the Tegra XUDC driver. The function
tegra_xudc_gadget_vbus_draw(), that was added by this commit, assumes
that the pointer 'curr_usbphy' has been initialised, which is not always
the case because this is only initialised when the USB role is updated.
Fix this crash, by checking that the 'curr_usbphy' is valid before
dereferencing.
Fixes: ac82b56bda ("usb: gadget: tegra-xudc: Add vbus_draw support")
Reviewed-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Link: https://lore.kernel.org/r/20230405181854.42355-1-jonathanh@nvidia.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
There is a structural problem in switchdev, where the flag bits in
struct switchdev_notifier_fdb_info (added_by_user, is_local etc) only
represent a simplified / denatured view of what's in struct
net_bridge_fdb_entry :: flags (BR_FDB_ADDED_BY_USER, BR_FDB_LOCAL etc).
Each time we want to pass more information about struct
net_bridge_fdb_entry :: flags to struct switchdev_notifier_fdb_info
(here, BR_FDB_STATIC), we find that FDB entries were already notified to
switchdev with no regard to this flag, and thus, switchdev drivers had
no indication whether the notified entries were static or not.
For example, this command:
ip link add br0 type bridge && ip link set swp0 master br0
bridge fdb add dev swp0 00:01:02:03:04:05 master dynamic
has never worked as intended with switchdev. It causes a struct
net_bridge_fdb_entry to be passed to br_switchdev_fdb_notify() which has
a single flag set: BR_FDB_ADDED_BY_USER.
This is further passed to the switchdev notifier chain, where interested
drivers have no choice but to assume this is a static (does not age) and
sticky (does not migrate) FDB entry. So currently, all drivers offload
it to hardware as such, as can be seen below ("offload" is set).
bridge fdb get 00:01:02:03:04:05 dev swp0 master
00:01:02:03:04:05 dev swp0 offload master br0
The software FDB entry expires $ageing_time centiseconds after the
kernel last sees a packet with this MAC SA, and the bridge notifies its
deletion as well, so it eventually disappears from hardware too.
This is a problem, because it is actually desirable to start offloading
"master dynamic" FDB entries correctly - they should expire $ageing_time
centiseconds after the *hardware* port last sees a packet with this
MAC SA - and this is how the current incorrect behavior was discovered.
With an offloaded data plane, it can be expected that software only sees
exception path packets, so an otherwise active dynamic FDB entry would
be aged out by software sooner than it should.
With the change in place, these FDB entries are no longer offloaded:
bridge fdb get 00:01:02:03:04:05 dev swp0 master
00:01:02:03:04:05 dev swp0 master br0
and this also constitutes a better way (assuming a backport to stable
kernels) for user space to determine whether the kernel has the
capability of doing something sane with these or not.
As opposed to "master dynamic" FDB entries, on the current behavior of
which no one currently depends on (which can be deduced from the lack of
kselftests), Ido Schimmel explains that entries with the "extern_learn"
flag (BR_FDB_ADDED_BY_EXT_LEARN) should still be notified to switchdev,
since the spectrum driver listens to them (and this is kind of okay,
because although they are treated identically to "static", they are
expected to not age, and to roam).
Fixes: 6b26b51b1d ("net: bridge: Add support for notifying devices about FDB add/del")
Link: https://lore.kernel.org/netdev/20230327115206.jk5q5l753aoelwus@skbuf/
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Jesse Brandeburg <jesse.brandeburg@intel.com>
Reviewed-by: Ido Schimmel <idosch@nvidia.com>
Tested-by: Ido Schimmel <idosch@nvidia.com>
Link: https://lore.kernel.org/r/20230418155902.898627-1-vladimir.oltean@nxp.com
Signed-off-by: Paolo Abeni <pabeni@redhat.com>
Johan writes:
USB-serial updates for 6.4-rc1
Here are the USB-serial updates for 6.4-rc1; a new modem device id and
an unused-function cleanup.
All have been in linux-next with no reported issues.
* tag 'usb-serial-6.4-rc1' of https://git.kernel.org/pub/scm/linux/kernel/git/johan/usb-serial:
USB: serial: option: add UNISOC vendor and TOZED LT70C product
USB: serial: quatech2: remove unused qt2_setdevice function
Feng zhou says:
====================
From: Feng Zhou <zhoufeng.zf@bytedance.com>
Add support for integer type of accessing variable length array.
Add a selftest to check it.
====================
Signed-off-by: Alexei Starovoitov <ast@kernel.org>
cppcheck reports
fs/ext4/page-io.c:516:51: style:
Condition 'nr_to_submit' is always true [knownConditionTrueFalse]
if (fscrypt_inode_uses_fs_layer_crypto(inode) && nr_to_submit) {
^
This earlier check to bail, makes this check unncessary
/* Nothing to submit? Just unlock the page... */
if (!nr_to_submit)
return 0;
Signed-off-by: Tom Rix <trix@redhat.com>
Fixes: dff4ac75ee ("ext4: move keep_towrite handling to ext4_bio_write_page()")
Reviewed-by: Eric Biggers <ebiggers@google.com>
Link: https://lore.kernel.org/r/20230316204831.2472537-1-trix@redhat.com
Signed-off-by: Theodore Ts'o <tytso@mit.edu>
Code in the idle path is not allowed to be instrumented because RCU is
disabled, see commit 0e985e9d22 ("cpuidle: Add comments about
noinstr/__cpuidle usage").
Force inlining of the inline functions called from cpuidle, to ensure
they are not emitted out-of-line and then available for tracing.
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://msgid.link/20230406144535.3786008-4-mpe@ellerman.id.au
Add PPC_QEMU_E500 to corenet_base.config, which is then used to generate
corenet64_smp_defconfig and corenet32_smp_defconfig.
That then allows both those configs to build kernels that boot in qemu
using the ppce500 machine type and respectively -cpu e5500 or -cpu
e500mc.
The code that is added by PPC_QEMU_E500 just defines another machine
with a probe function that recognises qemu, so there should be no change
when booting on actual hardware supported by CORENET_GENERIC.
The increase in vmlinux size is less than 1KB.
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://msgid.link/20230411102838.512859-1-mpe@ellerman.id.au
Based on documentation revision dates, this MPC82xx pq2fads system
predates the MPC8272-ADS variant by about a year and only has 1/2
the amount of RAM (32MB) -- largely making it useless with a modern
v6.x kernel from today.
Similar to the MPC8272-ADS the pq2fads also supported other 82xx CPU
variants, had 8MB flash, and like the 8272 ADS platform, was on a fairly
large PCB in order to have space for breakout connectors for all features.
These 82xx platforms are two decades old, and originally made for a
small group of industry related people in order to assist in new OEM
board designs. Given that, it makes sense to remove support today.
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://msgid.link/20230224204959.17425-3-paul.gortmaker@windriver.com
The MPC8272-ADS also supported other 82xx CPU variants, had 64MB RAM,
8MB flash, and like the 85xx ADS platforms, was on a fairly large PCB
in order to have space for breakout connectors for all the features.
These 82xx platforms are two decades old, and originally made for a
small group of industry related people in order to assist in new OEM
board designs. Given that, it makes sense to remove support today.
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://msgid.link/20230224204959.17425-2-paul.gortmaker@windriver.com
This evaluation platform was essentially a single core 8641 with
integrated graphics/display support - in an effort to reduce chip count
on kiosk and similar applications.
Compared to other evaluation platforms considered for removal in other
recent commits, this platform was relatively rare. Unlike all the other
10+ platforms, I couldn't find any documentation on it - just a link to
downloading the 2007 era BSP in "LTIB" format as was done back then.
With all that in mind, it seems prudent to remove it here in 2023.
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
[mpe: Drop stale reference to MPC8610_HPCD in 86xx/Kconfig]
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://msgid.link/20230225201318.3682-4-paul.gortmaker@windriver.com
There is no denying that this was an interesting platform in its day.
Access to a SMP powerpc platform became a bit more obtainable for folks
in the BSP industry in the 2007 era, thanks to this platform.
Add to that the move to the black Antec case vs. the generic white 2005
era case of the MPC8548CDS or the retro 1950s 1/2 height horizontal case
of the HPC II, and it was pretty interesting to people like myself then.
However, like all the other evaluation platforms, the overall system
was complex out of necessity, as it tried to showcase all possible
features and use-cases. That included an AMP option, where you could run
two bootloaders and two kernels over two serial consoles. Peripheral
sharing got a bit more tricky when you got to the hard disk and similar.
In any case we still have the same circumstance. A relatively rare and
expensive evaluation platform that is now 15+ years old and not out there
in large numbers in the general public. Removal in 2023 just makes sense.
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://msgid.link/20230225201318.3682-3-paul.gortmaker@windriver.com
This was an interesting platform - it was the 1st instance of a
respin of earlier 130nm 74xx CPUs on 90nm and systems using MPC7448
were positioned as a rack server platform solution.
Given that, the evaluation platform (at least the one I had) was shipped
in a horizontal 1/2 height Antec desktop case with retro styling and
colours, despite the fact the docs explicitly stated that the HPC II is
not a desktop machine (noting it had no gfx or legacy PC I/O support).
Historic trivia aside, this was the 1st introduction of the e600
procfam as an evolution from the earlier G4.
However even with the claim to being "1st e600" it seems the 2005+
era was turning its attention to multicore support and from my memory
this poor guy was quickly overshadowed by the dual core MPC8641D.
All that aside, we are once again looking at 15+ year old evaluation
platforms that were not widely distributed, so 2023 removal makes sense.
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://msgid.link/20230225201318.3682-2-paul.gortmaker@windriver.com
This final variant in the e300 family of Modular Development System
(MDS) in this series was actually aimed at feature reduction - things
like floating point and ethernet were removed in order to make for a
lower power and lower cost system.
Like all the MDS systems, it was meant as a vehicle to get the CPU out
early to hardware OEMs so software and board development could take place
in parallel.
These were made in limited numbers and availability preference was given
to partners who were planning to make their own boards.
Given that the whole reason for existence was to assist in enabling new
board designs [not happening for 10+ years], and that they weren't
generally available, and that the hardware wasn't really hobbyist friendly
even for retro computing, it makes sense to retire the support for this
particular platform.
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Acked-by: Li Yang <leoyang.li@nxp.com>
[mpe: Drop stale reference to MPC832x_MDS in arch/powerpc/boot/Makefile]
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://msgid.link/20230220115913.25811-5-paul.gortmaker@windriver.com
This next evolutionary step in the e300 family of Modular Development
System (MDS) still has, at its core component, a full length card with a
PCI edge. No case. Serial and network connectors were on card, so it
could optionally be fitted with plastic stand-offs and run stand-alone
off a power brick.
This is very similar to the MPC834x_MDS and MPC836x_MDS removed in the
prior commits, but with this board variant as yet another evolutionary
step. SATA and PCI-e were now available. But overall the form factor
and design goals were unchanged.
Like all the MDS systems, it was meant as a vehicle to get the CPU out
early to hardware OEMs so software and board development could take place
in parallel.
These were made in limited numbers and availability preference was given
to partners who were planning to make their own boards.
Given that the whole reason for existence was to assist in enabling new
board designs [not happening for 10+ years], and that they weren't
generally available, and that the hardware wasn't really hobbyist friendly
even for retro computing, it makes sense to retire the support for this
particular platform.
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Acked-by: Li Yang <leoyang.li@nxp.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://msgid.link/20230220115913.25811-4-paul.gortmaker@windriver.com
This 2006 era Modular Development System (MDS) has, at its core component,
a full length card with a PCI edge. No case. Serial and network
connectors were on card, so it could optionally be fitted with plastic
stand-offs and run stand-alone off a power brick.
This is very similar to the MPC834x_MDS removed in the prior commit, but
with this board variant as an evolutionary step. DDR2 was now an option,
and the card edge was revised down to PCI-32 as PCI-64 never got traction.
But overall the form factor and design goals were unchanged.
Like all the MDS systems, it was meant as a vehicle to get the CPU out
early to hardware OEMs so software and board development could take place
in parallel.
To that end, the BGA CPU was held in place with a mechanical spring loaded
pressure assembly (vs. solder) so that early rev silicon could be replaced
in the field. Not for COTS deployment!
These were made in limited numbers and availability preference was given
to partners who were planning to make their own boards.
Given that the whole reason for existence was to assist in enabling new
board designs [not happening for 10+ years], and that they weren't
generally available, and that the hardware wasn't really hobbyist friendly
even for retro computing, it makes sense to retire the support for this
particular platform.
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Acked-by: Li Yang <leoyang.li@nxp.com>
[mpe: Drop stale reference to MPC836x_MDS in arch/powerpc/boot/Makefile]
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://msgid.link/20230220115913.25811-3-paul.gortmaker@windriver.com
