If room_on_ring() check fails, try to expand the ring and check again.
When expand a ring, use a cached ring or allocate new segments, link
the original ring and the new ring or segments, update the original ring's
segment numbers and the last segment pointer.
Signed-off-by: Andiry Xu <andiry.xu@amd.com>
Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com>
Tested-by: Paul Zimmerman <Paul.Zimmerman@synopsys.com>
In the past all the rings were allocated with cycle state equal to 1.
Now the driver may expand an existing ring, and the new segments shall be
allocated with the same cycle state as the old one.
This affects ring allocation and cached ring re-initialization.
Signed-off-by: Andiry Xu <andiry.xu@amd.com>
Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com>
Tested-by: Paul Zimmerman <Paul.Zimmerman@synopsys.com>
Factor out the segments allocation and free part from ring allocation
and free routines since driver may call them directly when try to expand
a ring.
Signed-off-by: Andiry Xu <andiry.xu@amd.com>
Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com>
Tested-by: Paul Zimmerman <Paul.Zimmerman@synopsys.com>
In the past, the room_on_ring() check was implemented by walking all over
the ring, which is wasteful and complicated.
Count the number of free TRBs instead. The free TRBs number should be
updated when enqueue/dequeue pointer is updated, or upon the completion
of a set dequeue pointer command.
Signed-off-by: Andiry Xu <andiry.xu@amd.com>
Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com>
Tested-by: Paul Zimmerman <Paul.Zimmerman@synopsys.com>
This patch fixes a buffer overrun bug in
tracepoint_id_to_path(). The bug manisfested itself as a memory
error reported by perf record. I ran into it with perf sched:
$ perf sched rec noploop 2 noploop for 2 seconds
[ perf record: Woken up 14 times to write data ]
[ perf record: Captured and wrote 42.701 MB perf.data (~1865622 samples) ]
Fatal: No memory to alloc tracepoints list
It turned out that tracepoint_id_to_path() was reading the
tracepoint id using read() but the buffer was not large enough
to include the \n terminator for id with 4 digits or more.
The patch fixes the problem by extending the buffer to a more
reasonable size covering all possible id length include \n
terminator. Note that atoll() stops at the first non digit
character, thus it is not necessary to clear the buffer between
each read.
Signed-off-by: Stephane Eranian <eranian@google.com>
Acked-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Acked-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: fweisbec@gmail.com
Cc: dsahern@gmail.com
Link: http://lkml.kernel.org/r/20120313155102.GA6465@quad
Signed-off-by: Ingo Molnar <mingo@elte.hu>
When a machine boots up, the TSC generally gets reset. However,
when kexec is used to boot into a kernel, the TSC value would be
carried over from the previous kernel. The computation of
cycns_offset in set_cyc2ns_scale is prone to an overflow, if the
machine has been up more than 208 days prior to the kexec. The
overflow happens when we multiply *scale, even though there is
enough room to store the final answer.
We fix this issue by decomposing tsc_now into the quotient and
remainder of division by CYC2NS_SCALE_FACTOR and then performing
the multiplication separately on the two components.
Refactor code to share the calculation with the previous
fix in __cycles_2_ns().
Signed-off-by: Salman Qazi <sqazi@google.com>
Acked-by: John Stultz <john.stultz@linaro.org>
Acked-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: Paul Turner <pjt@google.com>
Cc: john stultz <johnstul@us.ibm.com>
Link: http://lkml.kernel.org/r/20120310004027.19291.88460.stgit@dungbeetle.mtv.corp.google.com
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Currently pcpu_devices->panic_stack is passed to pcpu_delegate() in
smp_call_ipl_cpu(). This is wrong because pcpu_delegate() expects
the bottom (high address) of the stack and pcpu_devices->panic_stack
points to the top (low address). We now pass the bottom of the stack
which is pcpu_devices->panic_stack + PAGE_SIZE.
Signed-off-by: Michael Holzheu <holzheu@linux.vnet.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
* 'local_timers-for-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms:
ARM: local timers: make the runtime registration interface mandatory
ARM: local timers: convert MSM to runtime registration interface
ARM: local timers: convert exynos to runtime registration interface
ARM: smp_twd: remove old local timer interface
ARM: imx6q: convert to twd_local_timer_register() interface
ARM: highbank: convert to twd_local_timer_register() interface
ARM: ux500: convert to twd_local_timer_register() interface
ARM: shmobile: convert to twd_local_timer_register() interface
ARM: tegra: convert to twd_local_timer_register() interface
ARM: plat-versatile: convert to twd_local_timer_register() interface
ARM: OMAP4: convert to twd_local_timer_register() interface
ARM: smp_twd: add device tree support
ARM: smp_twd: add runtime registration support
ARM: local timers: introduce a new registration interface
ARM: smp_twd: make local_timer_stop a symbol instead of a #define
Currently the shadow-dirty flags for manual update displays is cleared
in the apply_irq_handler when an update has finished. This is not
correct, as the shadow registers are taken into use (i.e. after that
they are not dirty) when the update is started.
Move the mgr_clear_shadow_dirty() call from apply_irq_handler to
dss_mgr_start_update() to fix this.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Remove all traces of the compile-time local timer interface,
and make the runtime selection mandatory.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Convert the Exynos MCT timers to the runtime registration interface.
Tested on Origen.
Cc: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Now that all users of the previous local timer interface
have been converted to the runtime registration API, make
this interface the only one supported for this driver.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Add support for the new smp_twd runtime registration interface
to the imx6q platforms, and remove the old compile-time support.
The imx6q DTS file is updated to match the TWD DT documentation.
Also present in this patch a DTS fix to the timer interrupt routing
(the PPI connection uses bits [15:8]) and trigger (rising edge).
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Add support for the new smp_twd runtime registration interface
to the highbank platforms, and remove the old compile-time support.
The highbank DTS file is updated to match the TWD DT documentation
and fixes the timer trigger (rising edge).
Acked-by: Rob Herring <rob.herring@calxeda.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Add support for the new smp_twd runtime registration interface
to the ux500 platforms, and remove the old compile-time support.
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Add support for the new smp_twd runtime registration interface
to the shmobile platforms, and remove the old compile-time support.
Cc: Magnus Damm <magnus.damm@gmail.com>
Cc: Paul Mundt <lethal@linux-sh.org>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Add support for the new smp_twd runtime registration interface
to the tegra platforms, and remove the old compile-time support.
Tested on Harmony.
Acked-by: Stephen Warren <swarren@nvidia.com>
Cc: Colin Cross <ccross@android.com>
Cc: Olof Johansson <olof@lixom.net>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Add support for the new smp_twd runtime registration interface
to the RealView/VE platforms, and remove the old compile-time support.
Tested on EB11MP.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Add support for the new smp_twd runtime registration interface
to the OMAP4 platforms, and remove the old compile-time support.
Tested on Panda.
Acked-by: Tony Lindgren <tony@atomide.com>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Add bindings to support DT discovery of the ARM Timer Watchdog
(aka TWD). Only the timer side is converted by this patch.
Acked-by: Rob Herring <rob.herring@calxeda.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Add support for the new registration interface to smp_twd.
Platforms can populate a struct twd_local_timer with MMIO
and IRQ resources, and then call twd_local_timer_register()
to have the timer registered with the core.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
In order to switch to a runtime selectable local timer,
add a registration interface that timer drivers can use to
register to the core.
local_timer_setup() and local_timer_stop() are made weak symbols
in order not to break existing setups.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
When CONFIG_HAVE_ARM_TWD is selected, local_timer_stop is a #define,
while all other local timers are using a real function.
Convert it to an alias of twd_timer_stop, as it helps converting
all local timers to another internal API in a sane way.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
For some reason (sadly i don't identifying the patch right now)
two LCD data lines configured PAD_CTL_SRE_SLOW (wrong slew rate)
since Kernel 3.1. MX25_PAD_GPIO_E__LD16 and MX25_PAD_GPIO_F__LD17
This results in an fauly behaviour and strange color effects.
To ensure that all LCD data pins configured with the proper slew rate,
this patch changes to IOMUX define of all LCD __LDxx pins to PAD_CTL_SRE_FAST.
This problem may affect other mx25 platforms like mx25pdk. Sadly i can't test
it. Of course this problem shouldn't occur when you done your LCD muxing
correctly in the bootloader.
Best regards,
Torsten
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Commit 7504a3e1 ("ath6kl: add padding to firmware log records") accidentally
changed debug.c mode from 100644 to 100755. Revert that back to original.
Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
ath6kl/cfg80211.c:589: WARNING: max() should probably be
max_t(u16, vif->listen_intvl_t, ATH6KL_MAX_WOW_LISTEN_INTL)
Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
My patch 24fc32b3 ("ath6kl: add ath6kl_bmi_write_hi32()") caused a regression
in ath6kl_upload_board_file() and the board_address variable was not
properly initialised in some cases:
ath6kl/init.c:1068:6: warning: ‘board_address’ may be used uninitialized
in this function
Most likely this broke ar6004 support but I can't test that right now.
Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
* ux500/timers:
ARM: plat-nomadik: modernize MTU timer
ARM: plat-nomadik: handle clocking properly
ARM: plat-nomadik: get rid of global mtu base pointer
Add description of pwm[1-4]_start_output, pwm[1-4]_step_output,
pwm[1-4]_stop_output, and pwm[1-4]_max_output attributes to driver
documentation.
Signed-off-by: Guenter Roeck <guenter.roeck@ericsson.com>
Acked-by: Jean Delvare <khali@linux-fr.org>
This must have been messed up while merging, the intention was
clearly to unlock there.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
* 'drm-nouveau-next' of git://anongit.freedesktop.org/git/nouveau/linux-2.6: (57 commits)
drm/nouveau: map first page of mmio early and determine chipset earlier
drm/nvd0/disp: disconnect encoders before reprogramming them
drm/nvd0/disp: move syncs/magic setup to or mode_set
drm/nouveau/dp: account for channel coding overhead in link training
drm/nvd0/disp: fix dcb sor link matching in supervisor handler
drm/nvd0/disp: initial implementation of displayport
drm/nouveau/dp: make dp dpms function common, call from sor code instead
drm/nv50/hwsq: some nv92 fixes
drm/nouveau/dp: move all nv50/sor-specific code out of nouveau_dp.c
drm/nouveau/dp: make functions for executing various bios tables
drm/nouveau/pm: fix oops if chipset has no pm support at all
drm/nouveau/bios: rework vbios shadowing
drm/nouveau/bios: attempt acpi rom fetch before pcirom
drm/nvd0/disp: attempt to handle more than 2 crtcs if possible
drm/nvc0/vram: get part count from PUNITS
drm/nv40/pm: fix fanspeed regression
drm/nouveau/pm: several fixes for nvc0 memory timings
drm/nvc0/pm: restrict pll mode to clocks that can actually use it
drm/nouveau/dp: fix bad comparison in dp_link_train_commit()
drm/nouveau/mxm: call mxmi to determine revision before calling mxms
...
Add support for BT-driven configuration of the TiVo remote.
Reported-by: Joshua Dillon <jvdillon@gmail.com>
Signed-off-by: Jiri Kosina <jkosina@suse.cz>
NVIDIA appear to do these around the same place they do the MODE_CTRL
methods, and for DP at least we need to bash some extra bits in "syncs"
to keep EVO happy.
It's a bit of a guess as to the 6/8bpc, but i have no better idea yet.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
The shift from hwsq_data = 0x1400 to 0x080000 actually happened in nv94, not nv92
This fixes some reclocking issues on my newly acquired nv92
Signed-off-by: Martin Peres <martin.peres@labri.fr>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Off-chip encoders (which we don't support yet anyway), and newer chipsets
(such as NVD9...), will need their own code for this.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
More code to do the same thing, but will make it easier to handle various
changes that could possibly happen the the VBIOS tables.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
