Commit Graph

593842 Commits

Author SHA1 Message Date
Mark Yao
47510f4818 drm/rockchip: vop: Initialize vskiplines to zero
There is a path that use vskiplines with non-initialize.
That would cause vop abnormal behavior.

Change-Id: I53c6c575d6acc16aeae761dbb4867f3bc8bfe5ce
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
2016-05-04 18:29:14 +08:00
Mark Yao
9bde4e671f drm/rockchip: vop: fix iommu crash with async atomic
On Async atomic_commit callback, drm_atomic_clean_old_fb will
clean all old fb, but because async, the old fb may be also on
the vop hardware, dma will access the old fb buffer, clean old
fb will cause iommu page fault.

Reference the fb and unreference it when the fb actuall swap out
from vop hardware.

Change-Id: I585786884295060efdaef0a00c3cbd75244399d7
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
2016-05-04 18:27:54 +08:00
Mark Yao
ed547bb16f drm/rockchip: vop: support plane zpos property
Change-Id: Idd0265020a591ce5b34d117442104f625e331119
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
2016-05-04 18:24:59 +08:00
Mark Yao
751837be5e drm/rockchip: vop: rk3399: add area plane
Change-Id: Ia6f77353363e25423ac29129372bc510565682f8
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
2016-05-04 18:24:13 +08:00
Mark Yao
574b3c4c2a drm/rockchip: vop: rk3288: add area plane
Change-Id: Iac8fde019020d8f1a671d52c1a4d91ad2d050d43
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
2016-05-04 18:22:57 +08:00
Mark Yao
6c060b5946 drm/rockchip: vop: support multi area plane
The series vop of VOP_FULL framework support area plane, such as
RK3288 and RK3399, one group of area planes share same hardware,
reuse the hardware on different scanout time, this design is
useful to support mulit planes with low hardware consume.

Change-Id: Ie53211ce9ed22d03f7668637efbb7c95d9a8eb5b
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
2016-05-04 18:19:10 +08:00
Mark Yao
eaf6764dee drm: introduce share plane
The plane hardware is used when the display scanout run into plane active
scanout, that means we can reuse the plane hardware resources on plane
non-active scanout.

Because resource share, There are some limit on share plane: one group
of share planes need use same zpos, can't not overlap, etc.

We assume share plane is a universal plane with some limit flags.
people who use the share plane need know the limit, should call the ioctl
DRM_CLIENT_CAP_SHARE_PLANES, and judge the planes limit before use it.

Change-Id: Iecc3d8e7f1ce29d567cdbad689ba4dbad3d594e1
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
2016-05-04 18:16:50 +08:00
Mark Yao
e5683dd6c1 FROMLIST: drm/rockchip: get rid of rockchip_drm_crtc_mode_config
We need to take care of the vop status when use
rockchip_drm_crtc_mode_config, if vop is disabled,
the function would failed, that is terrible.

Save output_type and output_mode into rockchip_crtc_state,
it's nice to make them into atomic.

Conflicts:

	drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
	drivers/gpu/drm/rockchip/dw-mipi-dsi.c
	drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
	drivers/gpu/drm/rockchip/inno_hdmi.c
	drivers/gpu/drm/rockchip/rockchip_drm_drv.h
	drivers/gpu/drm/rockchip/rockchip_drm_vop.c

Change-Id: I43c49a92b2b9df02ce8a055bd16948b400ab0f47
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
(am from https://patchwork.kernel.org/patch/8844321/)
2016-05-04 18:15:26 +08:00
Caesar Wang
629b58a49a UPSTREAM: arm64: Enable the timer on Rockchip architecture
On the RK3368 SoC, support the APB timers for rockchip platform.

Change-Id: I2bee09c4140994d3d2e23f1820663230d82547de
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
(cherry picked from commit c840f28bbf)
2016-05-03 17:48:47 +08:00
Shawn Lin
e19fe663b1 UPSTREAM: clocksource/drivers/rockchip: Add err handle for rk_timer_init
Currently rockchip_timer doesn't do some basic cleanup work when
failing to init the timer. Let's add err handle routine to deal
with all the err cases.

Change-Id: I73bbd32592e6fe157a8d166743db3fc130d0004c
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
(cherry picked from commit 522ed95c26)
2016-05-03 17:48:47 +08:00
Daniel Lezcano
c21cd84a43 UPSTREAM: clocksource/drivers/rockchip: Add COMPILE_TEST option
Increase the compilation test coverage by adding the COMPILE_TEST option.

Due to the dsb() usage in the driver, this driver is only compilable on
ARM and ARM64.

Change-Id: I5f2c1a5353a7b20c80dcfc3cd3900510f56a0729
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>
(cherry picked from commit 40ada2aac5)
2016-05-03 17:48:47 +08:00
Caesar Wang
6d18246823 UPSTREAM: clocksource/drivers/rockchip: Remove dsb() usage
The dsb() instruction is pointless in this code.

Remove it.

That also fixes the ARM64 compilation issue.

Change-Id: I0c8e33abe0d976714f4df288fe5ac52ffb8ded5b
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Tested-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>
(cherry picked from commit 23b8f81f38)
2016-05-03 17:48:47 +08:00
Caesar Wang
2e2e74d27f UPSTREAM: clocksource/drivers/rockchip: Make the driver more readable
Let's checkstyle to clean up the macros with such trivial details.

Change-Id: I6cf0c7cf5e48bcb4d52a483fdba7c4ce26677f06
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
(cherry picked from commit a0d2216ec0)
2016-05-03 17:48:47 +08:00
Caesar Wang
e144ed1742 arm64: dts: rk3399: fix the incorrect crit temperture
Fix the incorrect critial temperture for gpu thermal.

Change-Id: I9ecfc107afcdbb421ae40cc796c40a39d6d68677
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
2016-05-03 17:48:04 +08:00
Elaine Zhang
a8b948f89f ARM64: dts: rk3399: support for evb rev1 and evb rev2
For evb1
- rk3399-evb-rev1-android.dts
- rk3399-evb-rev1-cros.dts

For evb2
- rk3399-evb-rev2-android.dts
- rk3399-evb-rev2-cros.dts

Change-Id: I95a2d4229c0a7581ca5ae777340f4d26e86503ba
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
2016-05-03 17:39:49 +08:00
Huang, Tao
025cebcd42 ARM64: rockchip_defconfig: enable THERMAL_DEFAULT_GOV_FAIR_SHARE
Change-Id: Ide2ca2361cb13454d0e3269a929a57463da53985
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>
2016-05-03 16:34:49 +08:00
Zhiqin Wei
02b93726be ARM64: dts: rk3399: android: Enable rga device
Change-Id: I7c348158c410b8bd32a574a607a975fe5e8b74a5
Signed-off-by: Zhiqin Wei <wzq@rock-chips.com>
2016-04-28 11:59:39 +08:00
Shawn Lin
931cefd0d5 ARM64: dts: rk3399-evb: add mmc-hs400-enhanced-strobe support
This patch enables mmc-hs400-enhanced-strobe for rk3399-evb, so
enhanced strobe function will be used if any eMMC 5.1 is probed.

Change-Id: If5f30e0d759f7a9850bec82c3d53d9bb26ba8c3d
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
2016-04-28 11:50:27 +08:00
Shawn Lin
8714599140 mmc: add hs400 enhanced strobe support for mmc subsystem
HS400 enhanced strobe is a new feature introduced by eMMC
spec 5.1, let's implement it and enjoy it!

please note that currently I have no much bandwith to split this
big patch into patchset. So please use, test and applied! Thanks.

Change-Id: I874f18a617a1b69e3ff56f5c134feb817b6985b9
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
2016-04-28 11:49:40 +08:00
Shawn Lin
ddfc5a9bcc Documentation: mmc: add mmc-hs400-enhanced-strobe
Let's add some description of mmc-hs400-enhanced-strobe
which can be used to support hs400 enhanced strobe function
introduced by eMMC spec 5.1

Change-Id: I03b8e803071dc7034bddf655892b12eabcaa852a
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
2016-04-28 11:48:58 +08:00
Huang, Tao
1b96a26c65 netfilter: xt_qtaguid: fix crash on non-full sks
If sock is request_sock then kernel will crash. So use
skb_to_full_sk() and sk_fullsock() helper to make sure
we get full sock.

Change-Id: Iefd548e0591055b1a8031f0835c4dca7b9d42b61
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>
2016-04-27 18:43:41 +08:00
Caesar Wang
282266255a ARM64: rockchip_cros_defconfig: cleanup and use HZ=1000 for cros
At least for the cros, we have previously kept ARM and ARM64 common
configs on HZ=1000, but at least on ARM64, each individual ARM64 kernel
config.

Also, cleanup for cros config.

Change-Id: I1f4470a01b409e212bd60b6fd885a8f2b53d8850
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
2016-04-27 17:54:37 +08:00
Xing Zheng
2ba5c8a49c clk: rockchip: rk3399: fix the incorrect parent for c/gpll_aclk_perihp_src
Change-Id: I9cacddcaa637d46a96c7c70c8d0938688561b187
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
2016-04-27 16:51:13 +08:00
Douglas Anderson
a2fdf2cd47 ARM64: rockchip_cros_defconfig: Don't force the command line
There's no reason to force the command line at this point.

Forcing the command like makes it pretty hard to switch between eMMC and
SD card boots because the old command line forced the root filesystem to
/dev/mmcblk0p3 vs. depthcharge automatically inserting the right UUID
based on where it found the kernel.

BUG=None
TEST=I see my command line now.

Change-Id: I5f76b60b9726aee2152c09fbd6460b2b973b0b20
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
2016-04-27 11:26:24 +08:00
Elaine Zhang
8b1193c064 ARM64: rockchip_defconfig: enable lp8752 regulator
Change-Id: Id3281624c80bb56fb8fd939f14edfdd59bc0393a
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
2016-04-26 21:18:32 +08:00
Elaine Zhang
307d1c7d08 regulator: rockchip: lp8752: support lp8752 regulator
updata lp8752 driver.
add devicetree bindings for lp8752.

Change-Id: I21cdbde985d4663862b56c28429c41d9d3c38c36
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
2016-04-26 21:18:32 +08:00
Douglas Anderson
b67caebc94 ARM64: dts: rk3399: add trackpad for gru/kevin boards
The trackpad bits in the DTS needed some love.  This adds some basic
infrastructure support in the main gru dts file and then adds the
specific trackpad used on kevin-r0 and kevin-r1.  For now just duplicate
between kevin-r0 and kevin-r1 and we'll decide if we want to share
later (perhaps we want an "atmel" snippet?).

Note that gpio-keymap here makes the driver appear as a trackpad rather
than a touchscreen (driver assumes that anything with buttons is a
trackpad).  Input entry corresponding to the button on the trackpad was
found by experimentation as suggested in the device tree bindings.

BUG=chrome-os-partner:52637
TEST=With series, trackpad works in browser; button works.

Change-Id: Ia62cff90449625778fd99054b914e22a55c13550
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Reviewed-on: https://chrome-internal-review.googlesource.com/256510
Commit-Ready: Doug Anderson <dianders@google.com>
Tested-by: Doug Anderson <dianders@google.com>
Reviewed-by: Brian Norris <briannorris@google.com>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
2016-04-26 18:51:57 +08:00
Douglas Anderson
cdcdef3122 ARM64: rockchip_cros_defconfig: Turn on atmel touchscreen driver
The touchscreen driver is used for both atmel trackpads (AKA touchpads)
and touchscreens.  Turn it on so we can use it.

BUG=chrome-os-partner:52637
TEST=With series, trackpad works in browser; button works.

Change-Id: I316a8411c35ab7b48182cbe704c9f80114a5afcf
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Reviewed-on: https://chrome-internal-review.googlesource.com/256511
Commit-Ready: Doug Anderson <dianders@google.com>
Tested-by: Doug Anderson <dianders@google.com>
Reviewed-by: Doug Anderson <dianders@google.com>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
2016-04-26 18:51:17 +08:00
Lin Huang
8bbd91e964 ARM64: dts: rockchip: kevin: enable HS400 mode on kevin board
enable HS400 mode on kevin, if found it is not stable, just
remove "mmc-hs400-1_8v" property, it will use HS200 mode instead.

Change-Id: I7c5d162de1f15bcc069134ffa228d833be2b8a02
Signed-off-by: Lin Huang <hl@rock-chips.com>
2016-04-26 17:50:53 +08:00
Lin Huang
66db99992e ARM64: dts: rockchip: kevin: add configure for emmc phy
assign freq-sel, dr-sel, opdelay value to meet the hardware
requirement of kevin.

Change-Id: Ibb410c607e69c966a9f2949846ef95ec34e15e79
Signed-off-by: Lin Huang <hl@rock-chips.com>
2016-04-26 17:50:09 +08:00
xxx
64f456e3c7 ARM64: dts: rk3399: support arm64 cpuidle-dt
Change-Id: I5506a6647985f44de352f097cf809b31f1917e6a
Signed-off-by: Tony Xie <tony.xie@rock-chips.com>
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
2016-04-26 14:05:26 +08:00
Caesar Wang
8d152d0d9b ARM64: dts: rk3399: change for thermal zone
Let's control the power more be effective.We should make the big clusters
cpu throttle firstly.

Change-Id: I8f055f5856ce0239f9bf8bb5b5f2705b3151ba03
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
2016-04-26 10:37:00 +08:00
Caesar Wang
3666820804 thermal: rockchip: fixes the period time for tsadc
we should increase the period cycles to save power since the rk3399 has
the high frequency for tsadc clock.

Change-Id: Ia9481515cac6dd6026d3312ac930329a3e906436
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
2016-04-26 10:36:25 +08:00
Caesar Wang
cb5fcd3937 thermal: rockchip: add the set_trips function
Whenever the current temperature is updated, the trip points immediately
below and above the current temperature are found. A sensor driver
callback `set_trips' is then called with the temperatures.
Lastly, The sensor will trigger the hardware high temperature interrupts
to increase the sampleing rate and throttle frequency to limit the temperature
rising When performing passive cooling.

Change-Id: I16b2ab4f8fb85425aab5cd3777ca600bd4cace20
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
2016-04-26 10:36:17 +08:00
Sascha Hauer
dcdaad1858 thermal: bang-bang governor: act on lower trip boundary
With interrupt driven thermal zones we pass the lower and upper temperature
on which shall be acted, so in the governor we have to act on the exact lower
temperature to be consistent. Otherwise an interrupt may be generated on the
exact lower temperature, but the bang bang governor does not react.

Change-Id: Ic9dd855b0767d34b15505c1ff12ea99b76cdcea7
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
2016-04-26 10:36:08 +08:00
Sascha Hauer
2aaa7c7097 thermal: streamline get_trend callbacks
The .get_trend callback in struct thermal_zone_device_ops has the prototype:
        int (*get_trend) (struct thermal_zone_device *, int,
                          enum thermal_trend *);
whereas the .get_trend callback in struct thermal_zone_of_device_ops has:

        int (*get_trend)(void *, long *);

Streamline both prototypes and add the trip argument to the OF callback
aswell and use enum thermal_trend * instead of an integer pointer.

While the OF prototype may be the better one, this should be decided at
framework level and not on OF level.

Change-Id: I39c5a38a22c7a2177a35338bc63c8ba36983a7b0
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
2016-04-26 10:35:59 +08:00
Sascha Hauer
d464660f05 thermal: of: implement .set_trips for device tree thermal zones
Change-Id: I566c468165c35e54a17663888539817246d0f0ed
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
2016-04-26 10:35:50 +08:00
Sascha Hauer
606113604b thermal: Add support for hardware-tracked trip points
This adds support for hardware-tracked trip points to the device tree
thermal sensor framework.

The framework supports an arbitrary number of trip points. Whenever
the current temperature is updated, the trip points immediately
below and above the current temperature are found. A .set_trips
callback is then called with the temperatures. If there is no trip
point above or below the current temperature, the passed trip
temperature will be -INT_MAX or INT_MAX respectively. In this callback,
the driver should program the hardware such that it is notified
when either of these trip points are triggered. When a trip point
is triggered, the driver should call `thermal_zone_device_update'
for the respective thermal zone. This will cause the trip points
to be updated again.

If .set_trips is not implemented, the framework behaves as before.

This patch is based on an earlier version from Mikko Perttunen
<mikko.perttunen@kapsi.fi>

Change-Id: I8c33f9859909704583ba8b6632b91ffd58a9628e
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
2016-04-26 10:35:41 +08:00
Caesar Wang
db6c7c9251 Revert "CHROMIUM: thermal: of: Add support for hardware-tracked trip points"
This reverts commit 2f8e5324ef.
Since there are the perfect patches in fromlist to instead of it.

Change-Id: I9f15478d0b0b94805d1bb9539a1cbea42a7af6a1
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
2016-04-26 10:35:30 +08:00
Caesar Wang
898b271f45 Revert "thermal: rockchip: add the set_trips function"
This reverts commit ec24f1ae50.

Change-Id: I1fa579309691ac20d22bebf9f9cea1cd2243440f
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
2016-04-26 10:35:18 +08:00
Xing Zheng
03ad390fa7 clk: rockchip: rk3399: keep the pclk_vio is CLK_IGNORE_UNUSED and critical
When we use the MIPI screen, the driver will unprepare and disable
the phy_cfg, it will diable its parent pclk_vio:
dw_mipi_dsi_phy_init
  --> clk_disable_unprepare
    --> clk_disable
      --> clk_core_disable(core->parent)

The pclk_vio supply power for pclk_vio_grf, hence, disable pclk_vio_grf will
cause other drivers failed to operate GRF.

Change-Id: I6d5bd27b9478da09209130f1fd5a62c0d4bb1785
Reported-by: Yakir Yang <ykk@rock-chips.com>
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
2016-04-25 20:35:26 +08:00
Shawn Lin
276292803f ARM64: dts: rk3399-evb: enable HS400 mode for emmc
We now enable HS400 mode for rk3399-evb for rk folks
to do more test for hs400. If any problem, please remove
mmc-hs400-1_8v from rk3399-evb.dtsi and any reports are
welcomed.

Change-Id: If7d9d291351a075fbb258bd04fce2a2f9cb81be3
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
2016-04-25 20:34:26 +08:00
Shawn Lin
cf1667564b ARM64: dts: rk3399-evb: add some configure for emmc phy
This patch assign freq-sel, dr-sel, opdelay to meet the
hw requirement of rk3399-evb.

Change-Id: I1ef98645b5414bcffa0b5711bc9eb63f077a5dc3
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
2016-04-25 20:33:59 +08:00
Shawn Lin
c19b56710d ARM64: dts: rk3399-evb: remove freq limit for sdhci
Change-Id: Ib5916869b79016f6dd4f99389bf723d82355bca3
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
2016-04-25 20:28:00 +08:00
Shawn Lin
511074f3dc ARM64: dts: rk3399: assign clk parent and rate for SCLK_EMMC
Let's assign clk parent and rate for SCLK_EMMC to meet the
requiremen.

Change-Id: I3730a2124494da51717b1756f488f9df5bcd6423
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
2016-04-25 20:27:32 +08:00
Shawn Lin
68eac41717 mmc: sdhci-of-arasan: refactor set_clock callback
commit 61b914eb81 ("mmc: sdhci-of-arasan: add phy support for
sdhci-of-arasan") introduce phy support for arasan. According to
the vendor's databook, we should make sure the phy is in poweroff
stat before we configure the clk stuff. Otherwise it may cause
some IO sample timing issue from the test. But we don't need this
extra operation while running in non HS200/HS400 mode since phy
doesn't trigger sampling block.

Change-Id: I5506f99e5a3b4d9a4356ad485ceac900c6d754aa
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
2016-04-25 18:30:39 +08:00
Shawn Lin
9faaf821a7 phy: rockchip-emmc: fix dllrdy timeout issue
According to the databook, 10.2us is the max time for
dll to be ready to work. However from the test, some chips
need 20us for dll to ready. So this patch add some extra
margin for dllrdy to be ready to meet the reality.

Change-Id: Ie5362b4403309d260ac621b8b20a0f5b579d3153
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
2016-04-25 17:58:04 +08:00
Shawn Lin
413ec720f5 Documentation: bindings: add more configuration for rockchip emmc phy
This patch add some optional configuration for dt. freq-sel can be used
to decide the phy sample clk in order to match the real freq of emmc
controller. dr-sel can be configured to match the requirement of different
drive strength of phy IO. opdelay should be used to adjust the output
delay for clk IO and data IO, which is useful for sloving timing issue.

Change-Id: I0b4da111581c76fbb96b15cd6be653aaa4843c33
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
2016-04-25 17:57:31 +08:00
Shawn Lin
d1613edc35 phy: rockchip-emmc: add some setup configuration
Let's expose the freq-sel, dr-sel, opdalay to dt for user
to decide how to configure their phy.

Change-Id: Ib9ef40b263d3fd669c7bbda666d28c0c55ff6d8e
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
2016-04-25 17:56:45 +08:00
Douglas Anderson
6c4113f686 ARM64: dts: rockchip: Tiny comment cleanups for kevin-r0
I was having a hard time figuring out where to put new things in
kevin-r0.  Add some comments to explain the sort order.

BUG=None
TEST=Build and boot

Change-Id: I9fb8c200f934542ebed984566bab039d4ec3fd13
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Reviewed-on: https://chrome-internal-review.googlesource.com/256509
Commit-Ready: Doug Anderson <dianders@google.com>
Tested-by: Doug Anderson <dianders@google.com>
Reviewed-by: Brian Norris <briannorris@google.com>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
2016-04-25 16:02:41 +08:00