On Cortex-A12 (r0p0, r0p1), in very rare timing conditions, a sequence of
VMOV to Core registers instructions, for which the second one is in the
shadow of a branch or abort, can lead to a deadlock when the VMOV
instructions are issued out-of-order. This workaround setting bit 1 of
the Internal Feature Register prevents the erratum.
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>
For we don't use charge display function in 3.10 kernel, when
android write 0 to /sys/class/android_usb/android0/enable no need
to set pcd->conn_status = 2 and gating usb clocks.
Signed-off-by: lyz <lyz@rock-chips.com>
no power domain on rk3036, but trying to enable the power
domain in previous driver code. remove the power domain
enable in this revision on rk3036 platform.
Signed-off-by: Alpha Lin <alpha.lin@rock-chips.com>
The commit 28e9901cf0 set
otg device phy enter suspend and resume it after system
wakeup. But we don't control the clk, and it will cause
otg device repeatedly disable clk when resume from suspend.
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
Not all the mipi panel support the non-continued function.
So it is better not support this function in SDK. We can
offer single patch for them who need this function.
Signed-off-by: chenyifu <chenyf@rock-chips.com>
Sometimes we want to display logo at hdmi screen. but hdmi uboot
resolution maybe different with framebuffer size, so we need read
logo config from regs and decide how to display logo at kernel.
now only support uboot logo size = kernel logo size
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
Define the vpu and hevc as the sub-devices of the vpu_combo on
rk3036 and rk312x, combine the work queue of two device, avoid two
device running in the same time, (cause bus error on platform rk3036
and rk312x).
immediately power down lcdc and clock, maybe
regs_update_handler still work, some status would
became wrong.
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
source code for device/rockchip/common/gpu/libMali-T760/mali_kbase.ko,
in branch rk/rk32/mid/5.0/develop,
commit 1b187041f11b7ca1d6c1490b934f09648f334a19.
When selecting a best setting for rk3188plus type pll, consider a
larger NO first(means larger VCO freq), and a smaller NR later.
Signed-off-by: dkl <dkl@rock-chips.com>
