The original setting of "max_job_runtime" is too small
that jobs are too easy to timeout and be killed.
Change-Id: I5316c2b594d94dd0b844ef9a297baa7b226c4665
Signed-off-by: chenzhen <chenzhen@rock-chips.com>
Add vsel gpio for syr827, which is PMIC_SLEEP in hardware pcb.
The driver will parse the gpio and use it to indicate the chip
work status, as the following codes:
static int fan53555_is_enabled ()
if defined vsel_gpio
gpiod_get_raw_value
else
regmap_read
Before the patch, the log shows:
CPU4: update cpu_capacity 1024
CPU4: Booted secondary processor [410fd033]
cache: parent cpu4 should not be sleeping
rk3x-i2c ff650000.i2c: timeout, ipd: 0x10, state: 1
Since cpu4 is the base core for cluster1, which need to initialize
cpufreq during boot up, finally call fan53555_is_enabled. But the
i2c is suspended at that time, can't get interrupt until timeout.
Change-Id: I301e95be3b60d2faa456759d88c06cf64c2019ca
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Vop would always report post buf empty error if enable
post scale config with non-scale factor
Change-Id: Ibc3f27c674195e6467471069488f14471927f709
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
The otg_sm_work will suspend the usb2 phy immediately
if it detects disconnection from host. However, the usb2
controller(e.g. DWC2) may need to reinit registers and
reset usb core after usb disconnect, and it needs to
keep the usb2 phy stay in power on state to get utmi clk
for these usb controller operation. We don't have a good
synchronization mechanism to operate usb2 phy between
usb2 phy driver and usb2 controller driver, so we delay
4s to suspend phy if detect otg device disconnect from
host, this can make sure that usb2 controller completes
reinitialization before suspend usb2 phy.
Change-Id: I79288b8c7b141bb16e6d96d80cfee75f7558d2c0
Signed-off-by: William Wu <william.wu@rock-chips.com>
Use the same calculation as the vendor kernel to derive the escape clock
speed.
Change-Id: I7aff4dc7fa9598df164148eaf44304caad704f23
Signed-off-by: xubilv <xbl@rock-chips.com>
Requesting the HS clock from the PHY before we initialize it causes an
invalid signal to be sent out since the input clock is not yet
configured. The PHY databook suggests only asserting this signal when
performing HS transfers, so let's do that.
Change-Id: I7006f81d8c620dc84e84f99383c7b5414d6ac12d
Signed-off-by: xubilv <xbl@rock-chips.com>
It is convenient for the client to manually adjust
the value of lane rate.
Change-Id: Ic6d8c4d235eacc8cb7540d172bd69c29c2b277dd
Signed-off-by: xubilv <xbl@rock-chips.com>
The analysis of platform parameters Only need to do it once,
if this in bind function, when return -EPROBE_DEFER,
it will be executed more than once.
Change-Id: I508021f930d39e1b79e1421c4262b9e7ab501b6c
Signed-off-by: xubilv <xbl@rock-chips.com>
This flag is used as a condition for the register configuration
Change-Id: I6741063b106ae00f4f1a690abde79d76bc529e95
Signed-off-by: xubilv <xbl@rock-chips.com>
Add dts file for firefly rk3399 board to run android os.
Support soc sub-system, vop, edp, rga, audio, wifi and
so on.
Change-Id: Ia921769b81d4a74784bb3e638b2cb01111c621c9
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
If default phy pre-pll output pixclock is same to the requested rate,
the set_rate function is not called, inno->pixclock is zero and
make phy work not ok. This patch update inno->pixclock both in the
recalc_rate and set_rate, make pixclock be the real value.
Change-Id: Ifd4e145c499c2e82f96918ca62235627bf326734
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
CABC(Content Adaptive Backlight Control) is used to
increase the contrast of such LCD-screens the backlight
can be (globally) dimmed when the image to be displayed
is dark (i.e. not comprising high intensity image data)
while the image data is numerically corrected and adapted
to the reduced backlight intensity.
Change-Id: I0bd84375264675943f1b601f0cac8b843567087d
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
Only 200MHz, 300MHz, 400MHz, 528MHz, 600MHz, 666MHz, 732MHz and
800MHz are available at present.
Change-Id: I3a376b389fe6b06b3b32f0c695de2cbde05dfeea
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Replace "rockchip,rk33xx-lvds" with "rockchip,rk3368-lvds"
Change-Id: I065de5d994f167129591025e4251944478fa43e7
Signed-off-by: WeiYong Bi <bivvy.bi@rock-chips.com>
The PWM framework has clarified the concept of reference PWM config (the
platform dependent config retrieved from the DT or the PWM lookup table)
and real PWM state.
Use pwm_get_args() when the PWM user wants to retrieve this reference
config and not the current state.
This is part of the rework allowing the PWM framework to support
hardware readout and expose real PWM state even when the PWM has just
been requested (before the user calls pwm_config/enable/disable()).
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
(cherry picked from commit dd0b38b7ca)
Change-Id: I54c4b3853359b5fa41f8f949b504f82c6f069034
Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>
There is a bad unlock balance issue in the following case:
1. Use micro USB 2.0 interface;
2. Vbus 5v is always powered on;
3. Wait until DWC2 completes initialization, and then plug
in OTG to Host cable;
4. Plug out the OTG cable, and then we will reproduce this
issue, and we'll get the following log if we enable the
kernel lock debugging.
=====================================
[ BUG: bad unlock balance detected! ]
4.4.71 #303 Not tainted
-------------------------------------
swapper/0/0 is trying to release lock (&(sl)->rlock) at:
[<c0795848>] dwc_otg_pcd_suspend_cb+0x20/0x48
but there are no more locks to release!
other info that might help us debug this:
1 lock held by swapper/0/0:
stack backtrace:
CPU: 0 PID: 0 Comm: swapper/0 Not tainted 4.4.71 #303
Hardware name: Rockchip (Device Tree)
[<c0110018>] (unwind_backtrace) from [<c010c04c>] (show_stack+0x10/0x14)
[<c010c04c>] (show_stack) from [<c0423e28>] (dump_stack+0x9c/0xd4)
[<c0423e28>] (dump_stack) from [<c021803c>] (print_unlock_imbalance_bug.part.7+0x8c/0xb8)
[<c021803c>] (print_unlock_imbalance_bug.part.7) from [<c018ce74>] (lock_release+0x284/0x54c)
[<c018ce74>] (lock_release) from [<c0c0e03c>] (_raw_spin_unlock+0x18/0x54)
[<c0c0e03c>] (_raw_spin_unlock) from [<c0795848>] (dwc_otg_pcd_suspend_cb+0x20/0x48)
[<c0795848>] (dwc_otg_pcd_suspend_cb) from [<c0792cc4>] (dwc_otg_handle_usb_suspend_intr+0x68/0x37c)
[<c0792cc4>] (dwc_otg_handle_usb_suspend_intr) from [<c079329c>] (dwc_otg_handle_common_intr+0x2c4/0xd58)
[<c079329c>] (dwc_otg_handle_common_intr) from [<c0786a18>] (dwc_otg_common_irq+0xc/0x18)
[<c0786a18>] (dwc_otg_common_irq) from [<c0199e48>] (handle_irq_event_percpu+0x188/0x4d4)
[<c0199e48>] (handle_irq_event_percpu) from [<c019a1cc>] (handle_irq_event+0x38/0x5c)
[<c019a1cc>] (handle_irq_event) from [<c019d654>] (handle_fasteoi_irq+0xa8/0x124)
[<c019d654>] (handle_fasteoi_irq) from [<c0199454>] (generic_handle_irq+0x18/0x28)
[<c0199454>] (generic_handle_irq) from [<c0199754>] (__handle_domain_irq+0x88/0xb0)
[<c0199754>] (__handle_domain_irq) from [<c01014b4>] (gic_handle_irq+0x4c/0x94)
[<c01014b4>] (gic_handle_irq) from [<c010cbb8>] (__irq_svc+0x58/0x98)
It's because that when plug in OTG to host cable, the
core_if->lock will be initialized to hcd->lock (check_id()->
id_status_change()->cil_hcd_start()->dwc_otg_hcd_reinit()),
so we should release core_if->lock before call cil_pcd_suspend()
rather than release the pcd->lock inside of callback function.
Change-Id: I1e32f37c701d1a8d741947b6bf385c1bbcb6da78
Signed-off-by: William Wu <william.wu@rock-chips.com>
Currently the driver uses a custom function to wait for flip to complete
after an atomic commit. It was needed before because of two problems:
- there is no hardware vblank counter, so the original helper would
have a race condition with the vblank interrupt,
- the driver didn't support unreferencing cursor framebuffers
asynchronously to the commit, which was what the helper expected.
Since both problems have been solved by previous patches, we can now
make the driver use the generic helper and remove custom waiting code.
Signed-off-by: Tomasz Figa <tfiga@chromium.org>
(cherry picked from commit 81c248f75a)
Change-Id: Ida5a38b71f9e7812f415eb8889d906d2fe3b093e
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
