The function cpu_power_to_freq is used to find a frequency and set the
cooling device to consume at most the power to be converted. For example,
if the power to be converted is 80mW, and the em table is as follow.
struct em_cap_state table[] = {
/* KHz mW */
{ 1008000, 36, 0 },
{ 1200000, 49, 0 },
{ 1296000, 59, 0 },
{ 1416000, 72, 0 },
{ 1512000, 86, 0 },
};
The target frequency should be 1416000KHz, not 1512000KHz.
Fixes: 349d39dc57 ("thermal: cpu_cooling: merge frequency and power tables")
Link: https://patchwork.kernel.org/patch/11613103/
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Change-Id: Ia9d407787834f10190c8ba1e77ea1c23ed2bb25b
WARNING: modpost: missing MODULE_LICENSE() in drivers/net/wireless/rockchip_wlan/rkwifi/rk_wifi_config.o
see include/linux/module.h for more information
Change-Id: Ie683a00a1d0c66633fa7c169179298b08ef95452
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
For rockchip platforms, the userspace uvc application use
bytesused == 0 as a way to indicate that the data is all
zero and unused. In that case, the uvc driver should use
the allow_zero_bytesused flag to keep bytesused 0 rather
than use the buf actual size instead. This can help to
preview 1080P@MJPG faster.
Change-Id: Ic4d561f18e85d759b5a2405db4f6fb48533e1781
Signed-off-by: William Wu <william.wu@rock-chips.com>
config bus-type in dts to distinguish between mipi and lvds.
bus-type = <3> for lvds interface.
Change-Id: I5c043bd238522768280e6e117c79476f27118c65
Signed-off-by: Cai YiWei <cyw@rock-chips.com>
in rk3399 rkvdec, after 264 task run, 264 hardware may remain state,
and it cannot clear completely. Case this, when last task is 264
and current is vp9, vp9 affect decode error. Thus, it should reset
hardware before task run, when 264 switch vp9.
Change-Id: Ie038f9de8533d15cd828f5fdde7634f278fbd061
Signed-off-by: Ding Wei <leo.ding@rock-chips.com>
rk3399/rk3288 Android and Linux devices are all using drivers/gpu/arm/midgard,
which is Midgard device driver on DDK r18.
Change-Id: Iac8484edf91d57c7b74d5b952c96e0bb03159791
Signed-off-by: Zhen Chen <chenzhen@rock-chips.com>
This driver depends on rockchip vendor storage.
Change-Id: I1b56a60037d7a214c228d528fabf3f651c5597cf
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
This driver aimed at starting decompression as soon as
possible.
Change-Id: Ie29f43935f0642ae8c9c605d3ebc40292d4d1781
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
In preparation for adding new driver to support starting
decompress ramdisk.
Change-Id: Icbd51f2798367430443bae9af5656891b93ac3bd
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Allow kernel access 0x00200000~0x00208000, because the first usable region
must be PMD aligned. Otherwise rampoops would not work.
Fixes: 9e109a2600 ("ARM: dts: rockchip: reserve 32KB shared memory for rv1126-evb-ddr3-v10-tb")
Change-Id: I170a6d946695dbace8064eafa57986787d8cab86
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
For map memory, we should call vmap other than ioremap when pfn_valid().
Otherwise we would get the following warning:
WARNING: CPU: 3 PID: 35 at arch/arm/mm/ioremap.c:303 __arm_ioremap_pfn_caller+0x7c/0x1b4
Modules linked in:
CPU: 3 PID: 35 Comm: init/3 Not tainted 4.19.111 #348
Hardware name: Generic DT based system
[<b070efe8>] (unwind_backtrace) from [<b070b560>] (show_stack+0x10/0x14)
[<b070b560>] (show_stack) from [<b0c5cd44>] (dump_stack+0x90/0xa4)
[<b0c5cd44>] (dump_stack) from [<b07229b8>] (__warn+0xfc/0x114)
[<b07229b8>] (__warn) from [<b0722ae4>] (warn_slowpath_null+0x40/0x48)
[<b0722ae4>] (warn_slowpath_null) from [<b07145ec>] (__arm_ioremap_pfn_caller+0x7c/0x1b4)
[<b07145ec>] (__arm_ioremap_pfn_caller) from [<b0714770>] (__arm_ioremap_caller+0x4c/0x54)
[<b0714770>] (__arm_ioremap_caller) from [<b0b5a7d0>] (sip_smc_request_share_mem+0x54/0x7c)
Change-Id: I51dd47ed9dc7210fd3192b0c970c31e10d79c0a6
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
This patch is used to support vendor storage for SPI NAND
and SLC NAND via mtd interface.
Change-Id: I6f011cb9052a014845629e103976b36adb5fa589
Signed-off-by: Yifeng Zhao <zyf@rock-chips.com>
Some CPUs can speculate past an ERET instruction and potentially perform
speculative accesses to memory before processing the exception return.
Since the register state is often controlled by a lower privilege level
at the point of an ERET, this could potentially be used as part of a
side-channel attack.
This patch emits an SB sequence after each ERET so that speculation is
held up on exception return.
Change-Id: I8bdcc2d9ff9d4d344c0e7a4aad809fbca52db116
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
(cherry picked from commit 679db70801)
drivers/media/platform/rockchip/cif/dev.c:290:93: warning: operator '?:' has lower precedence than '|'; '|' will be evaluated first [-Wbitwise-conditional-parentheses]
(dev->chip_id != CHIP_RK1808_CIF && dev->chip_id != CHIP_RV1126_CIF) | (id == pad - 1) ?
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ^
drivers/media/platform/rockchip/cif/dev.c:290:93: note: place parentheses around the '|' expression to silence this warning
(dev->chip_id != CHIP_RK1808_CIF && dev->chip_id != CHIP_RV1126_CIF) | (id == pad - 1) ?
^
( )
drivers/media/platform/rockchip/cif/dev.c:290:93: note: place parentheses around the '?:' expression to evaluate it first
(dev->chip_id != CHIP_RK1808_CIF && dev->chip_id != CHIP_RV1126_CIF) | (id == pad - 1) ?
^
(
Change-Id: I7ed9acf76afeed128ccfa70f94b81e143c08e327
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
CMA alloc may failure due to page busy caused by isolated failure,
it's helpful to dump page owner stack for debug.
To use this debug, there should enable PAGE_OWNER debug first by
- CONFIG_PAGE_OWNER=y
- add “page_owner=on” to boot cmdline
then it will shows as following:
page allocated via order 0, migratetype Movable, gfp_mask 0x6212ca(GFP_HIGHUSER_MOVABLE|__GFP_NOWARN|__GFP_NORETRY)
get_page_from_freelist+0x1404/0x1920
__alloc_pages_nodemask+0xf4/0xe90
__do_page_cache_readahead+0x104/0x1f0
filemap_fault+0x3d4/0x618
ext4_filemap_fault+0x30/0x50
__do_fault+0x50/0x118
__handle_mm_fault+0x7e4/0xb40
handle_mm_fault+0xcc/0x1a0
do_page_fault+0x1f0/0x4a8
do_translation_fault+0x5c/0x64
do_mem_abort+0x54/0xf8
el0_da+0x1c/0x20
Change-Id: I94b02a7c4ce9174f8151e0979e18adba4011c1d2
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Phy internal registers is read by APB bus. If you get phy registers
and APB data at the same time, you will get wrong data which is the
previous value of register. Therefore, pready_cnt must be set bigger
than rden_cnt.
Change-Id: I2e7e5544077170466bdaabc2f7d61f67a06b3283
Signed-off-by: Jianing Ren <jianing.ren@rock-chips.com>
