Some vendor drivers rely on flow control by toggling
enable/disable virtual irq if using legacy interrupt.
It can certainly change the behaviour by function
drivers, but adding corresponding operations would make
RC driver more flexible.
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Change-Id: Idf3e6a0ca9c4ebde369745713a88db53e3f72ea5
The utmi clk is provided by the USB PHY for the USB controller.
And the utmi clk is disabled if the USB PHY enter suspend mode.
The current charge detection sets the USB PHY in suspend mode
at first, then take about hundreds of milliseconds to do charge
detection, in other words, the utmi clk will be disabled hundreds
of milliseconds. It may cause the USB controller work abnormally
during the charge detection.
Actually, the conditions for charger detection is:
1. Set the utmi_opmode in non-driving mode.
2. Set the utmi_xcvrselect to FS speed.
3. Set the utmi_termselect to FS speed.
4. Enable the DP/DM pulldown resistor.
This patch adds a new chg_mode to set the PHY in charge detection
mode according to the above conditions, and set the PHY in normal
mode to keep the utmi clk at the same time.
Signed-off-by: William Wu <william.wu@rock-chips.com>
Change-Id: I1cbf565d5145bdae5bc91132bc5fbff23a5cc443
For Husb311, ET7303 and other PD chips, the tcpm framework is used.
In order not to modify the usb controller, usb3.0 phy and DP
driver, the extcon notify mechanism is added.
Change-Id: I02552d5a2d1d2491ff9a647ca1a85e75e295ebd2
Signed-off-by: Wang Jie <dave.wang@rock-chips.com>
We should avoid rolling the phases if 270 and 0 is both
fine in tuning. Otherwise it would chose a middle phase
laid later than 270 which isn't a good.
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Fixes: 8d0e882790 ("mmc: dw_mmc-rockchip: Skip all phases bigger than 270 degrees")
Change-Id: I87bd3e957623d6a5fdf38226be65564e353b01b6
slot's clock is cached before calling ->set_ios for sub-driver.
If the clock is updated by sub-driver, it's better to restore
the cached slot's clock. Or we can see a unexpected clock as the
driver didn't know the slot's clock is updated and still use the
old clock to calculate divider. So we may see a lower clock. It
theory, it's won't be a problem because any rate lower than 400k
should be fine, and we even didn't start issuing any command during
the lower clock. But still it's right to update slot's clock to reflect
the correct clock and may fix some potential unknown problems.
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Change-Id: I06581320547bb06c306da57e141d06f9206ea585
The swiotlb limit the log of the size of each IO TLB slab by
IO_TLB_SHIFT, and limit the Maximum allowable number of contiguous slabs
to map by IO_TLB_SEGSIZE.
Since memory from rockchip gem maybe accessed by some processor only
with 32 bit address, so the gem should limit the sg size according to
the swiotlb limit.
The swiotlb limit single tlb size to IO_TLB_SEGSIZE * (1 << IO_TLB_SHIFT)
Change-Id: Ifa18068ea30e0f9277521d4efa8a55fdce5dd264
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
This reverts commit debf378724.
The patch a82c7abdf8 ("usb: dwc2: hcd: Fix host channel halt flow")
can fix the issue.
Change-Id: I9a014c42cf942cab22480b5faab13c802e7fd47e
Signed-off-by: William Wu <william.wu@rock-chips.com>
The parameters g_dma and g_dma_desc is used for gadget,
so let's use host_dma and dma_desc_enable instead of them.
And it needs to update the chan->halt_status for non-split
periodic channels rather than return immediately, otherwise,
the software will not release the channel when the channel
halt interrupt is triggered next time.
In addition, it only needs to wait for the core generates
a channel halted if halt_status is DWC2_HC_XFER_URB_DEQUEUE.
Fixes: a82c7abdf8 ("usb: dwc2: hcd: Fix host channel halt flow")
Change-Id: I455444af020ff751406295f21133ff6a950c04dd
Signed-off-by: William Wu <william.wu@rock-chips.com>
Signed-off-by: Wang Jie <dave.wang@rock-chips.com>
1.Protect clock and iomux resources used by AMP.
2.Support RK3568 AMP.
Signed-off-by: Steven Liu <steven.liu@rock-chips.com>
Change-Id: If53e893fac916217bfa5618350b1706b742b34e7
Note:
The commit depends on the following commit:
commit 36514da674 ("dma-buf: support to cache dma-buf-attachment")
The attachment and sg_table will be store in dma-buf-cache.
So use dma-buf-cache api instead of dma-buf api to reduce
the actual operation of attach/map.
Signed-off-by: Yandong Lin <yandong.lin@rock-chips.com>
Change-Id: I8b46c8f6a6f69ebe9854858e198d1c312a808a2f
When enable CONFIG_DMABUF_CACHE, the dmabuf attach will be cached by
dma-buf-cache driver.
Change-Id: Icc9c21542c2f0883e74a5b35f82e4d604509bcb3
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
SND_SOC_DAPM_AIF_OUT/SND_SOC_DAPM_AIF_IN must match the dai stream name
Fixes: 3b13f64c6d ("ASoC: es8311: add support es8311 codec driver")
Signed-off-by: XiaoTan Luo <lxt@rock-chips.com>
Change-Id: I2ed044b2ea9e518bb4bd0fa1b578a64495e9723a
It's not enough to reset the internal circuit in phy
with the phy power reset signal when probe. It also
needs to reset the apb of phy, with this patch, we
can fix the usb enumeration error on some rv1126/rv1109
products.
Signed-off-by: William Wu <william.wu@rock-chips.com>
Change-Id: Ib6bb0f0aeca7577ad65041a28ede57ba110b7bc0
Such as Debian SDK need the HDMI connection jack status to monitor the audio devices.
if want to enable jack detection must add this config: "rockchip,jack-det;"
else if want to disable jack detection and than remove "rockchip,jack-det;"
Signed-off-by: XiaoTan Luo <lxt@rock-chips.com>
Change-Id: I4a530987b032c1bc564804f6274cb30b495ea205
v2 tuning has a defect that if invalid space is laid
between 90 and 180, and the PVT might make the invalid
space back and forth. To overcome this weakness, we don't
need to select phase from beginning, and should directly
chose the next one against the last phase selected.
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Change-Id: I0cbeb1dba524c2e23a3719d28b868af3ed49e20b
Per design recommendation, it'd better not try to use any phase
which is bigger than 270. Let's officially follow this.
Change-Id: I8dee3eb648d321cc86e0926844cde528dbb5bd95
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
fix NULL Pointer when isp to reset
[ 4486.719609] __iommu_dma_unmap+0x14/0x7c
[ 4486.719968] iommu_dma_unmap_sg+0x64/0x90
[ 4486.720348] __iommu_unmap_sg_attrs+0x48/0x5c
[ 4486.720745] vb2_dma_sg_dmabuf_ops_detach+0x60/0x80
[ 4486.721192] dma_buf_detach+0x88/0x9c
iommu_detach_device will set domain to null,
and __iommu_dma_unmap using domain but no check.
Change-Id: I3c679565c6a7e67783e1750fc4d028191a9c9fcf
Signed-off-by: Cai YiWei <cyw@rock-chips.com>
nanddump split read_page_raw into two operations, page read and oob read.
So read_oob_raw is necessary for getting the oob data.
Change-Id: I4e85bbdbf8cd3312fa3525f9e674c31ce20024e9
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
Bifrost device driver should be built once CONFIG_MALI_BIFROST is enabled,
not CONFIG_MALI_MIDGARD.
Fixes: 100a5af029 ("MALI: rockchip: upgrade bifrost DDK to g7p1-01bet0, from g6p0-01eac0")
Signed-off-by: Zhen Chen <chenzhen@rock-chips.com>
Change-Id: Idf49dd482576c293081f846891c39523520350a8
There are issues about the field "links" of struct device
by calling pm_runtime_get_sync/pm_runtime_put_sync to
enable/disable iommu, wrap helpers to make things easy.
Change-Id: I03a85dc8c67b902e79b1e86a201b2074e2562d83
Signed-off-by: Simon Xue <xxm@rock-chips.com>
Including modifications under drivers/base/ from the new DDK.
Resolve lots of conflicts.
Change-Id: I69f9ac87d927441d0b92b8dac8b704922aeb6a0a
Signed-off-by: Zhen Chen <chenzhen@rock-chips.com>
Include a new directory include/uapi/gpu/arm/bifrost/,
which includes some header files of bifrost device driver.
In the original part of g6, the path is include/uapi/gpu/arm/midgard/.
I changed the "midgard" to "bifrost", and modified the paths of the header files in .c files.
I resolved some conflicts between modifications form ARM and RK, manually.
In addition, introduce source files of protected_memory_allocator
that might be needed by bifrost_device_driver into build system.
Change-Id: I09d500a0fdbc5da352c81dc4fcfbffb5b7f907f5
Signed-off-by: Zhen Chen <chenzhen@rock-chips.com>
This patch try to fix this issue by caching the dma-buf attachments and
stores the cache list to dtor_data of dma-buf structor. The dma-buf
attach with cache will try to find cached attachment first and return
the valid instance.
This patch also store the deattch operation to dtor of dma-buf structor
by dma_buf_set_destructor.
Change-Id: I4778c3328825f6c04f5d2608994e62fe3478bf1b
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
