This patch depends on addin the chip IDs to bcma done in this commit in
my pending patch series for bcma.
Author: Hauke Mehrtens <hauke@hauke-m.de>
Date: Sun Jun 3 18:17:57 2012 +0200
bcma: add constants for chip ids
Acked-by: Arend van Spriel <arend@broadcom.com>
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
This patch depends on adding the IDs to bcma done in
this commit in my pending patch series for bcma.
Author: Hauke Mehrtens <hauke@hauke-m.de>
Date: Sun Jun 3 18:17:57 2012 +0200
bcma: add constants for chip ids
Acked-by: Arend van Spriel <arend@broadcom.com>
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
The removed workarounds are already performed in bcma_pmu_workarounds()
and bcma_core_chipcommon_init()
This patch depends on the completion of the workarounds in bcma done in
this commit in my pending patch series for bcma.
Author: Hauke Mehrtens <hauke@hauke-m.de>
Date: Mon Jun 4 00:20:26 2012 +0200
bcma: complete workaround for BCMA43224 and BCM4313
Acked-by: Arend van Spriel <arend@broadcom.com>
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
si_pmu_spuravoid_pllupdate() is now replaced by
bcma_pmu_spuravoid_pllupdate() which does the same thing, but supports
more chips.
This function is in my pending patch series for bcma.
Author: Hauke Mehrtens <hauke@hauke-m.de>
Date: Mon Jun 4 01:31:32 2012 +0200
bcma: add bcma_pmu_spuravoid_pllupdate()
Acked-by: Arend van Spriel <arend@broadcom.com>
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
This is already done by bcma_pmu_init() and bcma_pmu_resources_init() in bcma.
Acked-by: Arend van Spriel <arend@broadcom.com>
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
bcma also stores a pointer to the chipcommon core in its struct,
brcmsmac should use it and not search for the core by its own.
Acked-by: Arend van Spriel <arend@broadcom.com>
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Now "struct si_pub pub" does not have to be the first member in struct
si_info any more, if it is the resulting code after compilation should
be the same.
Acked-by: Arend van Spriel <arend@broadcom.com>
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
The BCM4716 is a SoC and does not have a PCI client interface, so this
condition is never true.
Acked-by: Arend van Spriel <arend@broadcom.com>
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Instead of checking if there is a PCIe core on the bus, better check if
hosttype is PCIe.
In the original submission to staging PCIE() checked, if the bustype is
PCI and the buscore is a PCIe core. Now we assume that all cores bcma
supports are PCIe based, so we just have to check if the bustype is PCI.
The old code bcmsmac currently uses searches for a PCIe core on the bus
and if there is one assumes that this is the buscore, which is wrong.
Some SoCs have a PCIe core operating in host mode and this is not the
bus core. The old code also caused a null pointer in
ai_get_buscoretype() and ai_get_buscorerev() if buscore was not set
because there was no PCIe core on the bus.
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Acked-by: Arend van Spriel <arend@broadcom.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
This hardware never became available to normal humans. Leaving this
driver imposes unwelcome maintenance costs for no clear benefit.
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Acked-by: Samuel Ortiz <sameo@linux.intel.com>
Recent change in the core driver to get the maximum voltage
is based on the (n_voltages -1) steps of voltage.
For the tps65910, the (n_voltages -1)th step voltage is
calculated based on the callback function list_voltage.
This function direct maps the datasheet and adjust the
first few steps for initial voltage as per datasheet,
and hence initialize the n_voltages based on datasheet.
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
We should free "chunk" here before returning the error code.
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Luciano Coelho <coelho@ti.com>
Don't use the ht_mode module parameter for determining AP supported
rates. We can rely on channel type, since HT40 won't be enabled if our
HT cap doesn't support it.
Enable MIMO only if there enough antennas, and rely on per-peer rate
limitation to prevent IOPs.
Signed-off-by: Arik Nemtsov <arik@wizery.com>
commit 587cc28 ("wlcore: compare ssid_len before comparing
ssids") introduced a new bug - the ssid length from the
request struct was compared against the ssid length of
another request, instead the one of the cmd.
This might cause the sched scan request to fail
(with -EINVAL) in many cases.
Signed-off-by: Eliad Peller <eliad@wizery.com>
It seems some parties have bad user experience when smaller values
are used. This should have little implications for power consumption,
since traffic is bursty in nature.
Signed-off-by: Arik Nemtsov <arik@wizery.com>
Avoid using the IEEE80211_NUM_BANDS constant for arrays sizes etc, as
this can contain bands unsupported by the driver (e.g. 60Ghz). Use an
internal constant to determine the number of bands.
Signed-off-by: Arik Nemtsov <arik@wizery.com>
If some IO read/write fails while the FW is not loaded, a recovery
will not take place. This means the SDIO_FAILED flag will stay in place
forever and prevent further read/writes.
This can happen if a check for STATE_OFF was forgotten in some routine.
Take this opportunity to rename the flag to IO_FAILED, since we support
other buses as well.
Reported-by: Ido Yariv <ido@wizery.com>
Signed-off-by: Arik Nemtsov <arik@wizery.com>
wlcore needs to wait for certain events for example
for roc complete event. Usually the events are received
from the FW very fast, therefore wlcore can poll with
a short delay and if after a second the event was
not received yet poll with a long (1-5 msec) delay.
This implementation is similar to the sending of
commands to the FW.
Empirically the change reduced the wait for roc event
from ~10-40msec to 100s of usecs.
[replace udelay/msleep with usleep_range - Arik]
Signed-off-by: Yoni Divinsky <yoni.divinsky@ti.com>
Signed-off-by: Arik Nemtsov <arik@wizery.com>
The interrupt line is disabled in op_stop using disable_irq. Since
pending interrupts are synchronized, the mutex has to be released before
disabling the interrupt to avoid a deadlock with the interrupt handler.
In addition, the internal state of the driver is only set to 'off'
after the interrupt is disabled. Otherwise, if an interrupt fires after
the state is set but before the interrupt line is disabled, the
interrupt handler will not be able to acknowledge the interrupt
resulting in an interrupt storm.
The driver's operations might be called during recovery. If these
acquire the mutex after it was released by op_stop, but before the
driver's state is changed, they may queue new work items instead of just
failing. This is especially problematic in the case of scans, in which a
new scan may be scheduled after all scan requests were cancelled.
Signed-off-by: Ido Yariv <ido@wizery.com>
Signed-off-by: Arik Nemtsov <arik@wizery.com>
We have some API changes and new features in the new firmwares that
are not compatible with older drivers. Increase the version of the FW
filenames for wl12xx to 5.
Additionally, remove the duplicate definitions from wlcore_i.h and
remove the MODULE_FIRMWARE macro calls from the SDIO and SPI modules,
since they're irrelevant there.
Signed-off-by: Luciano Coelho <coelho@ti.com>
The driver configures the firmware template for probe requests during
the scan process. If the same template is used for one-shot and sched
scans they will override each other when running scans simultaneously.
This fix works only on firmwares later than X.3.9.2.112 for single
role and X.3.9.2.23 for multi-role.
[Some cleaning-up and renaming of the quirk to something smaller --
Luca.]
Signed-off-by: Yoni Divinsky <yoni.divinsky@ti.com>
Signed-off-by: Luciano Coelho <coelho@ti.com>
If recovery is called when the FW is off, we should clear the recovery
flag. Otherwise we risk booting the driver in permanent pending-recovery
state.
Signed-off-by: Arik Nemtsov <arik@wizery.com>
Signed-off-by: Luciano Coelho <coelho@ti.com>
Don't read the FW panic log or print other debug data when recovery is
intended (i.e. FW type switch). This takes valuable time and can be
confusing to the user.
Signed-off-by: Arik Nemtsov <arik@wizery.com>
Signed-off-by: Luciano Coelho <coelho@ti.com>
This command is buggy (doesn't take the mutex) and unused. Instead, the
"start_recovery" file is used for the same purpose. Remove the code but
keep the command constant to avoid breaking the testmode ABI.
Signed-off-by: Arik Nemtsov <arik@wizery.com>
Signed-off-by: Luciano Coelho <coelho@ti.com>
If a Tx queue is currently stopped because of our Tx watermark flow
control, don't stop it again. This causes a warning to appear.
Signed-off-by: Arik Nemtsov <arik@wizery.com>
Signed-off-by: Luciano Coelho <coelho@ti.com>
Refuse to boot if the FW version is too old. The minimum version is set
per chip, with the option of setting it per PG in the future.
When boot fails because of an old FW, display a helpful message.
Signed-off-by: Arik Nemtsov <arik@wizery.com>
Signed-off-by: Luciano Coelho <coelho@ti.com>
New wl12xx firmware supports scheduled scans also while connected.
Stop blocking sched scan requests when connected and add a quirk to
block in hardware that don't support it (currently wl18xx doesn't).
This requires FW version 6/7.3.10.2.112 for single-role and
6/7.5.6.0.25 for multi-role.
Signed-off-by: Victor Goldenshtein <victorg@ti.com>
Signed-off-by: Luciano Coelho <coelho@ti.com>
When a partition table length is corrupted to be close to 1 << 32, the
check for its length may overflow on 32-bit systems and we will think
the length is valid. Later on the kernel can crash trying to read beyond
end of buffer. Fix the check to avoid possible overflow.
CC: stable@vger.kernel.org
Reported-by: Ben Hutchings <ben@decadent.org.uk>
Signed-off-by: Jan Kara <jack@suse.cz>
From Tony Lindgren <tony@atomide.com>:
This branch contains minimal support for omap5 to boot to a
console without clock framework support. This branch depends
on omap-cleanup-part2-for-v3.6.
* 'devel-omap5' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: Kconfig update to support additional GPIOs in OMAP5
ARM: OMAP5: Add the build support
arm/dts: OMAP5: Add omap5 dts files
ARM: OMAP5: board-generic: Add device tree support
ARM: omap2+: board-generic: clean up the irq data from board file
ARM: OMAP5: Add SMP support
ARM: OMAP5: Add the WakeupGen IP updates
ARM: OMAP5: l3: Add l3 error handler support for omap5
ARM: OMAP5: gpmc: Update gpmc_init()
ARM: OMAP5: timer: Add clocksource, clockevent support
ARM: OMAP5: Add minimal support for OMAP5430 SOC
ARM: OMAP5: id: Add cpu id for ES versions
ARM: OMAP: counter-32k: Select the CR register offset using the IP scheme
ARM: OMAP2+: Move stubbed secure_sram_reserve function to a common.c and call it __weak
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
From Tony Lindgren <tony@atomide.com>:
This branch adds clock data for am33xx. Note that eventually these
will use the common clock framework, but those patches are not quite
ready yet for omaps. This branch depends on omap-cleanup-part2-for-v3.6
branch.
* tag 'omap-devel-am33xx-data-for-v3.6' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: OMAP3+: clock33xx: Add AM33XX clock tree data
ARM: OMAP3+: clock: Move common clksel_rate & clock data to common file
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This patch does the following:
-const int of_get_nand_ecc_mode(struct device_node *np)
+int of_get_nand_ecc_mode(struct device_node *np)
because:
1. it is probably just a typo?
2. it causes warnings like this when people assing the returned
value to an 'int' variable:
include/linux/of_mtd.h:14:18: warning: type qualifiers ignored on functi=
on return type [-Wignored-qualifiers]
Remove also the unnecessary "extern" qualifier to be consistent with other
declarations in this file.
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
From Tony Lindgren <tony@atomide.com>:
This branch contains more clean-up like changes and minor fixes for making
it easier to support new omap SoCs, such as omap5 and am33xx.
This branch has dependencies to earlier clean-up in omap-cleanup-for-v3.6
and omap-devel-dmtimer-for-v3.6 branches, and also depends on the
omap-devel-am33xx-for-v3.6 branch, and are based on a merge of these
branches.
* tag 'omap-cleanup-part2-for-v3.6' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: OMAP: sdrc: Fix the build break for OMAP4 only builds
ARM: OMAP2+: dmtimer: cleanup fclk usage
ARM: OMAP2+: Fix mismerge for omap_hwmod_get_main_clk() API
ARM: OMAP2+: Remove unnecessary ifdef around __omap2_set_globals
ARM: OMAP2+: am33xx: Change cpu_is_am33xx to soc_is_am33xx
ARM: OMAP2+: am33xx: Make am33xx as a separate class
ARM: OMAP2+: Move omap3 dpll ops to dpll3xxx.c
ARM: OMAP2+: All OMAP2PLUS uses omap-device.o target so add one entry
ARM: OMAP: dmtimer: use devm_ API and do some cleanup in probe()
ARM: OMAP2+: hwmod code: add support to set dmadisable in hwmod framework
ARM: OMAP2+: PRM/CM: Move the stubbed prm and cm functions to prcm.c file and make them __weak
ARM: OMAP2+: hwmod: add omap_hwmod_get_main_clk() API
ARM: OMAP3+: dpll: optimize noncore dpll locking logic
ARM: OMAP3: control: add definition for CONTROL_CAMERA_PHY_CTRL
ARM: OMAP2+: powerdomain code: Fix Wake-up power domain power status
ARM: OMAP4: clockdomain/CM code: Update supported transition modes
ARM: OMAP3/4: omap_hwmod: Add rstst_offs field to struct omap_hwmod_omap4_prcm
ARM: OMAP2+: hwmod: Add new sysc_type3 into omap_hwmod required for am33xx
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
From Tony Lindgren <tony@atomide.com>:
Board and platform data related changes for omaps
* tag 'omap-devel-board-for-v3.6' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: OMAP3: Fix omap3evm randconfig error introduced by VBUS support
ARM: OMAP: board-omap4panda: MUX configuration for sys_nirq2
ARM: OMAP: board-4430sdp: MUX configuration for sys_nirq2
ARM: OMAP3530evm: set pendown_state and debounce time for ads7846
ARM: omap3evm: enable VBUS switch for EHCI tranceiver
ARM: OMAP3EVM: Adding USB internal LDOs board file
ARM: OMAP3EVM: Add NAND flash definition
ARM: OMAP3: cm-t35: add tvp5150 decoder support
ARM: OMAP3: cm-t35: add mt9t001 camera sensor support
omap2+: add drm device
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* pci/bjorn-p2p-bridge-windows:
sparc/PCI: replace pci_cfg_fake_ranges() with pci_read_bridge_bases()
PCI: support sizing P2P bridge I/O windows with 1K granularity
PCI: reimplement P2P bridge 1K I/O windows (Intel P64H2)
PCI: allow P2P bridge windows starting at PCI bus address zero
Conflicts:
drivers/pci/probe.c
include/linux/pci.h
The generic code to read P2P bridge windows is functionally equivalent
to the sparc-specific pci_cfg_fake_ranges(), so use the generic code.
The "if (!res->start) res->start = ..." removed from the I/O window code
here was an artifact of the Intel 1K window support from 9d265124d0 and
is no longer necessary (it probably was just cloned from x86 and was never
useful on sparc).
Acked-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
The chip select line was configured as output with the initial value
being active explicitly. It was later deasserted during
spi_bitbang_setup() without any clock activity in between. So it makes
no sense to activate the device at all and the chip select line can
better start non-active.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Use the dmaengine based Tegra APB DMA driver for
data transfer between SPI FIFO and memory in
place of legacy Tegra APB DMA.
The new driver is selected if legacy driver is not
selected and new DMA driver is enabled through config
file.
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
DaVinci fixes for v3.6
Fix an interrupt handling issue with cp_intc which
was causing occasional spurious interrupts with DA850 EVM
* tag 'davinci-v3.6-fixes' of git://gitorious.org/linux-davinci/linux-davinci:
ARM: davinci: da8xx: fix interrupt handling
From Sekhar Nori <nsekhar@ti.com>:
DaVinci SoC updates for v3.6
Add IRQ domain support for cp_intc and
runtime PM core support for DaVinci devices.
* tag 'davinci-v3.6-soc' of git://gitorious.org/linux-davinci/linux-davinci:
ARM: davinci: add runtime PM support for clock management
ARM: davinci: cp_intc: Add irq domain support
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
From: Sekhar Nori <nsekhar@ti.com>
DaVinci cleanups for v3.6
Remove some header files which were marked for removal. These files are
not used anymore.
* tag 'davinci-v3.6-cleanup' of git://gitorious.org/linux-davinci/linux-davinci:
ARM: davinci: remove dummy header files
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
From Tony Lindgren <tony@atomide.com>:
Here is one PM regression fix and a defconfig change to disable
echi-omap because the driver currently causes issues with PM.
This annoys Kevin as it makes it harder for him to validate that
PM is working. The proper fixes for the echi-omap are being
discussed, but looks like it will not be properly working with PM
until in v3.7.
* tag 'omap-fixes-for-v3.5-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: OMAP2+: omap2plus_defconfig: EHCI driver is not stable, disable it
ARM: OMAP2+: hwmod code/clockdomain data: fix 32K sync timer
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
From: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
You'll find in this patch set the nineth version of the initial
support for a new family of ARMv7-compatible Marvell SoCs.
As for the previous releases, both the Armada 370 and the Armada XP
SoCs are supported in this directory, and we are able to build a
single kernel image that boots on both SoCs. Both SoCs use the PJ4B
processor, a Marvell-developed ARM core that implements the ARMv7
instruction set. We are currently using Marvell evaluation boards for
both of those SoCs, and the support for those boards is added in this
patch set.
This patch set, and the support for those SoCs, started as a
collaborative effort from Marvell engineers (who have done the initial
development work) and Free Electrons engineers (who are reshaping the
code for mainline submission, adding device tree support, etc.). This
effort has also received contributions from Ben Dooks from Codethink.
* mvebu/newsoc:
ARM: mvebu: MPIC: read number of interrupts from control register
arm: mach-mvebu: add entry to MAINTAINERS
arm: mach-mvebu: add compilation/configuration change
arm: mach-mvebu: add defconfig
arm: mach-mvebu: add documentation for new device tree bindings
arm: mach-mvebu: add support for Armada 370 and Armada XP with DT
arm: mach-mvebu: add source files
arm: mach-mvebu: add header
clocksource: time-armada-370-xp: Marvell Armada 370/XP SoC timer driver
Changes from Arnd
* Pulled from git://github.com/Marvell-Semi/EBU_mainline_public.git mvebu_for-next-V9
* rebased onto v3.5-rc5 because it was originally based on
an old arm-soc/for-next branch
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
