Commit Graph

1215123 Commits

Author SHA1 Message Date
Bjorn Helgaas
a49287d32d PCI: Remove unnecessary initializations
We always assign "fields" immediately, so remove the unnecessary
initializations.  No functional change intended.

Link: https://lore.kernel.org/r/20230824193712.542167-4-helgaas@kernel.org
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
2023-08-25 08:15:04 -05:00
Bjorn Helgaas
ecfea5dfca PCI: Unexport pcie_port_bus_type
pcie_port_bus_type is used only in pci-driver.c and pcie/portdrv_core.c and
pcie/portdrv_pci.c.  None of these can be built as modules, so
pcie_port_bus_type doesn't need to be exported.  Unexport it.

Link: https://lore.kernel.org/r/20230824193712.542167-3-helgaas@kernel.org
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
2023-08-25 08:14:58 -05:00
Pali Rohár
e8c81fc722 PCI: mvebu: Remove unused busn member
The busn member of struct mvebu_pcie is unused, so drop it.

Link: https://lore.kernel.org/r/20220905192310.22786-5-pali@kernel.org
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Cc: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
2023-08-25 08:14:48 -05:00
Nikita Shubin
db15538ba6 ata: pata_ep93xx: use soc_device_match for UDMA modes
Replace ep93xx_chip_revision() with soc_device_match(), so
ep93xx_chip_revision() can be safetly dropped from exported functions.

Signed-off-by: Nikita Shubin <nikita.shubin@maquefel.me>
Reviewed-by: Sergey Shtylyov <s.shtylyov@omp.ru>
Signed-off-by: Damien Le Moal <dlemoal@kernel.org>
2023-08-25 22:09:43 +09:00
Nikita Shubin
41203f93e2 ata: pata_ep93xx: fix error return code in probe
Return -ENOMEM from ep93xx_pata_probe() if devm_kzalloc() or
ata_host_alloc() fails.

Signed-off-by: Nikita Shubin <nikita.shubin@maquefel.me>
Reviewed-by: Sergey Shtylyov <s.shtylyov@omp.ru>
Signed-off-by: Damien Le Moal <dlemoal@kernel.org>
2023-08-25 22:09:08 +09:00
Balamanikandan Gunasundar
98ac9e4fc0 mmc: atmel-mci: Move card detect gpio polarity quirk to gpiolib
The polarity of the card detection gpio is handled by the "cd-inverted"
property in the device tree. Move this inversion logic to gpiolib to avoid
reading the gpio raw value.

Signed-off-by: Balamanikandan Gunasundar <balamanikandan.gunasundar@microchip.com>
Suggested-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20230825095157.76073-4-balamanikandan.gunasundar@microchip.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2023-08-25 13:40:21 +02:00
Balamanikandan Gunasundar
d2c6d518c2 mmc: atmel-mci: move atmel MCI header file
Move the contents of linux/atmel-mci.h into
drivers/mmc/host/atmel-mci.c as it is only used in one file

Signed-off-by: Balamanikandan Gunasundar <balamanikandan.gunasundar@microchip.com>
Reviewed-by: Ludovic Desroches <ludovic.desroches@microchip.com>
Link: https://lore.kernel.org/r/20230825095157.76073-3-balamanikandan.gunasundar@microchip.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2023-08-25 13:40:21 +02:00
Balamanikandan Gunasundar
ce6e947225 mmc: atmel-mci: Convert to gpio descriptors
Replace the legacy GPIO APIs with gpio descriptor consumer interface.
To maintain backward compatibility, we rely on the "cd-inverted"
property to manage the invertion flag instead of GPIO property.

Signed-off-by: Balamanikandan Gunasundar <balamanikandan.gunasundar@microchip.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20230825095157.76073-2-balamanikandan.gunasundar@microchip.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2023-08-25 13:40:21 +02:00
Will Deacon
e1df272139 Merge branch 'for-next/selftests' into for-next/core
* for-next/selftests: (22 commits)
  kselftest/arm64: Fix hwcaps selftest build
  kselftest/arm64: add jscvt feature to hwcap test
  kselftest/arm64: add pmull feature to hwcap test
  kselftest/arm64: add AES feature check to hwcap test
  kselftest/arm64: add SHA1 and related features to hwcap test
  kselftest/arm64: build BTI tests in output directory
  kselftest/arm64: fix a memleak in zt_regs_run()
  kselftest/arm64: Size sycall-abi buffers for the actual maximum VL
  kselftest/arm64: add lse and lse2 features to hwcap test
  kselftest/arm64: add test item that support to capturing the SIGBUS signal
  kselftest/arm64: add DEF_SIGHANDLER_FUNC() and DEF_INST_RAISE_SIG() helpers
  kselftest/arm64: add crc32 feature to hwcap test
  kselftest/arm64: add float-point feature to hwcap test
  kselftest/arm64: Use the tools/include compiler.h rather than our own
  kselftest/arm64: Use shared OPTIMZER_HIDE_VAR() definiton
  kselftest/arm64: Make the tools/include headers available
  tools include: Add some common function attributes
  tools compiler.h: Add OPTIMIZER_HIDE_VAR()
  kselftest/arm64: Exit streaming mode after collecting signal context
  kselftest/arm64: add RCpc load-acquire to hwcap test
  ...
2023-08-25 12:36:57 +01:00
Will Deacon
f8f62118cb Merge branch 'for-next/perf' into for-next/core
* for-next/perf:
  drivers/perf: hisi: Update HiSilicon PMU maintainers
  arm_pmu: acpi: Add a representative platform device for TRBE
  arm_pmu: acpi: Refactor arm_spe_acpi_register_device()
  hw_breakpoint: fix single-stepping when using bpf_overflow_handler
  perf/imx_ddr: don't enable counter0 if none of 4 counters are used
  perf/imx_ddr: speed up overflow frequency of cycle
  drivers/perf: hisi: Schedule perf session according to locality
  perf/arm-dmc620: Fix dmc620_pmu_irqs_lock/cpu_hotplug_lock circular lock dependency
  perf/smmuv3: Add MODULE_ALIAS for module auto loading
  perf/smmuv3: Enable HiSilicon Erratum 162001900 quirk for HIP08/09
  perf: pmuv3: Remove comments from armv8pmu_[enable|disable]_event()
  perf/arm-cmn: Add CMN-700 r3 support
  perf/arm-cmn: Refactor HN-F event selector macros
  perf/arm-cmn: Remove spurious event aliases
  drivers/perf: Explicitly include correct DT includes
  perf: pmuv3: Add Cortex A520, A715, A720, X3 and X4 PMUs
  dt-bindings: arm: pmu: Add Cortex A520, A715, A720, X3, and X4
  perf/smmuv3: Remove build dependency on ACPI
  perf: xgene_pmu: Convert to devm_platform_ioremap_resource()
  driver/perf: Add identifier sysfs file for Yitian 710 DDR
2023-08-25 12:36:23 +01:00
Will Deacon
7abb3e4ee0 Merge branch 'for-next/mm' into for-next/core
* for-next/mm:
  arm64: fix build warning for ARM64_MEMSTART_SHIFT
  arm64: Remove unsued extern declaration init_mem_pgprot()
  arm64/mm: Set only the PTE_DIRTY bit while preserving the HW dirty state
  arm64/mm: Add pte_rdonly() helper
  arm64/mm: Directly use ID_AA64MMFR2_EL1_VARange_MASK
  arm64/mm: Replace an open coding with ID_AA64MMFR1_EL1_HAFDBS_MASK
2023-08-25 12:36:18 +01:00
Will Deacon
438ddc3c42 Merge branch 'for-next/misc' into for-next/core
* for-next/misc:
  arm64/sysreg: refactor deprecated strncpy
  arm64: sysreg: Generate C compiler warnings on {read,write}_sysreg_s arguments
  arm64: sdei: abort running SDEI handlers during crash
  arm64: Explicitly include correct DT includes
  arm64/Kconfig: Sort the RCpc feature under the ARMv8.3 features menu
  arm64: vdso: remove two .altinstructions related symbols
  arm64/ptrace: Clean up error handling path in sve_set_common()
2023-08-25 12:36:04 +01:00
Will Deacon
d36dccca32 Merge branch 'for-next/errata' into for-next/core
* for-next/errata:
  arm64: errata: Group all Cortex-A510 errata together
2023-08-25 12:35:53 +01:00
Will Deacon
cd07455764 Merge branch 'for-next/entry' into for-next/core
* for-next/entry:
  arm64: syscall: unmask DAIF earlier for SVCs
2023-08-25 12:35:45 +01:00
Will Deacon
0f4f768ffb Merge branch 'for-next/docs' into for-next/core
* for-next/docs:
  Documentation: arm64: Correct SME ZA macros name
2023-08-25 12:35:38 +01:00
Will Deacon
1f5a062df2 Merge branch 'for-next/cpufeature' into for-next/core
* for-next/cpufeature:
  arm64/fpsimd: Only provide the length to cpufeature for xCR registers
  selftests/arm64: add HWCAP2_HBC test
  arm64: add HWCAP for FEAT_HBC (hinted conditional branches)
  arm64/cpufeature: Use ARM64_CPUID_FIELD() to match EVT
2023-08-25 12:35:30 +01:00
Steve Rutherford
ac3f9c9f1b x86/sev: Make enc_dec_hypercall() accept a size instead of npages
enc_dec_hypercall() accepted a page count instead of a size, which
forced its callers to round up. As a result, non-page aligned
vaddrs caused pages to be spuriously marked as decrypted via the
encryption status hypercall, which in turn caused consistent
corruption of pages during live migration. Live migration requires
accurate encryption status information to avoid migrating pages
from the wrong perspective.

Fixes: 064ce6c550 ("mm: x86: Invoke hypercall when page encryption status is changed")
Signed-off-by: Steve Rutherford <srutherford@google.com>
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Reviewed-by: Tom Lendacky <thomas.lendacky@amd.com>
Reviewed-by: Pankaj Gupta <pankaj.gupta@amd.com>
Tested-by: Ben Hillier <bhillier@google.com>
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/r/20230824223731.2055016-1-srutherford@google.com
2023-08-25 13:33:48 +02:00
Liam Beguin
3d0957b07e gpio: pca953x: add support for TCA9538
The TCA9538 is an 8 bit version of the already supported TCA9539.
This chip also has interrupt support.

Signed-off-by: Liam Beguin <liambeguin@gmail.com>
Reviewed-by: Andy Shevchenko <andy@kernel.org>
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
2023-08-25 13:16:54 +02:00
Liam Beguin
1b961a75ab dt-bindings: gpio: pca95xx: document new tca9538 chip
Add a compatible for tca9538.

Signed-off-by: Liam Beguin <liambeguin@gmail.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
[Bartosz: tweaked the commit message]
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
2023-08-25 13:15:02 +02:00
Biju Das
ea05787136 gpio: pca953x: Use i2c_get_match_data()
Replace device_get_match_data() and id lookup for retrieving match data
by i2c_get_match_data().

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
2023-08-25 13:13:23 +02:00
Neil Armstrong
85b9bf9a51 Revert "dt-bindings: crypto: qcom,prng: Add SM8450"
This reverts commit b9296bb412 ("dt-bindings: crypto: qcom,prng: Add SM8450"),
since the RNG HW on the SM8450 SoC is in fact a True Random Number Generator,
a more appropriate compatible should be instead as reported at [1].

[1] https://lore.kernel.org/all/20230818161720.3644424-1-quic_omprsing@quicinc.com/

Suggested-by: Om Prakash Singh <quic_omprsing@quicinc.com>
Suggested-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2023-08-25 19:01:45 +08:00
Yue Haibing
9687daf785 crypto: chelsio - Remove unused declarations
These declarations are not implemented now, remove them.

Signed-off-by: Yue Haibing <yuehaibing@huawei.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2023-08-25 18:46:55 +08:00
Thore Sommer
ef5b52a631 X.509: if signature is unsupported skip validation
When the hash algorithm for the signature is not available the digest size
is 0 and the signature in the certificate is marked as unsupported.

When validating a self-signed certificate, this needs to be checked,
because otherwise trying to validate the signature will fail with an
warning:

Loading compiled-in X.509 certificates
WARNING: CPU: 0 PID: 1 at crypto/rsa-pkcs1pad.c:537 \
pkcs1pad_verify+0x46/0x12c
...
Problem loading in-kernel X.509 certificate (-22)

Signed-off-by: Thore Sommer <public@thson.de>
Cc: stable@vger.kernel.org # v4.7+
Fixes: 6c2dc5ae4a ("X.509: Extract signature digest and make self-signed cert checks earlier")
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2023-08-25 18:46:55 +08:00
Adam Guerin
fab9516f02 crypto: qat - fix crypto capability detection for 4xxx
When extending the capability detection logic for 4xxx devices the
SMx algorithms were accidentally missed.
Enable these SMx capabilities by default for QAT GEN4 devices.

Check for device variants where the SMx algorithms are explicitly
disabled by the GEN4 hardware. This is indicated in fusectl1
register.
Mask out SM3 and SM4 based on a bit specific to those algorithms.
Mask out SM2 if the PKE slice is not present.

Fixes: 4b44d28c71 ("crypto: qat - extend crypto capability detection for 4xxx")
Signed-off-by: Adam Guerin <adam.guerin@intel.com>
Reviewed-by: Giovanni Cabiddu <giovanni.cabiddu@intel.com>
Reviewed-by: Fiona Trahe <fiona.trahe@intel.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2023-08-25 18:46:55 +08:00
Jijie Shao
21b61fe48c drivers/perf: hisi: Update HiSilicon PMU maintainers
Since Guangbin and Shaokun have left HiSilicon and will no longer
maintain the drivers, update the maintainer information and
thanks for their work.

Signed-off-by: Jijie Shao <shaojijie@huawei.com>
Acked-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Acked-by: Yicong Yang <yangyicong@hisilicon.com>
Link: https://lore.kernel.org/r/20230824024135.1291459-1-shaojijie@huawei.com
[will: left the HNS3 title as-is to avoid the churn of resorting the entries]
Signed-off-by: Will Deacon <will@kernel.org>
2023-08-25 11:23:57 +01:00
Kalle Valo
4dddbad890 Merge ath-next from git://git.kernel.org/pub/scm/linux/kernel/git/kvalo/ath.git
ath.git patches for v6.6. No major changes, only smaller fixes and
cleanups this time.
2023-08-25 13:15:26 +03:00
Zhang Zekun
5e536362f6 genpd: ti: Use for_each_node_with_property() simplify code logic
Let's convert to use for_each_node_with_property() to iterate through the
DT nodes, as to simplify the code logic a bit. No intended functional
change.

Signed-off-by: Zhang Zekun <zhangzekun11@huawei.com>
Acked-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2023-08-25 12:04:57 +02:00
Jinjie Ruan
e8afebbf43 wifi: rtlwifi: rtl8723: Remove unused function rtl8723_cmd_send_packet()
The function rtl8723_cmd_send_packet() is not used anywhere, so remove it.

Signed-off-by: Jinjie Ruan <ruanjinjie@huawei.com>
Acked-by: Ping-Ke Shih <pkshih@realtek.com>
Signed-off-by: Kalle Valo <kvalo@kernel.org>
Link: https://lore.kernel.org/r/20230824062339.1885385-1-ruanjinjie@huawei.com
2023-08-25 13:02:58 +03:00
Sascha Hauer
290564367a wifi: rtw88: usb: kill and free rx urbs on probe failure
After rtw_usb_alloc_rx_bufs() has been called rx urbs have been
allocated and must be freed in the error path. After rtw_usb_init_rx()
has been called they are submitted, so they also must be killed.

Add these forgotten steps to the probe error path.

Besides the lost memory this also fixes a problem when the driver
fails to download the firmware in rtw_chip_info_setup(). In this
case it can happen that the completion of the rx urbs handler runs
at a time when we already freed our data structures resulting in
a kernel crash.

Fixes: a82dfd33d1 ("wifi: rtw88: Add common USB chip support")
Cc: stable@vger.kernel.org
Reported-by: Ilgaz Öcal <ilgaz@ilgaz.gen.tr>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Acked-by: Larry Finger <Larry.Finger@lwfinger.net>
Acked-by: Ping-Ke Shih <pkshih@realtek.com>
Signed-off-by: Kalle Valo <kvalo@kernel.org>
Link: https://lore.kernel.org/r/20230823075021.588596-1-s.hauer@pengutronix.de
2023-08-25 13:02:27 +03:00
Nathan Chancellor
78d84f35d2 wifi: rtw89: Fix clang -Wimplicit-fallthrough in rtw89_query_sar()
clang warns (or errors with CONFIG_WERROR=y):

  drivers/net/wireless/realtek/rtw89/sar.c:216:3: error: unannotated fall-through between switch labels [-Werror,-Wimplicit-fallthrough]
    216 |                 case RTW89_TAS_STATE_DPR_FORBID:
        |                 ^
  drivers/net/wireless/realtek/rtw89/sar.c:216:3: note: insert 'break;' to avoid fall-through
    216 |                 case RTW89_TAS_STATE_DPR_FORBID:
        |                 ^
        |                 break;
  1 error generated.

Clang is a little more pedantic than GCC, which does not warn when
falling through to a case that is just break or return. Clang's version
is more in line with the kernel's own stance in deprecated.rst, which
states that all switch/case blocks must end in either break,
fallthrough, continue, goto, or return. Add the missing break to silence
the warning.

Closes: https://github.com/ClangBuiltLinux/linux/issues/1921
Fixes: eb2624f55a ("wifi: rtw89: Introduce Time Averaged SAR (TAS) feature")
Signed-off-by: Nathan Chancellor <nathan@kernel.org>
Reviewed-by: Nick Desaulniers <ndesaulniers@google.com>
Acked-by: Ping-Ke Shih <pkshih@realtek.com>
Signed-off-by: Kalle Valo <kvalo@kernel.org>
Link: https://lore.kernel.org/r/20230822-rtw89-tas-clang-implicit-fallthrough-v1-1-5cb73f0fa976@kernel.org
2023-08-25 13:00:24 +03:00
Cheng-Chieh Hsieh
058b207481 wifi: rtw89: phy: modify register setting of ENV_MNTR, PHYSTS and DIG
The ENV_MNTR(environment monitor) is the dynamic mechanism which based on
the HW of CCX(Cisco Compatible Extensions) which provide the channel
loading and noisy level indicator to debug or support the 802.11k. The
PHYSTS provide the detail PHY information per packet we received for
debugging. The DIG(dynamic initial gain) is the dynamic mechanism to
adjust the packet detect power level by received signal strength to avoid
false detection of the WiFi packet.

The address of registers used for ENV_MNTR, PHYSTS and DIG of WiFi 7 IC
are different with WiFi 6 series, so we modify the method to access the
register address in order to compatible with all WiFi 7 and 6 ICs.

Signed-off-by: Cheng-Chieh Hsieh <cj.hsieh@realtek.com>
Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
Signed-off-by: Kalle Valo <kvalo@kernel.org>
Link: https://lore.kernel.org/r/20230822125822.23817-7-pkshih@realtek.com
2023-08-25 12:59:54 +03:00
Ping-Ke Shih
1165f57192 wifi: rtw89: phy: add phy_gen_def::cr_base to support WiFi 7 chips
cr_base is base address of PHY control register. The base of WiFi 6 and 7
chips are 0x1_0000 and 0x2_0000 respectively, so define them accordingly.
For example, if PHY address is 0x1330, absolute address is 0x1_1330 for
WiFi 6 chips, and 0x2_1330 for WiFi 7 chips.

Meanwhile, there are two copies of PHY hardware named PHY0 and PHY1. The
offset between them is 0x2_0000, so the base address of PHY0 and PHY1 are
0x2_0000 and 0x4_0000 respectively.

Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
Signed-off-by: Kalle Valo <kvalo@kernel.org>
Link: https://lore.kernel.org/r/20230822125822.23817-6-pkshih@realtek.com
2023-08-25 12:59:54 +03:00
Ping-Ke Shih
9d87e7dc93 wifi: rtw89: mac: define register address of rx_filter to generalize code
rx_filter is used to decide which kind of packets are received to driver,
or just dropped by MAC layer to reduce bus traffic.

The bit definitions of old and new chips are the sames, but only address
is changed, so define a field to generalize usage.

Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
Signed-off-by: Kalle Valo <kvalo@kernel.org>
Link: https://lore.kernel.org/r/20230822125822.23817-5-pkshih@realtek.com
2023-08-25 12:59:53 +03:00
Ping-Ke Shih
3a7e4f56eb wifi: rtw89: mac: define internal memory address for WiFi 7 chip
Define base address of WiFi 7 internal memory according to design to
provide the same functions as existing WiFi 6 chips.

Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
Signed-off-by: Kalle Valo <kvalo@kernel.org>
Link: https://lore.kernel.org/r/20230822125822.23817-4-pkshih@realtek.com
2023-08-25 12:59:53 +03:00
Ping-Ke Shih
60168f6c50 wifi: rtw89: mac: generalize code to indirectly access WiFi internal memory
To diagnose abnormal behavior, we need to dump certain internal memory.
For example, dump security CAM when debugging encryption/decryption
problems, or dump BA CAM when debugging abnormal BlockAck.

Since the indirect address and internal memory base address are different
between WiFi 6 and 7 chips, add fields to reuse codes.

Also, only WiFi 6 chips initialize DMAC and CMAC tables via this indirect
interface, so no need to change the constant register address, and
new firmware will help to initialize these tables.

Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
Signed-off-by: Kalle Valo <kvalo@kernel.org>
Link: https://lore.kernel.org/r/20230822125822.23817-3-pkshih@realtek.com
2023-08-25 12:59:53 +03:00
Ping-Ke Shih
c220d08e1f wifi: rtw89: mac: add mac_gen_def::band1_offset to map MAC band1 register address
There are two copies of MAC hardware called band0 and band1. Basically,
the only difference between them is base address, so we can share functions
with a 'band' (or 'mac_idx') argument.

The offset of base address of WiFi 6 and 7 are 0x2000 and 0x4000
respectively, so add band1_offset field to new introduced struct
mac_gen_def to possibly reuse functions.

Using below spatch script to convert callers:

  @@
  expression reg, band;
  @@
  - rtw89_mac_reg_by_idx(reg, band)
  + rtw89_mac_reg_by_idx(rtwdev, reg, band)

  @@
  expression reg, port, band;
  @@
  - rtw89_mac_reg_by_port(reg, port, band)
  + rtw89_mac_reg_by_port(rtwdev, reg, port, band)

Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
Signed-off-by: Kalle Valo <kvalo@kernel.org>
Link: https://lore.kernel.org/r/20230822125822.23817-2-pkshih@realtek.com
2023-08-25 12:59:52 +03:00
Li Zetao
98fdd77d3d wifi: wlcore: sdio: Use module_sdio_driver macro to simplify the code
Use the module_sdio_driver macro to simplify the code, which is the
same as declaring with module_init() and module_exit().

Signed-off-by: Li Zetao <lizetao1@huawei.com>
Signed-off-by: Kalle Valo <kvalo@kernel.org>
Link: https://lore.kernel.org/r/20230821140345.3140493-1-lizetao1@huawei.com
2023-08-25 12:59:31 +03:00
Zong-Zhe Yang
4843aa3768 wifi: rtw89: initialize multi-channel handling
We prepare to deal with multiple channels via new entity modes.
* MCC_PREPARE:	Transitional mode before MCC
* MCC:		Multi-Channel Concurrent mode
And, enum of sub-entity is extended for second channel context.

We add the entry flow of multi-channel handling and the core stuffs
for extended index of sub-entity. And, we now deal with the filling
of entity channels' info in entity recalc where we know the number
of active chanctx. However, the other detail coding of MCC start/stop
will be implemented in the following.

Besides, chanctx listener struct is pre-added in chip info. Each
component can add callback type in chanctx listener and configure
its callback function to react according to chanctx states. We know
at least RFK (RF calibration) and BTC (BT coexistence) will require
such callbacks.

Signed-off-by: Zong-Zhe Yang <kevin_yang@realtek.com>
Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
Signed-off-by: Kalle Valo <kvalo@kernel.org>
Link: https://lore.kernel.org/r/20230816082133.57474-7-pkshih@realtek.com
2023-08-25 12:58:29 +03:00
Zong-Zhe Yang
51383fd777 wifi: rtw89: provide functions to configure NoA for beacon update
Callers call renew function when wanting to generate a new P2P NoA
information element, and call append function to append NoA attribute
one by one. Then, updating beacon work will fetch the P2P NoA information
element configured by callers and add it to beacon.

The use case of MCC (multi-channel concurrent) <GO + STA> for example:
* start MCC - GO part
	renew P2P NoA
	append period NoA after calculation
* download beacon for GO
	fetch P2P NoA and add to beacon content
* stop MCC - GO part
	renew P2P NoA (reset)

Signed-off-by: Zong-Zhe Yang <kevin_yang@realtek.com>
Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
Signed-off-by: Kalle Valo <kvalo@kernel.org>
Link: https://lore.kernel.org/r/20230816082133.57474-6-pkshih@realtek.com
2023-08-25 12:58:29 +03:00
Zong-Zhe Yang
ad3dc72202 wifi: rtw89: call rtw89_chan_get() by vif chanctx if aware of vif
We adjust these processes which can work accodrding to vif but call
rtw89_chan_get() with static RTW89_SUB_ENTITY_0. After multi-channel
support, chanctx of vif won't always be on RTW89_SUB_ENTITY_0. So,
we make them call rtw89_chan_get() with rtwvif->sub_entity_idx.

Signed-off-by: Zong-Zhe Yang <kevin_yang@realtek.com>
Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
Signed-off-by: Kalle Valo <kvalo@kernel.org>
Link: https://lore.kernel.org/r/20230816082133.57474-5-pkshih@realtek.com
2023-08-25 12:58:28 +03:00
Zong-Zhe Yang
bfbadacf37 wifi: rtw89: sar: let caller decide the center frequency to query
If multiple channels, SAR will be hard to determine the center frequency
to query. Therefore, we move this decision out of SAR.

Signed-off-by: Zong-Zhe Yang <kevin_yang@realtek.com>
Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
Signed-off-by: Kalle Valo <kvalo@kernel.org>
Link: https://lore.kernel.org/r/20230816082133.57474-4-pkshih@realtek.com
2023-08-25 12:58:28 +03:00
Zong-Zhe Yang
b05fdc46c5 wifi: rtw89: refine rtw89_correct_cck_chan() by rtw89_hw_to_nl80211_band()
In rtw89_correct_cck_chan(), we turn to use rtw89_hw_to_nl80211_band().
The difference between rtw89_hw_to_nl80211_band() and the original raw
judgement is the case on 6 GHz. Since rtw89_correct_cck_chan() is common
code independent on chip, if runtime chip doesn't support 6 GHz, it is
probably safe. Otherwise, it might not.

Signed-off-by: Zong-Zhe Yang <kevin_yang@realtek.com>
Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
Signed-off-by: Kalle Valo <kvalo@kernel.org>
Link: https://lore.kernel.org/r/20230816082133.57474-3-pkshih@realtek.com
2023-08-25 12:58:28 +03:00
Zong-Zhe Yang
64a24cb63a wifi: rtw89: add function prototype for coex request duration
The request duration comes from coex mechanism, indicating the
length of time that should be reserved for BT in each time division.
It is required to handle update notification when channel concurrency
processes. Since it will involve in both coex and wifi code flow, this
commit ahead adds the prototype for required function interfaces to
split the implementation of coex and wifi in the following.

The follow-up are expected be add afterwards.
1. coex mechanism call rtw89_core_ntfy_btc_event() once bt req len changes
2. channel concurrency flow updates related stuffs when notified

Signed-off-by: Zong-Zhe Yang <kevin_yang@realtek.com>
Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
Signed-off-by: Kalle Valo <kvalo@kernel.org>
Link: https://lore.kernel.org/r/20230816082133.57474-2-pkshih@realtek.com
2023-08-25 12:58:27 +03:00
Wenchao Chen
d83d251bf3 mmc: sdhci-sprd: Add SD HS mode online tuning
First of all, Unisoc's IC provides cmd delay and read delay to ensure
that the host can get the correct data. However, according to SD Spec,
there is no need to do tuning in high speed mode, but with the
development of chip processes, it is more and more difficult to find
a suitable delay to cover all the chips. Therefore, we need SD high
speed mode online tuning.

In addition, we added mmc_sd_switch() and mmc_send_status() to the
header file to allow it to be usable by the driver.

Signed-off-by: Wenchao Chen <wenchao.chen@unisoc.com>
Link: https://lore.kernel.org/r/20230825091743.15613-3-wenchao.chen@unisoc.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2023-08-25 11:58:19 +02:00
Alan Stern
5d7cf67f72 Fix nomenclature for USB and PCI wireless devices
A mouse that uses a USB connection is called a "USB mouse" device (or
"USB mouse" for short), not a "mouse USB" device.  By analogy, a WiFi
adapter that connects to the host computer via USB is a "USB wireless"
device, not a "wireless USB" device.  (The latter term more properly
refers to a defunct Wireless USB specification, which described a
technology for sending USB protocol messages over an ultra wideband
radio link.)

Similarly for a WiFi adapter card that plugs into a PCIe slot: It is a
"PCIe wireless" device, not a "wireless PCIe" device.

Rephrase the text in the kernel source where the word ordering is
wrong.

Signed-off-by: Alan Stern <stern@rowland.harvard.edu>
Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Kalle Valo <kvalo@kernel.org>
Link: https://lore.kernel.org/r/57da7c80-0e48-41b5-8427-884a02648f55@rowland.harvard.edu
2023-08-25 12:56:49 +03:00
David S. Miller
931abcdcad Merge branch 'mlxsw-fixes'
Petr Machata says:

====================
mlxsw: Assorted fixes

This patchset contains several fixes for the mlxsw driver.

Patch #1 - Fixes buffer size in I2C mailbox buffer.
Patch #2 - Sets limitation of chunk size in I2C transaction.
Patch #3 - Fixes module label names based on MTCAP sensor counter
====================

Signed-off-by: David S. Miller <davem@davemloft.net>
2023-08-25 10:53:37 +01:00
Vadim Pasternak
3fc134a074 mlxsw: core_hwmon: Adjust module label names based on MTCAP sensor counter
Transceiver module temperature sensors are indexed after ASIC and
platform sensors. The current label printing method does not take this
into account and simply prints the index of the transceiver module
sensor.

On new systems that have platform sensors this results in incorrect
(shifted) transceiver module labels being printed:

$ sensors
[...]
front panel 002:  +37.0°C  (crit = +70.0°C, emerg = +75.0°C)
front panel 003:  +47.0°C  (crit = +70.0°C, emerg = +75.0°C)
[...]

Fix by taking the sensor count into account. After the fix:

$ sensors
[...]
front panel 001:  +37.0°C  (crit = +70.0°C, emerg = +75.0°C)
front panel 002:  +47.0°C  (crit = +70.0°C, emerg = +75.0°C)
[...]

Fixes: a53779de6a ("mlxsw: core: Add QSFP module temperature label attribute to hwmon")
Signed-off-by: Vadim Pasternak <vadimp@nvidia.com>
Reviewed-by: Ido Schimmel <idosch@nvidia.com>
Signed-off-by: Petr Machata <petrm@nvidia.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2023-08-25 10:53:37 +01:00
Vadim Pasternak
d7248f1cc8 mlxsw: i2c: Limit single transaction buffer size
Maximum size of buffer is obtained from underlying I2C adapter and in
case adapter allows I2C transaction buffer size greater than 100 bytes,
transaction will fail due to firmware limitation.

As a result driver will fail initialization.

Limit the maximum size of transaction buffer by 100 bytes to fit to
firmware.

Remove unnecessary calculation:
max_t(u16, MLXSW_I2C_BLK_DEF, quirk_size).
This condition can not happened.

Fixes: 3029a693be ("mlxsw: i2c: Allow flexible setting of I2C transactions size")
Signed-off-by: Vadim Pasternak <vadimp@nvidia.com>
Reviewed-by: Petr Machata <petrm@nvidia.com>
Signed-off-by: Petr Machata <petrm@nvidia.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2023-08-25 10:53:37 +01:00
Vadim Pasternak
146c7c3305 mlxsw: i2c: Fix chunk size setting in output mailbox buffer
The driver reads commands output from the output mailbox. If the size
of the output mailbox is not a multiple of the transaction /
block size, then the driver will not issue enough read transactions
to read the entire output, which can result in driver initialization
errors.

Fix by determining the number of transactions using DIV_ROUND_UP().

Fixes: 3029a693be ("mlxsw: i2c: Allow flexible setting of I2C transactions size")
Signed-off-by: Vadim Pasternak <vadimp@nvidia.com>
Reviewed-by: Ido Schimmel <idosch@nvidia.com>
Signed-off-by: Petr Machata <petrm@nvidia.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2023-08-25 10:53:37 +01:00
Wenchao Chen
bac806830f mmc: core: Add host specific tuning support for SD HS mode
To support the need for host specific tuning for SD high-speed mode, let's
add two new optional callbacks, ->prepare|execute_sd_hs_tuning() and let's
call them when switching into the SD high-speed mode.

Note that, during the tuning process it's also needed for host drivers to
send commands to the SD card to verify that the tuning process succeeds.
Therefore, let's also share the corresponding functions from the core to
allow this.

Signed-off-by: Wenchao Chen <wenchao.chen@unisoc.com>
Link: https://lore.kernel.org/r/20230825091743.15613-2-wenchao.chen@unisoc.com
[Ulf: Dropped unnecessary function declarations and updated the commit msg]
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2023-08-25 11:45:51 +02:00