Commit Graph

601536 Commits

Author SHA1 Message Date
chenzhen
90fde4bee2 arm: dts: rk3229-echo-v10: enable GPU device
Change-Id: I4336bd134afea2b8ad55ebb104c877548c16b582
Signed-off-by: chenzhen <chenzhen@rock-chips.com>
2017-05-12 11:21:59 +08:00
chenzhen
eacaf9e9fa arm: dts: rk322x: add mali-400 GPU device
Change-Id: I4fb5d27a34e57bb17db2c79ffdc655223ce8c338
Signed-off-by: chenzhen <chenzhen@rock-chips.com>
2017-05-12 11:21:11 +08:00
chenzhen
5b3f63d637 ARM: rockchip_defconfig: enable driver for Mali400 GPU
Change-Id: Idcccf39fc0a5d2d340325e1b3445c8c0d3dcbcc3
Signed-off-by: chenzhen <chenzhen@rock-chips.com>
2017-05-12 11:20:50 +08:00
Finley Xiao
5a0677d99e ARM: dts: rk322x: add 'nvmem-cells' property for opp_table0
This patch adds nvmem-cells property to opp_table0 node so that
cpufreq driver can get cpu leakage value.

Change-Id: Ic39525de46762dfe867ecb86123be6fa7ccad95c
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
2017-05-12 10:15:27 +08:00
Finley Xiao
2aba651b0a ARM: dts: rockchip: add efuse device node for rk322x
Add a efuse node in the device tree for the rk322x SoC.

Change-Id: I9a771c2065bb222b754f5a37b193edd4abb3f3a7
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
2017-05-12 09:21:44 +08:00
zhangjun
66caccf5bc arm64: rockchip_defconfig: enable HDMI_ANALOG
Change-Id: Icae9ce3e01f063c8b6e169b9d386b6eeeed54961
Signed-off-by: zhangjun <zhangjun@rock-chips.com>
2017-05-11 20:10:24 +08:00
zhangjun
8244bcbb09 ASoC: rockchip: add machine driver for built-in hdmi and codec IC
this patch is used for rockchip built-in HDMI and audio codec
IC which are wired to the same i2s line(such as rk3368).
so we use a DAI link CPU to multicodecs.

Change-Id: Ibc5fdeb2091836dc28675aacdc099d76e0b7d752
Signed-off-by: zhangjun <zhangjun@rock-chips.com>
2017-05-11 20:10:19 +08:00
shengfei Xu
95619ffb23 dt-bindings: suspend: rockchip: add PMU_USB_LINESTAE_WAKEUP_EN config for wakeup
Change-Id: I73b992b57344f24eb37b360bc479264996ff72d1
Signed-off-by: shengfei Xu <xsf@rock-chips.com>
2017-05-11 19:34:55 +08:00
Finley Xiao
596289bbd2 PM / devfreq: rockchip_dmc: Fix error handling
It never has the mutex_lock counterpart before goto.

Change-Id: I937e79bc65433cb1c173fe0cb221e7d69586046c
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
2017-05-11 19:29:19 +08:00
shengfei Xu
3ac2e75c72 arm: dts: rk3288-evb: enable rockchip-suspend node
Change-Id: I1bc5f75d3bf49b7f5a532d7dbe7206edc6932c36
Signed-off-by: shengfei Xu <xsf@rock-chips.com>
2017-05-11 19:27:37 +08:00
shengfei Xu
f8e9d466d2 arm: dts: rk3288: add rockchip-suspend node
Change-Id: Id5700548a6034248ed5ad3226dd652d0833eec13
Signed-off-by: shengfei Xu <xsf@rock-chips.com>
2017-05-11 19:27:17 +08:00
shengfei Xu
a791fa845f soc: rockchip: support rk3288 pm config
Change-Id: Icbd23af68bdf7a4fcad59a5d227988a13b2873af
Signed-off-by: shengfei Xu <xsf@rock-chips.com>
2017-05-11 19:27:13 +08:00
Finley Xiao
5258d700a1 nvmem: rockchip-efuse: add support for rk322x-efuse
This adds the necessary data for handling efuse on the rk322x.

Change-Id: Iadd37923f5949a03630a936d5a41b955d443b2d8
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
2017-05-11 19:21:53 +08:00
Finley Xiao
4f60621439 ARM: dts: rk3229: add cpu-supply property for cpu node in evb board
This patch adds the cpu-supply property so that cpu can do dvfs

Change-Id: I6cfc1c8e467652ad9b748c6a9980b00006181910
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
2017-05-11 19:21:36 +08:00
Finley Xiao
abdf89a8e3 ARM: dts: rk3229: add cpu-supply property for cpu node in echo-v1 board
This patch adds the cpu-supply property so that cpu can do dvfs

Change-Id: I5edff7fabd1de23407e8fcb7d70e3b0eeee2ee0e
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
2017-05-11 19:21:22 +08:00
Finley Xiao
ec7eb2f617 ARM: dts: rk3229: add a new cpu opp table
This patch adds some new frequencies for rk3229 boards

Change-Id: Ie35efc3f04350bcfd1eae31a72adfc9166bef781
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
2017-05-11 19:21:10 +08:00
Finley Xiao
7d221db60c ARM: dts: rk322x: add operating-points-v2 property for cpu
This patch adds a new opp table for cpu

Change-Id: I59384ab8ab649ca4672adf64c52f16da76777ce4
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
2017-05-11 19:20:49 +08:00
Finley Xiao
35457db51e clk: rockchip: rk3228: add 1464000000 into cpuclk rate table
This patch adds 1464000000Hz for armclk

Change-Id: I3e4c18acf13036b778f18fe166ae47682a97feeb
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
2017-05-11 19:20:03 +08:00
Mark Yao
5589d1a47e dt-bindings: rockchip: vop: add gamma_table range
Change-Id: Iafbff319d33c9436963572e05911ccfe676a4852
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
2017-05-11 15:55:39 +08:00
Ander Conselvan de Oliveira
398e38d802 FROMLIST: drm: Pass CRTC ID in userspace vblank events
With the atomic API, it is possible that a single commit affects
multiple crtcs. If the user requests an event with that commit, one
event will be sent for each CRTC, but it is not possible to distinguish
which crtc an event is for in user space. To solve this, the reserved
field in struct drm_vblank_event is repurposed to include the crtc_id
which the event is for.

The DRM_CAP_CRTC_IN_VBLANK_EVENT is added to allow userspace to query if
the crtc field will be set properly.

[daniels: Rebased, using Maarten's forward-port.]

Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
Signed-off-by: Daniel Stone <daniels@collabora.com>
Cc: Maarten Lankhorst <maarten.lankhorst@intel.com>
Reviewed-by: Sean Paul <seanpaul@chromium.org>
(am from https://patchwork.kernel.org/patch/9662099/)

Change-Id: Ibe6949782e5df5363d4eaa3e98b3ff413239cf26
Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>
2017-05-11 15:38:50 +08:00
zain wang
e469f94ad8 mfd: fusb302: ignored the timeout if vdm got the message.
The PD spec define the source should ensure that a message requesting
a response is responded within 30ms(tSenderResponse). But if the
message responded is received close to 30ms, we may hit the case:

tcpm_get_message(); //get the data and close to 30ms
	... takes about 600us, meanwhile the 30ms timer came.
auto_vdm_machine
	vdm_send... //we get the message, but timeout.

So, let's ignored the timeout if we get the message.

Change-Id: I64ced1bd2d32d8ef996dcec27cf35c3e333386f8
Signed-off-by: zain wang <wzz@rock-chips.com>
2017-05-11 15:34:17 +08:00
Mark Yao
b0dcb82bd1 arm: dts: rockchip: add gamma table support for rk322x
Change-Id: I9aa8af01bd989ff244153d53c8b9b8ca06d3f834
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
2017-05-11 15:32:43 +08:00
Mark Yao
ab04072538 arm: dts: rockchip: add gamma table support for rk3288
Change-Id: Idb4cd93b8a696925ac56b98c1619999949e6fd84
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
2017-05-11 15:32:29 +08:00
Mark Yao
1134899a90 arm64: dts: rockchip: add gamma table support for rk3368
Change-Id: Ia0390aa0ffe99a2c2b6ba82ecd83610683d49eac
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
2017-05-11 15:31:24 +08:00
Mark Yao
0a0e4a68b8 arm64: dts: rockchip: add gamma table support for rk3399
Rk3399 vopb's gamma table size is 1024, vopl's gamma
table size is 256

Change-Id: Iea9cd70f82dfa9c9c8ae53a24c8153eebb981e7a
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
2017-05-11 15:31:09 +08:00
Mark Yao
4a361fa5d4 drm/rockchip: add support for gamma table
Introduce support for rockchip gamma table,

Rockchip have two version gamma table design:
The old version design was introduced by Dominik Behr's gamma patch
(https://chromium-review.googlesource.com/272209):
 Gamma table has to be uploaded when the LUT is disabled which only takes
 effect at the end of a frame, therefore actual hardware updates is done
 from a worker and can take more than one frame.

In order to solve gamma table switch issues, after rk3399,
H/W add a gamma table update mechanism, can update without lut disable.

And gamma table's size also has two version:
  one is 10 bit per component, 1024 entries,
  the other one is 8 bit per component, 256 entries

Change-Id: I8145d1c42a28d57f11e95d24be2341011360334d
Signed-off-by: Dominik Behr <dbehr@chromium.org>
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
2017-05-11 15:31:04 +08:00
Finley Xiao
0a22588c5e PM / devfreq: rockchip_dmc: avoid waiting for vop line flag indefinitely
It may disable vop_crtc when scaling frequency, in this case,
devfreq thread will wait for vop line flag indefinitely, the
system will crash.

Change-Id: I7043b285c329ff23e2fc9c5b5f3a165c37ef6378
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
2017-05-11 14:47:27 +08:00
Finley Xiao
f0c414b095 drm/rockchip: vop: export rockchip_drm_register_notifier_to_dmc
This function registers a notifier to dmc devfreq, devfreq thread will
lock the mutex of vop when scaling frequency, so vop_crtc will not be
disabled when it is waiting for line flag.

Change-Id: I886e5dc5d36a0f14f35662cec3423a2c5550a7a6
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
2017-05-11 14:47:15 +08:00
Finley Xiao
30d22f86ef drm/rockchip: vop: add vop enable/disable mutex lock
It may disable vop_crtc when waiting for line flag, in this case,
we would not get line flag any more. So the lock should be added
to prevent rockchip_wait_line_flag() from vop_crtc_disable();

Change-Id: I312fd46e64006bf69e3c57f54513230b90866e21
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
2017-05-11 14:47:09 +08:00
zhangyunlong
3df3989b1a camera: rockchip: camsys driver v0.0x21.0xf
add reference count for marvin

Change-Id: Ic410da2524a8972d782ccfdcb121e1727b02e9d8
Signed-off-by: zhangyunlong <dalon.zhang@rock-chips.com>
2017-05-10 19:02:45 +08:00
xcq
c8770955ed camera: rockchip: fix some compiled errors and warn
fix spin_unlock error use and some potential problems.

Change-Id: I860c225f2acb5e28827ad3f6b702b0dc7828bb0f
Signed-off-by: xcq <shawn.xu@rock-chips.com>
2017-05-10 18:33:37 +08:00
Tang Yun ping
3e026659b0 ARM: rockchip_defconfig: default to enable rockchip dmc
Change-Id: Ia52708079d41379d0c530b08d6a3a6bf109ee98c
Signed-off-by: Tang Yun ping <typ@rock-chips.com>
2017-05-10 18:28:13 +08:00
Tang Yun ping
dc114f5754 PM / devfreq: rockchip_dmc: add support for rk3288
This adds the necessary data for handling dmcfreq on the rk3288.

Change-Id: I042222f899d03ec1832ac47b48db8c6c46c3b0d3
Signed-off-by: Tang Yun ping <typ@rock-chips.com>
2017-05-10 18:23:51 +08:00
Tang Yun ping
9eecb17512 PM / devfreq: event: add support for rk3288 dfi
This adds the necessary data for handling dfi on the rk3288.
Access the dfi via registers provided by GRF (general register
files) module.

Change-Id: Ic7241af3c20a269ab362055dea04d260e01c50de
Signed-off-by: Tang Yun ping <typ@rock-chips.com>
2017-05-10 18:22:41 +08:00
Tang Yun ping
764e893ee8 clk: rockchip: support setting ddr clock via SIP Version 2 APIs
1. Add support setting ddr clock via SIP Version 2 APIs
2. RK3288 using SIP Vision 2.

Change-Id: I935e43b1885a96650dc86e3eb6d79de6795062a9
Signed-off-by: Tang Yun ping <typ@rock-chips.com>
2017-05-10 16:17:22 +08:00
Tang Yun ping
40204ab0fd sip: rockchip: fix bus about make kernel failure
When undefine "CONFIG_ROCKCHIP_SIP", define an empty sip function
to avoid make kernel failure.

Change-Id: Id6bcf1cec1c11f09511852e015631d14279ca8bc
Signed-off-by: Tang Yun ping <typ@rock-chips.com>
2017-05-10 16:17:21 +08:00
Mark Yao
c21d27bafc drm: add drm_device_get_by_name support
Change-Id: Ifbd0f403ca2302e9329a16d7b69db5ee056cadf7
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
2017-05-10 15:28:18 +08:00
Huibin Hong
9b6a090325 Revert "fiq debugger: add resume for debug uart"
This reverts commit 0e7d751d6c.

If enable no console suspend, it will do resume when printing log,
which causes problem. Remove resume of kernel, and add resume of
trust firmware or other power management code.

Change-Id: I3e8e704140134a6aad5c0eb2f14fde36fb108ad3
Signed-off-by: Huibin Hong <huibin.hong@rock-chips.com>
2017-05-10 11:59:35 +08:00
Frank Wang
ad972dedbe arm: dts: add vdd_arm and vdd_log regulator for rk3229-evb
Change-Id: I1a0bbee3e5b9a43f2a79285c04497ec598697404
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
2017-05-10 11:28:47 +08:00
Xu Jianqun
4d81e6715c arm64: dts: rk3368-android: revert to use uart2 for debug
Change-Id: I5e6c88e185a2ad39b082ad4b989589cd46ecb874
Signed-off-by: Xu Jianqun <jay.xu@rock-chips.com>
2017-05-10 09:21:04 +08:00
David Wu
b9ca500f21 net: stmmac: The netif_device_attach() should be called after napi_enable()
If the netif_device_attach() is called earlier, the state of dev_queue is
waked, txtimer might be modified, and the txtimer is added at same time.
It might make run_timer_softirq crashed, because the timer is be detached
twice together.

Change-Id: I31dde4e940bddcc36372ca1f4a8313c0389d4e6b
Signed-off-by: David Wu <david.wu@rock-chips.com>
2017-05-09 20:10:19 +08:00
Frank Wang
ddb9616d29 arm: dts: simplified rk3229 board configs.
Move EMMC and UART configs from every board DTS to a DTSI file.

Change-Id: If2fd49b9243b879ae89e172f55903eedfd4f3981
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
2017-05-09 20:06:57 +08:00
Frank Wang
23de1f8c34 arm: dts: add watchdog and uart2 related for rk322x SoC
Add another GPIO sets for UART2 since the old ones are conflict
with SDMMC, also add watchdog support.

Change-Id: Ib0f1472b9a7760e15e1b83e103f65f43e3642643
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
2017-05-09 20:06:35 +08:00
Randy Li
646cd86cb8 ARM: dts: rockchip: remove dev_mode from rk3288
Since there is no combo device at RK3288, no need to
use this property anymore.

Change-Id: I56434161c4167fc048e4956e97b29617367e28f6
Signed-off-by: Randy Li <randy.li@rock-chips.com>
2017-05-09 09:40:30 +08:00
Tang Yun ping
f8c67c5e9b clk: rockchip: rk3288: always enable gpll_ddr for ddrc.
When ddr frequency scanning, need to switch to gpll for saving
times.

Change-Id: Ibb7e4ed1fa4babaf65e1d98c8a0891766cea63de
Signed-off-by: Tang Yun ping <typ@rock-chips.com>
2017-05-08 17:54:43 +08:00
Tang Yun ping
c5ed4570f0 sip: rockchip: add SHARE_PAGE_TYPE_DDR for ddr frequency scanning.
Change-Id: I7b9c81912e15bf2cea6739a051e5f466ba759d77
Signed-off-by: Tang Yun ping <typ@rock-chips.com>
2017-05-08 17:54:38 +08:00
William Wu
81f3ef435d phy: rockchip-inno-usb2: increase otg sm work first schedule time
In rockchip inno usb2 phy driver, we use otg_sm_work to
dynamically manage power consumption for phy otg-port.
If the otg-port works as peripheral mode and doesn't
communicate with usb host, we will suspend phy.

But once suspend phy, the phy no longer has any internal
clock running, include the utmi_clk which supplied for
usb controller. So if we suspend phy before usb controller
init, it will cause usb controller fail to initialize.

Specifically, without this pathch, the observed order is:
 1. unplug usb cable
 2. start system, do dwc2 controller probe
 3. dwc2_lowlevel_hw_enable()
    - phy_init()
     - rockchip_usb2phy_init()
      - schedule otg_sm_work after 2s
        put phy in suspend, and close utmi_clk
 4. dwc2_hsotg_udc_start() - fail to initialize the usb core

Generally, dwc2_hsotg_udc_start() can be called within 5s
after start system on rockchip platform, so we increase the
the first schedule delay time to 6s for otg_sm_work afer usb
controller calls phy_init(), this can make sure that the usb
controller completes initialization before phy enter suspend.

Change-Id: I40a7f6b24620e49a1273cb9c5051d62efb62810d
Signed-off-by: William Wu <william.wu@rock-chips.com>
2017-05-08 17:34:25 +08:00
Xu Jianqun
f111309c6a mailbox: rk3368: fix error setting if mbox_msg is null
Fix the error dump:

[19252.682822] Unable to handle kernel NULL pointer dereference at
virtual address 00000020
[19252.682834] pgd = ffffff800935d000
[19252.682844] [00000020] *pgd=0000000077ffe003, *pud=0000000077ffe003,
*pmd=0000000000000000
[19252.682852] Internal error: Oops: 96000005 [#1] PREEMPT SMP
[19252.682863] Modules linked in: pvrsrvkm(O)
[19252.682872] CPU: 1 PID: 59 Comm: irq/32-ff6b0000 Tainted: G        W
O    4.4.55 #34
[19252.682875] Hardware name: Rockchip rk3368 p9 board (DT)
[19252.682880] task: ffffffc074cf8c40 ti: ffffffc074d04000 task.ti:
ffffffc074d04000
[19252.682894] PC is at mbox_chan_received_data+0xc/0x20
[19252.682901] LR is at rk3368_mbox_isr+0xb0/0xd0

Change-Id: I1873d6a7e7d1390d2c2c44a77c120d1a02614fdc
Signed-off-by: Xu Jianqun <jay.xu@rock-chips.com>
2017-05-08 15:46:26 +08:00
William Wu
e759aa4172 phy: rockchip-inno-usb2: add a delay after phy resume
When resume phy, it need about 1.5 ~ 2ms to wait for
utmi_clk which used for USB controller to become stable.

Change-Id: I319a28069b4b3381f22cc34567226f341e948bd4
Signed-off-by: William Wu <william.wu@rock-chips.com>
2017-05-08 15:45:37 +08:00
Huibin Hong
3639eea28a ARM64: dts: rk3368-android: enable fiq mode
If this patch is used, dedicated trust firmwart is necessary.

Change-Id: I72ca3b1b722c4076f589341e40efcbeeb5a07a58
Signed-off-by: Huibin Hong <huibin.hong@rock-chips.com>
2017-05-08 11:12:33 +08:00