Commit Graph

601588 Commits

Author SHA1 Message Date
chenjh
9decafdc60 power: rk818-charger: add TS2 voltage detect when update input current
rk818's input charge voltage limit function doesn't works well. If software
set input current over than charger's max support value, rk818 may cause
charger over current protect which means disconnecting.
To solve this problem, we need to detect vbus voltage by TS2 pin, if vbus
is upper than 4.4v, we can safely adjust input current step by step from
low to high until meeting the target input current value.

Change-Id: I01d63974f251ad8ef0037158b66f4b85d3928baf
Signed-off-by: chenjh <chenjh@rock-chips.com>
2017-05-19 15:31:03 +08:00
zhangjun
3244d204d4 ASoc: hdmi_codec: fix startup error when multicodecs are used
due to playback and capture will call startup at the same time
when voip call, but hdmi_codec driver only support playback

[   51.134149] hdmi-audio-codec hdmi-audio-codec.6.auto: hdmi_codec_startup()
[   51.134179] hdmi-audio-codec hdmi-audio-codec.6.auto: Only one simultaneous stream supported!
[   51.134197] hdmi-audio-codec hdmi-audio-codec.6.auto: ASoC: can't open codec i2s-hifi: -22
[   51.143250] hdmi-audio-codec hdmi-audio-codec.6.auto: hdmi_codec_startup()
[   51.143277] hdmi-audio-codec hdmi-audio-codec.6.auto: Only one simultaneous stream supported!
[   51.143294] hdmi-audio-codec hdmi-audio-codec.6.auto: ASoC: can't open codec i2s-hifi: -22
[   51.157546] hdmi-audio-codec hdmi-audio-codec.6.auto: hdmi_codec_startup()
[   51.157584] hdmi-audio-codec hdmi-audio-codec.6.auto: Only one simultaneous stream supported!
[   51.157603] hdmi-audio-codec hdmi-audio-codec.6.auto: ASoC: can't open codec i2s-hifi: -22

Change-Id: I970695dbe19f070579aacd044e6a01c44e687a2e
Signed-off-by: zhangjun <zhangjun@rock-chips.com>
2017-05-19 15:29:38 +08:00
XiaoDong Huang
4b04eee7a1 arm64: dts: rk3368: add wakeup-config in rockchip-suspend
Change-Id: Ibf4ba154d59e99332e68ca5451b0045e15fa850d
Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>
2017-05-19 15:19:34 +08:00
zzc
a76c3d58c6 net: wireless: rockchip_wlan: enable GET_CUSTOM_MAC_ENABLE
Change-Id: I544df96a365ab62b12388e5df3c2fcfa23204e32
Signed-off-by: zzc <zzc@rock-chips.com>
2017-05-19 11:51:22 +08:00
zzc
a167eb7925 arm64: rockchip_defconfig: fix softap error
fix error:
05-16 06:42:05.688   347   596 V NatController: runCmd(/system/bin/ip6tables -w -t raw -A natctrl_raw_PREROUTING -i wlan0 -m rpfilter --invert ! -s fe80::/64 -j DROP) res=1
05-16 06:42:05.726   347   596 E NatController: Error setting forward rules
05-16 06:42:05.791   602   622 E TetherInterfaceSM: Exception enabling Nat: java.lang.IllegalStateException: command '53 nat enable wlan0 eth0 1 192.168.43.0/24' failed with '400 53 Nat op
eration failed (No such device)'
05-16 06:42:05.794   347   841 D TetherController: Sending update msg to dnsmasq [update_ifaces|wlan0]
05-16 06:42:05.796   347   596 D TetherController: untetherInterface(wlan0)

Change-Id: Iae2ec50bef0915aecc1b2befb014a87731e61643
Signed-off-by: zzc <zzc@rock-chips.com>
2017-05-19 11:50:43 +08:00
Finley Xiao
be71a7f386 cpufreq: rockchip: fix warning caused by passing invalid cpu id
------------[ cut here ]------------
[  105.026874] WARNING: at drivers/cpufreq.c:290
[  105.026883] Modules linked in: pvrsrvkm(O)
[  105.026900]
[  105.026915] CPU: 0 PID: 1 Comm: init Tainted: G   O    4.4.66 #1875
[  105.026924] Hardware name: Rockchip Sheep board (DT)
[  105.026937] task: ffffffc07b490000 ti: ffffffc07b484000 task.ti:
ffffffc07b484000
[  105.026964] PC is at cpufreq_cpu_get+0x20/0x8c
[  105.026978] LR is at cpufreq_update_policy+0x28/0x130
[  105.026989] pc : [<ffffff80088246bc>] lr : [<ffffff80088273b8>]
pstate: 60400145
[  105.026997] sp : ffffffc07b487a60
[  105.027004] x29: ffffffc07b487a60 x28: ffffffc07b484000
[  105.027017] x27: ffffff8008b82000 x26: 000000000000008e
[  105.027028] x25: 000000000000011d x24: 0000000000000001
[  105.027039] x23: 0000000000000008 x22: 0000000000000008
[  105.027051] x21: ffffff8009166000 x20: ffffff800923cd50
[  105.027063] x19: ffffffc07a71c600 x18: 0000000000ffffeb

Change-Id: I45de2f755617a5a5903dc5f15e289f8705ceb80d
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
2017-05-19 11:35:16 +08:00
Jianqun Xu
4dca3e096e i2c: rk3x: fix to dev_warn_ratelimited
In some case, the log will look bad such as:
[   12.393926] rk3x-i2c ff150000.i2c: irq in STATE_IDLE, ipd = 0x51
[[[[[[[[[[[[.[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[

Let's limit the printk:
[  180.446547] rk3x_i2c_irq: 1726030 callbacks suppressed
[  180.446592] rk3x-i2c ff150000.i2c: irq in STATE_IDLE, ipd = 0x51

Change-Id: Ie91163ad3085e5dba127790b50e3beb359510120
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
2017-05-18 16:08:20 +08:00
xiaoyao
ebdc69684b arm64: dts: rockchip: rk3328-evb: add gpio control for vcc_sd
Change-Id: Ib504aa0505bd6bea328c5fdd73d237baddcf17a5
Signed-off-by: xiaoyao <xiaoyao@rock-chips.com>
2017-05-18 15:01:50 +08:00
William Wu
11c997bba7 arm: dts: rk322x-android: enable u2phy1 otg-port
Change-Id: Ib6caa6366704509ca5c708a6bfee0e9fc6d26abe
Signed-off-by: William Wu <william.wu@rock-chips.com>
2017-05-18 11:34:27 +08:00
William Wu
13b2781a0a arm: dts: rockchip: add u2phy1 otg-port node for rk322x SoC
Change-Id: I42efd4227428df38c643c174fb2babcd61064a72
Signed-off-by: William Wu <william.wu@rock-chips.com>
2017-05-18 11:34:14 +08:00
William Wu
060d182bfa phy: rockchip-inno-usb2: add cfgs for phy1 port1 of rk322x SoC
This patch adds port configuration for usb2 phy1 port1 of rk322x
SoC. For the current rockchip inno usb2 phy driver framework, it
can only support usb2 phy which comprises with one otg-port and
one host-port.

However, rk322x SoC usb2 phy1 comprises with two host-ports, so
we use otg id index for phy1 port1 configuration, and make phy1
port1 work the same as otg-port host mode.

Change-Id: Iaa10c2438c6b7b052c7f3830252ba4ebd91ff23f
Signed-off-by: William Wu <william.wu@rock-chips.com>
2017-05-18 11:34:09 +08:00
Huang, Tao
850b23f6ba ARM: rockchip: Add workaround for unknown write of thread_info
We see the cpu of thread_info was changed by unknown reason sometimes,
which cause rq spinlock deadlock while schedule. Until we found the
root cause, we have to add this workaround.

Change-Id: Ib943ccb47a57fe4b267a1da853366363cd7f1f52
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>
2017-05-18 11:33:04 +08:00
Tang Yun ping
7557d060d4 PM / devfreq: rockchip_dmc: add unify params for ddr frequency scanning.
1. add unify params for ddr frequency scanning.
2. add dram side and phy side odt disable frequency configurate
independent.

Change-Id: Ied97dbee8d30a1a6e95d4c252986121092c484d8
Signed-off-by: Tang Yun ping <typ@rock-chips.com>
2017-05-18 11:14:42 +08:00
Tang Yun ping
01d3128f03 clk: rockchip: using unify parameters for ddr frequency scanning.
Change-Id: Ibd3befd3cd674af263402f6984ee6d605eb087c8
Signed-off-by: Tang Yun ping <typ@rock-chips.com>
2017-05-18 11:14:12 +08:00
Finley Xiao
43310d2dde cpufreq: rockchip: limit frequency when reboot
If i2c driver adds a shutdown callback function, the callback will be
executed before cpu's shutdown callback when reboot system, it will
fail to scale voltage like the following.
rk3x-i2c ff650000.i2c: Access denied - device already shutdown
rk3x-i2c ff650000.i2c: Access denied - device already shutdown
rk3x-i2c ff650000.i2c: Access denied - device already shutdown
rk3x-i2c ff650000.i2c: Access denied - device already shutdown
cpu cpu4: _set_opp_voltage: failed to set voltage
(950000 950000 1350000 mV):-5

So add a reboot notifier to limit frequency before i2c's shutdown callback,
and the cpu's shutdown callback will do nothing.

Change-Id: Ic5bb21b511c6f799dc62fd9db237d90522b7d4ee
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
2017-05-18 09:22:27 +08:00
Zhangbin Tong
cdcf4ffeab net: stmmac: dwmac-rk: read mac address from devinfo first
Change-Id: I2888dcfc57c2e5a266fdf1058f9ab70e04034f22
Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>
2017-05-18 09:19:30 +08:00
Finley Xiao
d3820440cf cpufreq: rockchip: optimize rockchip_cpufreq_driver_init()
Actually there is no need to use two loops.

Change-Id: Ieafdc265307e21fc7195f3d80b42483a2d53d413
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
2017-05-18 09:18:21 +08:00
Zorro Liu
203b38397e ARM64: dts: rockchip: modify battery sample register value of rk3368-p9 according to hardware board
Change-Id: I50fc124f06b8c2b5af20d5e44a93f68d28d748a0
Signed-off-by: Zorro Liu <lyx@rock-chips.com>
2017-05-17 15:25:53 +08:00
Zhangbin Tong
11c9d7aa2f ARM64: dts: rk3399: android: add compatible for stb_devinfo node
Change-Id: Ib45c5ff21f884fba12e39be63740f90bfc4bbc27
Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>
2017-05-17 11:47:45 +08:00
Finley Xiao
2d299c096e PM / devfreq: rockchip_dmc: Avoid glitches due to slow CPU
We weren't giving enough time for DMC to change frequencies
when the CPU was running slow.

Change-Id: I84e1a4ad7b5ccddafb0016f3d5d6eef147a58591
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
2017-05-17 11:45:45 +08:00
Finley Xiao
08e0c3fbe7 PM / devfreq: Lock CPU online/offline in rockchip_dmcfreq_target()
To protect against races with concurrent CPU online/offline, call
get_online_cpus() before change frequency.

Change-Id: I5b97cd7eff6a1c4828ab30bc165fb2aa8b460bb3
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
2017-05-17 11:45:40 +08:00
wlq
f7770d6f9f arm64: dts: rk3368: p9: set mipi_dsi_host delay 200ms
Change-Id: Ibed9c624072f590ed2aeee8529e133a505624e8d
Signed-off-by: Wu Liangqing <wlq@rock-chips.com>
2017-05-17 09:11:39 +08:00
Xu Jianqun
62c8548527 arm64: dts: rk3368-sheep: add rk818 battery node
Change-Id: I7e0f0ea93a2019ea022c9fe8e72f412af0ec6be9
Signed-off-by: Xu Jianqun <jay.xu@rock-chips.com>
2017-05-16 19:33:25 +08:00
Rocky Hao
d45dae1a3a arm: dts: rk322x-android: update shut mode and enable this module
gpio is not connected by default and we suggest cru mode as the default
shut mode.

Change-Id: I74593092b145e51e5f5b52ab028e650b7fe67f5e
Signed-off-by: Rocky Hao <rocky.hao@rock-chips.com>
2017-05-16 18:35:17 +08:00
Rocky Hao
27e21f7945 arm: dts: rockchip: rk322x: update tsadc's frequence setting
update freq of tsadc's working clock as 32768 hz, if not set, tsadc
will work at a default frequence.

Change-Id: I04f3ee230819af1fce44518b5cbee7700c4d67fd
Signed-off-by: Rocky Hao <rocky.hao@rock-chips.com>
2017-05-16 18:34:59 +08:00
Zorro Liu
00259d4643 drivers: inv_mpu: remove no use debug
Change-Id: Ife1fae1323e2ed262a2f7063e5bb313cb304033f
Signed-off-by: Zorro Liu <lyx@rock-chips.com>
2017-05-16 18:34:02 +08:00
Daniel Vetter
40c9d1c263 UPSTREAM: dma-buf: Add ioctls to allow userspace to flush
The userspace might need some sort of cache coherency management e.g. when CPU
and GPU domains are being accessed through dma-buf at the same time. To
circumvent this problem there are begin/end coherency markers, that forward
directly to existing dma-buf device drivers vfunc hooks. Userspace can make use
of those markers through the DMA_BUF_IOCTL_SYNC ioctl. The sequence would be
used like following:
     - mmap dma-buf fd
     - for each drawing/upload cycle in CPU 1. SYNC_START ioctl, 2. read/write
       to mmap area 3. SYNC_END ioctl. This can be repeated as often as you
       want (with the new data being consumed by the GPU or say scanout device)
     - munmap once you don't need the buffer any more

BackPort:
  upstream kernel change dma-buf api with the commit(831e9da
  dma-buf: Remove range-based flush), avoid effect too much to
  current kernel, Just compatible dma-buf api to current version.

v2 (Tiago): Fix header file type names (u64 -> __u64)
v3 (Tiago): Add documentation. Use enum dma_buf_sync_flags to the begin/end
dma-buf functions. Check for overflows in start/length.
v4 (Tiago): use 2d regions for sync.
v5 (Tiago): forget about 2d regions (v4); use _IOW in DMA_BUF_IOCTL_SYNC and
remove range information from struct dma_buf_sync.
v6 (Tiago): use __u64 structured padded flags instead enum. Adjust
documentation about the recommendation on using sync ioctls.
v7 (Tiago): Alex' nit on flags definition and being even more wording in the
doc about sync usage.
v9 (Tiago): remove useless is_dma_buf_file check. Fix sync.flags conditionals
and its mask order check. Add <linux/types.h> include in dma-buf.h.

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: David Herrmann <dh.herrmann@gmail.com>
Cc: Sumit Semwal <sumit.semwal@linaro.org>
Reviewed-by: Stéphane Marchesin <marcheu@chromium.org>
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
Signed-off-by: Tiago Vignatti <tiago.vignatti@intel.com>
Reviewed-by: David Herrmann <dh.herrmann@gmail.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1455228291-29640-1-git-send-email-tiago.vignatti@intel.com
(cherry picked from commit c11e391da2)

Change-Id: I92916babe7fb0ab3bf3ce9dc966408f2e05fe83d
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
2017-05-16 18:33:15 +08:00
Elaine Zhang
38a48567ae rockchip: clk: rk3368: remove the flag ROCKCHIP_PLL_SYNC_RATE for CPLL
to slove the display shaking, when uboot logo display to kernel show.

Change-Id: I5856581fabd0171be09993878ffb4ef1af0fb204
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
2017-05-16 15:39:37 +08:00
chenjh
29e959968f firmware: rockchip: use 'nsec_ctx->und_lr' to deliver fiq break point's PC
'nsec_ctx->mon_lr' is not the fiq break point's PC, because it will
be override as 'sip_fiq_debugger_uart_irq_tf_cb' for optee-os to
jump to fiq_debugger handler. As 'nsec_ctx->und_lr' is not used for
kernel, optee-os uses it to deliver fiq break point's PC.

Change-Id: I5a831638e8228766d03d92674e3e29facdd116f8
Signed-off-by: chenjh <chenjh@rock-chips.com>
2017-05-16 09:27:25 +08:00
Elaine Zhang
3ea271934d arm64: dts: rockchip: rk3328-evb: add clk dts node for rk805
Change-Id: I30f061a8325d7207133bfd0ab7d82b79664262cf
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
2017-05-16 09:23:09 +08:00
Elaine Zhang
c6049d3c44 arm: dts: rk3229-echo-v10: add clk dts node for rk805
Change-Id: Idff25c5e311f282c67f8dbabbd104019f19bbb6a
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
2017-05-16 09:22:57 +08:00
Elaine Zhang
356a1db8fe mfd: rk808: add rk808-clkout mfd cell for rk805
support rk805 two clk output,xin32k and rk805-clkout2.

Change-Id: If4f820f53feaf6ab2804f4acd0cce925667b7bc0
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
2017-05-16 09:22:49 +08:00
Huang, Tao
95bc3a8935 Revert "arm64: rockchip_defconfig: enable CONFIG_IKCONFIG"
This reverts commit 28f4152aad.

For pass Android 7.1 CTS:
android.security.cts.KernelSettingsTest#testNoConfigGz

Change-Id: I9bd7d4c6c06b7d43fa51a7f02eecca8cedc61c1d
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>
2017-05-15 16:11:44 +08:00
Huang, Tao
cbd1d90f72 Revert "ARM: rockchip_defconfig: enable CONFIG_IKCONFIG"
This reverts commit b90c069d1e.

For pass Android 7.1 CTS:
android.security.cts.KernelSettingsTest#testNoConfigGz

Change-Id: Ia45a95bbb9aafaf0b38b7bd4647f20878403eaae
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>
2017-05-15 16:03:41 +08:00
Xu Jianqun
c95e3c2086 arm: dts: rk3288: add dts for rk3288 evb with act8846 and edp
Change-Id: I861ebd4f6fbe04809f1d450d1a6fd139125c9f67
Signed-off-by: Xu Jianqun <jay.xu@rock-chips.com>
2017-05-15 14:13:47 +08:00
buluess.li
7308df8748 arm64: dts: rk3399-android-6.0: use ion for iep
Change-Id: If3dd5da95abb462ac15d56de26aaeff1b95f5a65
Signed-off-by: buluess.li <buluess.li@rock-chips.com>
2017-05-15 10:07:05 +08:00
Frank Wang
0e021c2e79 arm: dts: add gpio power-key support for rk322x SoC
Change-Id: I45d6e0ffe5444b26165324048c0e88d6fca19bab
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
2017-05-15 10:06:27 +08:00
Zorro Liu
8d76d2ae34 ARM64: dts: rockchip: reduce cma size of rk3368-android
Change-Id: I33407879b63acfaf6da994a5c99633b3e2ad388b
Signed-off-by: Zorro Liu <lyx@rock-chips.com>
2017-05-15 10:04:49 +08:00
Zhangbin Tong
f19114808f soc: rockchip: add devinfo parser driver
Change-Id: I8e16d5ee8a1456de43e46e68bee60e7fb2a7b266
Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>
2017-05-12 19:30:26 +08:00
Zhangbin Tong
703fbaa923 ARM64: dts: rk3399: android: add memory reserved for deviceinfo
Change-Id: Iff4cdc07f1a79d832af85dc23ed1001002fe2e6a
Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>
2017-05-12 19:30:12 +08:00
Sugar Zhang
efca938da2 ARM: dts: rk322x: fix i2s1 pinctrl error
Change-Id: I29fa27ea159b86d3cdfbaf6d9c620e53bc52afd9
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
2017-05-12 19:29:39 +08:00
Sugar Zhang
f35cb4ad31 ARM: dts: rk322x: add spdif node
Change-Id: Id8ccff720d3e42e0df8fa8fd5007127fa9af2147
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
2017-05-12 19:29:26 +08:00
Sugar Zhang
8103ff1c22 ASoC: rockchip: add support for rk3228 spdif
Change-Id: I3f0ae976ef055086f48c2b95b5e45a9eac7487ad
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
2017-05-12 19:29:20 +08:00
Mark Yao
624a79f144 drm/rockchip: vop: add line_flag 0/1 for ddr freq change
Change-Id: Icae9fe3d3600a478f68220545c17b393b4aff1ec
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
2017-05-12 19:28:51 +08:00
zain wang
7cf052ec4d mfd: fusb302: Don't mistake meaningful packets for Good_CRC
If a partner port sends a packet at approximately the same time as we
send a packet, we may end up with the initial packet followed by the
GOOD_CRC reply in our HW FIFO. Don't automatically discard the first
packet in the FIFO. Instead, discard the packet only if it's a GOOD_CRC
packet. And, modify our get_message function to automatically discard
GOOD_CRC in search of a meaningful packet.

In addition, due to interrupt latency, we can't rely on receiving one
interrupt per incoming packet. If our Rx FIFO is non-empty, assume that
it contains at least one packet.

Change-Id: Iaad80a4c55eea3e9e2791d81d7c5d28ce97bd2f5
Signed-off-by: zain wang <wzz@rock-chips.com>
2017-05-12 18:20:03 +08:00
Huang Jiachai
cc7d3ea78f ARM64: dts: rk3368: add rk3368-sheep-lvds.dts for sheep board
Change-Id: Iaf65b8c8f928397e1a3641a7521ee2efed230d31
Signed-off-by: Huang Jiachai <hjc@rock-chips.com>
2017-05-12 17:05:44 +08:00
Frank Wang
31988f1cb9 arm: rockchip_defconfig: enable CONFIG_KEYBOARD_GPIO
This adds enable CONFIG_KEYBOARD_GPIO to support gpio-keys driver.

Change-Id: Ib2e127a3d017ad69b1bf6c0b0a795d0bce44af0e
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
2017-05-12 15:53:42 +08:00
Mark Yao
73766c5da7 drm/rockchip: vop: correct rk322x vop define
Change-Id: If4c3b2e54f3621f7b1120401d9a049d780aa9b4f
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
2017-05-12 15:52:57 +08:00
David Wu
c6c5035f57 arm: dts: rk322x: Add io-domain support for rk3229-evb and rk3229-echo-v10
The power domain of VCCIO3 is selected from maskrom,
so we don't need to configure it.

Change-Id: I11f87fe6f178943daa5ec9dcc22f4f505fe58163
Signed-off-by: David Wu <david.wu@rock-chips.com>
2017-05-12 14:23:23 +08:00
David Wu
0e45b77f43 arm: dts: rk322x: Add io-domain node
Change-Id: I1707bc7e4ed166b1aee14d69c7e25a57ab535d83
Signed-off-by: David Wu <david.wu@rock-chips.com>
2017-05-12 14:22:29 +08:00