Serial Flash controller is used to control the data
transfer between this SoC and a serial nor or nand
flash device.
Change-Id: Ibe7c8c4a11410287c34c1a7dc5b232b330ee6751
Signed-off-by: Randy Li <randy.li@rock-chips.com>
1.Modify the incompatibility of FTL in kernel 4.4;
2.Add arm v7 sftl lib and arm v8 sftl lib
3.Unified naming format and variable with code in u-boot
Change-Id: I43ec418bb278fc3590fcb73d50ae6f6c9281ecfa
Signed-off-by: Dingqiang Lin <jon.lin@rock-chips.com>
This patch limit the channel min/max according channel mapping.
Change-Id: Ia66c276e41d1c6b6f8c78c1c8db3c9087b8c9ca8
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
If the CONFIG_USB_CONFIGFS is not define, the 'audio_source_bind_config'
may be unused. Corrcet warning of no previous prototype for
'audio_source_bind_config' by adding judgment of CONFIG_USB_CONFIGFS
macro definition.
Change-Id: I174ae996c1d53e78b76f72cf463bc1efb189675b
Signed-off-by: Meng Dongyang <daniel.meng@rock-chips.com>
The sending process may still work if disconnect from
PC, for the sending function is called in the complete
call back function. So set alt to 0 when disconnect or
reset, and stop follow-up sending in complete function
if alt is 0.
Change-Id: I073f122fe2ce2faf8cf6fb036fb983f9f3325f34
Signed-off-by: Meng Dongyang <daniel.meng@rock-chips.com>
This patch add support of 2 channel of uac, set min
channel number and max channel number to 2.
Change-Id: Ia3b45d3329ba6819339079b31ff42398464942b5
Signed-off-by: Meng Dongyang <daniel.meng@rock-chips.com>
Add sample rate to attribute of uevent when receive the command
of set interface.
Change-Id: I9cea17ebe57441209a99dec0b1dc279e274accc3
Signed-off-by: Meng Dongyang <daniel.meng@rock-chips.com>
Accordding to the "Universal Serial Bus Device Class Definition
for Audio Devices", there are some error in the f_audio_source
driver. The audio source can't be recognize by the Windows PC
if control unit is not support. In order to support Windows PC,
this patch fix error in f_audio_source driver and add support of
control unit.
Change-Id: Ie508141f032adecfbe2e951ad36d9b8c271b28ba
Signed-off-by: Meng Dongyang <daniel.meng@rock-chips.com>
The sample rate is force to 44100 in current code. This
code add numbers of sample rate up to 15 and support
set or get by PC.
Change-Id: I543d84f3081f82a4c96071c2b2442d37a9a835fb
Signed-off-by: Meng Dongyang <daniel.meng@rock-chips.com>
Add uevent of setting interface to notify the application.
In some cases that the application want to get the change event
and state of alt immediately when to select the next operation,
but current code doesn't have the interface for it. So this patch
sent a uevent when setting interface and report the state of alt
throw attribute of uevent.
Change-Id: I47084f99bc046dede86d6b5777677f3799056c03
Signed-off-by: Meng Dongyang <daniel.meng@rock-chips.com>
The midgard for linux is used for mali r9 library, which is not
used and update anymore.
Change-Id: I446c9b223b5235b40eb28cd8001d318578b16ba2
Signed-off-by: Randy Li <randy.li@rock-chips.com>
It seems Cortex-A12/A17 do not report report watchpoint hit address
that matches the watchpoint set as ARM64. Add this workaround for
pass Android 8+ CTS bionic ptrace watchpoint_imprecise.
Change-Id: I22f08a081d1436931cbed4e8b340237799299737
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
* support vad preprocess
* support buffer-time config
* support channel map
* support data convert
Change-Id: I0728838b3bb2c8a0537560483cab1fb3dd8a4d9c
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
We don't need to set gains when enable/disable ADC
and DAC, keep gains at last time.
And add hpout fade-in when enable DAC, and clean up
a bit of coding style for gains.
Change-Id: I2d8cdc1b0d87b55714177a1208a8f7a4e655a732
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
As the other boards had support the dmc function, maybe the owner
was missing this dts configure.
In order to be better the power consumption and performance, this patch
enables the dmc and dfi to support the ddrfreq,
Change-Id: I2623943085d098a65ba6e0ad7102f671f0cedd3e
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
As the config reset registers only for rk817 and rk809.
Change-Id: Id8e8ae3b816c783df92510083c36156595d230ae
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
This patch enables the gpio and powerkey configure for Rockchip
RK8xx PMIC.
Change-Id: Iab4f9303922387ae6e412f06aa098cdf53331e87
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
This patch enables the gpio and powerkey configure for Rockchip RK8xx
PMIC.
Change-Id: I09b5469f0263e00e9c467afea0f3a639c4eef105
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Formula3 and Formula2 for csc decimation will cause hdmi yuv422
display err.
Formula3:
The pixel color of left 0-14 columns and right 0-12 columns is
err.
Formula2:
The pixel color of left 0-2 columns is err.
Change-Id: I94fdd5fd962a24fde02dde1fe3ac10437ad117ad
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
The controller will be reinit when suspend and resume in device
mode if not connect to PC. And the U2PHY must be keep in power
on state during the init process. But The 'otg_sm_work' may be
schedule immediately and power off the U2PHY if system suspend
and resume between the delay time of schedule 'otg_sm_work', so
it will result in the error when init controller as below:
dwc2_core_reset() HANG! Soft Reset GRSTCTL=80000001
So flush the otg work in exit function to finish power control
of U2PHY.
Change-Id: I79c4b6a877196abd2f2201b2f984c9ea22e48fec
Signed-off-by: Meng Dongyang <daniel.meng@rock-chips.com>
Without this, otg supply is always provided by PMIC and PMIC
can not enter charge mode, because charge or otg supply output
is exclusive, only one choice at one time.
Change-Id: I4c00392d93abdf55b2b663e8a6a8822249c64d74
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
without this patch, we use otg_in to stands for otg attach and power
supply state(from dc or pmic), there is something wrong with code logic,
let's make it clear.
Change-Id: I080e6b137811b2335e0985e786ddfc4eed52e8d6
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
CDP charger should be treat as SDP charger, but charge current 1.5A(not 450mA).
Change-Id: I9892e8ce7cb26a1990b344a9ea83ce55a9a1b81a
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
CDP charger should be treat as SDP charger, but charge current 1.5A(not 450mA).
Change-Id: I3091ba599ffbb417ea89169d9ab59853f8280f53
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Without this, otg supply is always provided by PMIC and PMIC
can not enter charge mode, because charge or otg supply output
is exclusive, only one choice at one time.
Change-Id: I445c1ec6aac9520593bfb53aa7681352417f0543
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
without this patch, we use otg_in to stands for otg attach and power
supply state(from dc or pmic), there is something wrong with code logic,
let's make it clear.
Change-Id: I1cdcd3be521039b75badc3b805e70f202ebcac77
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
