Commit Graph

403565 Commits

Author SHA1 Message Date
yxj
a1364527e9 video: rockchip: rk32_dp: add support for rk3368
Signed-off-by: yxj <yxj@rock-chips.com>
2014-12-16 20:57:29 +08:00
yxj
8b9fe46efc video: rockchip: rk32_dp: covert dsb() to dsb(sy)
Signed-off-by: yxj <yxj@rock-chips.com>
2014-12-16 20:56:17 +08:00
Huang, Tao
2920ad6c0d Revert "rk32 dp: port to rk3368"
This reverts commit b8fdfeb2cf.
2014-12-16 20:55:58 +08:00
hjc
623d53b7e2 rk3368 lcdc: 1.add YUV domain overlay config; 2.edp force rgb888 output; 3.add 1.8 IO domain selete;
Signed-off-by: hjc <hjc@rock-chips.com>
2014-12-16 20:50:20 +08:00
hjc
b490bce9e0 rk fb: fix open hdmi open backlight again in no dual mode
Signed-off-by: hjc <hjc@rock-chips.com>
2014-12-16 20:49:45 +08:00
hjc
b3cd2058cd rk3368 lcdc: update gamma lut 10bit to 8bit
Signed-off-by: hjc <hjc@rock-chips.com>
2014-12-16 20:47:37 +08:00
hjc
0ad8f3f803 rk31xx lvds: set iomux for lvds ttl mode
Signed-off-by: hjc <hjc@rock-chips.com>
2014-12-16 20:47:21 +08:00
Huang, Tao
6ea75be3c1 Merge branch develop-3.10 into develop-3.10-next 2014-12-16 20:36:30 +08:00
ljf
0b6f34f8ac iep driver:
get rid of kfree buffer which allocated using devm_kzalloc.

Signed-off-by: ljf <ljf@rock-chips.com>
2014-12-16 19:56:18 +08:00
yxj
17b6509381 reset: rockchip: load as subsys_initcall_sync
rockchip reset control should probe before edp

Signed-off-by: yxj <yxj@rock-chips.com>
2014-12-15 21:15:10 +08:00
David Wu
d39cf37ff0 rk3368: pinctrl: add hdmi-i2c-xfer
Signed-off-by: David Wu <wdc@rock-chips.com>
2014-12-15 18:49:18 +08:00
zsq
bc190eca53 remove rga driver mmu buf malloc to prevent crash 2014-12-15 17:24:31 +08:00
dalon.zhang
86a0db3527 camera: UVC: fix UVC interrupt and other issues 2014-12-15 16:25:18 +08:00
cl
2adaeb93a1 rk312x: miss the new file rk3126.dtsi&&3128.dtsi for the commit c59e8d086aaf89d0f48351ff7287708b57e5aba1(rk312x: adjust dts relation)
Signed-off-by: cl <cl@rock-chips.com>
2014-12-15 09:09:09 +08:00
Huang, Tao
76511ba280 arm64: rockchip: rk3368 disable qos init temporarily
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>
2014-12-13 22:12:26 +08:00
dkl
fd28f459b1 rk3368: clk: fix rk3368 apllb/aplll set_rate
After rk3368 apllb/aplll change settings, set the divider of core back to 1.

Signed-off-by: dkl <dkl@rock-chips.com>
2014-12-13 21:10:11 +08:00
Huang, Tao
fd62e6c91e arm64: rockchip: rockchip_defconfig enable RK31XX_LVDS RK32_DP
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>
2014-12-13 18:05:41 +08:00
hjc
5cc05e4945 ion: ino reserve
Signed-off-by: hjc <hjc@rock-chips.com>
2014-12-13 18:02:46 +08:00
hjc
b8fdfeb2cf rk32 dp: port to rk3368
Signed-off-by: hjc <hjc@rock-chips.com>
2014-12-13 18:02:28 +08:00
hjc
84f0f91f51 rk31xx lvds: add lvds grf config
Signed-off-by: hjc <hjc@rock-chips.com>
2014-12-13 17:59:51 +08:00
hjc
06f6340537 rk3368 lcdc: 1.delete force vop output aaa mode in hdmi and edp mode; 2.not to control power domain.
Signed-off-by: hjc <hjc@rock-chips.com>
2014-12-13 17:59:14 +08:00
Huang, Tao
da9ae0c513 arm64: rockchip: rockchip_defconfig disable MMC_DW_IDMAC temporarily
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>
2014-12-13 15:18:26 +08:00
dkl
b8b2df2f41 rk3368: dts: init gpll rate before clk_core_b and clk_core_l
It's better to init gpll rate before clk_core_b and clk_core_l,
because gpll will be used when clk_core_b and clk_core_l change rate.

Signed-off-by: dkl <dkl@rock-chips.com>
2014-12-13 13:43:14 +08:00
dkl
d18042afb5 rk3368: clk: fix rk3368 apll set_rate
In rk3368, apll enter slow mode before changing settings
and return to normal mode after changing settings.

Signed-off-by: dkl <dkl@rock-chips.com>
2014-12-13 13:42:37 +08:00
Huang, Tao
f4c8e2cdac arm64: rockchip: rockchip_defconfig enable some ARM64 feature
+DISABLE_CPU_SCHED_DOMAIN_BALANCE
+SCHED_HMP
+HMP_VARIABLE_SCALE
+HMP_FREQUENCY_INVARIANT_SCALE
+SCHED_HMP_LITTLE_PACKING
+ARM_BIG_LITTLE_CPUFREQ
+ARM_DT_BL_CPUFREQ
+ARM64_CPUIDLE
+SERIAL_ROCKCHIP_CONSOLE
+RK30_CAMERA_ONEFRAME

Signed-off-by: Huang, Tao <huangtao@rock-chips.com>
2014-12-13 12:58:06 +08:00
Huang, Tao
262b832c3f arm64: rockchip: fix tb_8846 boot
uart_dbg status default disabled
disabe wireless-wlan
bootargs remove vmalloc=512M console=ttyS2
remove memory node

Signed-off-by: Huang, Tao <huangtao@rock-chips.com>
2014-12-13 12:55:21 +08:00
chenzhen
ecc6527784 rk, gpu :
source code for device/rockchip/common/gpu/libMali-T760/mali_kbase.ko,
	in branch rk/rk32/mid/5.0/develop,
	commit 1b187041f11b7ca1d6c1490b934f09648f334a19.
2014-12-12 18:08:54 +08:00
cl
c59e8d086a rk312x: adjust dts relation
Signed-off-by: cl <cl@rock-chips.com>
2014-12-12 17:59:56 +08:00
Huang, Tao
4d2f66c4d5 arm64: rockchip: add rk3368-tb_8846.dts
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>
2014-12-12 17:03:20 +08:00
Huang, Tao
497e94f6f2 arm64: rockchip: rk3368.dtsi add more configure
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>
2014-12-12 17:02:35 +08:00
hjc
cd1569d3fb rk3368 lcdc: support win mirror and update NO_DUAL mode
Signed-off-by: hjc <hjc@rock-chips.com>
2014-12-12 15:16:04 +08:00
dkl
0ceff91bfa rk3368: clk: add CLKOPS_RATE_RK3368_DCLK_LCDC for dclk_vop0
Signed-off-by: dkl <dkl@rock-chips.com>
2014-12-12 14:25:08 +08:00
dkl
7dfaf7a105 rk3368: dts: clk: fix some errors
Adjust vip clks, rename clk_gpu_core "clk_gpu" and remove wrong clk4x_ddr.

Signed-off-by: dkl <dkl@rock-chips.com>
2014-12-12 14:24:54 +08:00
Huang, Tao
801c2bd378 Merge branch develop-3.10 into develop-3.10-next 2014-12-12 14:12:56 +08:00
Huang, Tao
4abd927beb Revert "rk3368 lcdc: support win mirror and update NO_DUAL mode"
This reverts commit fd18d428fa.
2014-12-12 14:11:55 +08:00
Huang, Tao
037ab54084 ARM: rk: build resource.img with logo_kernel.bmp
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>
2014-12-12 12:14:01 +08:00
dkl
d5e51e3f22 rk3368: reset: add soft_reset id
Signed-off-by: dkl <dkl@rock-chips.com>
2014-12-12 12:00:13 +08:00
hjc
c768774b04 rk fb: delete unused message
Signed-off-by: hjc <hjc@rock-chips.com>
2014-12-12 11:58:18 +08:00
zyc
3e986e49cf cif: set CONFIG_RK30_CAMERA_ONEFRAME default as yes in rockchip_defconfig 2014-12-12 11:40:23 +08:00
dkl
94cc30128d clk: rockchip: fix some code style problems in clk-pll.c
Signed-off-by: dkl <dkl@rock-chips.com>
2014-12-12 10:41:50 +08:00
dkl
d52ba29d14 clk: rockchip: fix pll_clk_get_best_set() for rk3188plus type pll
When selecting a best setting for rk3188plus type pll, consider a
larger NO first(means larger VCO freq), and a smaller NR later.

Signed-off-by: dkl <dkl@rock-chips.com>
2014-12-12 10:41:50 +08:00
lyz
d072c6fad2 rk32: disabled ohci in dt 2014-12-12 10:33:02 +08:00
lyz
d63fd641d1 ARM: rockchip: rockchip_defconfig add USB_OHCI_HCD 2014-12-12 10:33:02 +08:00
lyz
e84dbc3a64 rk312x: add support for ehci to all rk312x series 2014-12-12 10:33:02 +08:00
lyz
746e038458 rk32: ehci: work-around for abnormal ohci 2014-12-12 10:33:01 +08:00
lyz
29badc3cbd Revert "USB: Fix EHCI bug if connect with FS or LS device."
This reverts commit f65cb6fc5a.
2014-12-12 10:33:01 +08:00
hjc
4ccf4784af rk fb: box is use NO_DUAL mode,so fb have to disable dsp_black
Signed-off-by: hjc <hjc@rock-chips.com>
2014-12-11 17:04:48 +08:00
Huang, Tao
2878bf0e7e rk: Makefile set default CROSS_COMPILE when ARCH is arm64
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>
2014-12-11 14:23:00 +08:00
Mark Yao
aca8091786 rk_fb: logo: get kernel logo addr from protect memory region
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
2014-12-11 14:09:30 +08:00
CMY
2ce890be5d rk: mem: protect memory region that specified by uboot on kernel booting 2014-12-11 12:59:21 +08:00