this patch make it more reasonable and readable, because when we chose
I2S_CKR_TRCM_TXONLY, we only output clk_lrck_tx, and hardware need to
confirm this signal is wired to external codec lrck_tx/rx at the same time.
for convenience, we just handle lrck_txonly if we enable symmetric_rates
in driver and dai_link. otherwise, we use the separate lrck_tx/rx.
Change-Id: I383c34d2337715148566f7e2ada367f2ee279cb5
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
(cherry picked from git.kernel.org broonie/sound.git topic/rockchip
commit 7ec4a1c34a190297540626dfa240dc033beca196)
Set status of saradc node to "okay", to support saradc.
Change-Id: Ic36e390097efbf564b5cbdc321086b6965cd54b0
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Add compat_ioctl for accessory to work on 64-bit platforms.
Change-Id: I805395c35017111bf0c462847f11765c7088d266
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
Define a new ioctl for MTP_SEND_EVENT, as its
ioctl numbers depends on the size of struct
mtp_event, which varies in ARCH32 and ARCH64.
Change-Id: I060604057ac6c55991118b3f61b187468b4ee0fd
Signed-off-by: Rohith Seelaboyina <rseelaboyina@nvidia.com>
Reviewed-on: http://git-master/r/377800
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
Add compat_ioctl for mtp to work on 64-bit platforms.
Change-Id: Icef0f42a554d770a83152c4185aca9e39e041165
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
Rockchip RK3399 SoCs support reboot with modes, such as recovery mode,
loader mode and normal mode.
Change-Id: I96ed872f849c2b3b06d236248995db18be070960
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
It seems than android gcc can't pass gcc-goto.sh check, but asm goto work.
So let's active it.
Change-Id: I75310af8cf3746a5c110daa564e96eeb1d7f1070
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>
RK3399 has a PCIe controller which can be used as Root Complex.
This driver supports a PCIe controller as Root Complex mode.
Change-Id: Ifff7340bd90b7e9e17c9f500938bee7769785cb9
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
This patch add some required and optional properties for Rockchip
PCIe controller. Also we add a example for how to use it.
Change-Id: I69cfbc6290c97a9a55b50c531da6c4babefd8571
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
The CONTROL register offset is different from old SoCs.
For Linux driver, there are not functional changes at all.
Let's call it v2.
Change-Id: I87ab0363fd6a13efe223717ffc6a0ba06ec25d72
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>
Add compatible string for rk3399 because which timer is a little
different from older SoCs. So rename the file name from
rockchip,rk3288-timer.txt to rockchip,rk-timer.txt.
Clarify rockchip,rk3288-timer supported SoCs.
Change-Id: Ic39196352ebb4740d21c9e5bdf967084192c66d8
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>
The rockchip timer is broadcast timer. Add CLOCK_EVT_FEAT_DYNIRQ
flag and set cpumask to all cpu to save power by avoid unnecessary
wakeups and IPIs.
Change-Id: Ie257972a4a42f6807aed22df695d8b3a4d715045
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>
rk_timer_interrupt_clear and rk_timer_disable is unnecessary before
request_irq. Timer should keep disabled before booting Linux.
Change-Id: I6de401ad156d620ac676e80de89ffd0bdaab3a36
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>
It has been reported that xHCI on this SoC really cannot
sleep without extraordinary delay. This quirk can ensure
the xHCI enter the Halted state after the Run/Stop (R/S)
bit is cleared to '0'.
Change-Id: Ibccf0c5c2da4533817b998b523e3a3a09ed7dcea
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
On some xHCI controllers (e.g. Rockchip SoCs), which are
integrated in DWC3 IP, need an extraordinary delay to wait
for xHCI enter the Halted state(i.e. HCH in the USBSTS
register is '1'), especially if DWC3 is in DRD mode.
Change-Id: I7718a4052f67d40cddb50f7113dbb0b591746359
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
If an xhci platform need an extraordinary delay to wait for
xHCI enter the Halted state after the Run/Stop (R/S) bit is
cleared to '0', then enable XHCI_SLOW_SUSPEND quirk flag.
Change-Id: If37fe7b7b37cc3c573361f4ef522404ebe39991e
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
this patch is depend on rk hdmi framework, so no need to upstream.
Change-Id: If9892c21c4c1cf7dfbb4efed67d188892b1b4bda
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
enable CONFIG_INET_DIAG_DESTROY and CONFIG_DM_VERITY_FEC
Change-Id: I3bb2bbf067ebefbbcc3a102b41c7eff8879389a6
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>
* linux-linaro-lsk-v4.4-android: (797 commits)
parisc: Use generic extable search and sort routines
arm64: kasan: Use actual memory node when populating the kernel image shadow
arm64: mm: treat memstart_addr as a signed quantity
arm64: lse: deal with clobbered IP registers after branch via PLT
arm64: mm: check at build time that PAGE_OFFSET divides the VA space evenly
arm64: kasan: Fix zero shadow mapping overriding kernel image shadow
arm64: consistently use p?d_set_huge
arm64: fix KASLR boot-time I-cache maintenance
arm64: hugetlb: partial revert of 66b3923a1a
arm64: make irq_stack_ptr more robust
arm64: efi: invoke EFI_RNG_PROTOCOL to supply KASLR randomness
efi: stub: use high allocation for converted command line
efi: stub: add implementation of efi_random_alloc()
efi: stub: implement efi_get_random_bytes() based on EFI_RNG_PROTOCOL
arm64: kaslr: randomize the linear region
arm64: add support for kernel ASLR
arm64: add support for building vmlinux as a relocatable PIE binary
arm64: switch to relative exception tables
extable: add support for relative extables to search and sort routines
scripts/sortextable: add support for ET_DYN binaries
...
Conflicts:
arch/arm64/mm/dma-mapping.c
drivers/clk/rockchip/clk-rk3368.c
drivers/mmc/core/core.c
drivers/mmc/core/sdio.c
include/linux/dcache.h
Change-Id: Ibaa1e90ac735db8d9f5e542c266ef27b91616ef4
This reverts commit 7a03fe6f48.
We need a new patch for dw_mmc to deal with phase policy in case of
new register layout, otherwise it will break phase stuff for some
case
Change-Id: Iffb7a6dbe0b17d27c2cca4b2b99ddbc4e0736f18
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Add ctrl-base for rk3399 to make emmc-phy work.
Change-Id: Iffb7a6dbe0b17d27c2cca4b2b99ddbc4e0736f15
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Need to control phy's digital block before enabling pll and
waiting for it into locked state.
Change-Id: I04037f5496fd5c1ef4e24853eb32b43ce326ff01
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
This patch adds ctrl-base which points to the digital block
to setup phy pll enabling.
Change-Id: I922dd7574229fda6b2ee51ca6ed1d7852ef87d30
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
To slove the issue found on evb2 for hs400
[ 1.526008] sdhci: Secure Digital Host Controller Interface driver
[ 1.526558] sdhci: Copyright(c) Pierre Ossman
[ 1.527899] sdhci-pltfm: SDHCI platform and OF driver helper
[ 1.529967] sdhci-arasan fe330000.sdhci: No vmmc regulator found
[ 1.530501] sdhci-arasan fe330000.sdhci: No vqmmc regulator found
[ 1.568710] mmc0: SDHCI controller on fe330000.sdhci [fe330000.sdhci]
using ADMA
[ 1.627552] mmc0: switch to high-speed from hs200 failed, err:-84
[ 1.628108] mmc0: error -84 whilst initialising MMC card
[PATCH reviewing: https://patchwork.kernel.org/patch/9010851/]
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Change-Id: I7641a3c095bb893a56f18fa3faa88ca179f3dae3
req_range is declared as a u64 to cope with overflows in the
multiplication of two u32. As both req_power and power_range are u32,
we need to make sure the multiplication is done with u64 types.
Change-Id: I1aea92f12e48338be2681a9b2ba84756b6cc8cf8
Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
Cc: Zhang Rui <rui.zhang@intel.com>
Cc: Eduardo Valentin <edubezval@gmail.com>
Signed-off-by: Javi Merino <javi.merino@arm.com>
Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
(cherry picked from commit f9d038144a)
The commit 17e8351a77 consistently use int for temperature,
however it missed a few in trip temperature and thermal_core.
In current codes, the trip->temperature used "unsigned long"
and zone->temperature used"int", if the temperature is negative
value, it will get wrong result when compare temperature with
trip temperature.
This patch can fix it.
Change-Id: I4b31f577a6142bc02f8e0deae79ab2ff7c8bd978
Signed-off-by: Wei Ni <wni@nvidia.com>
Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
(cherry picked from commit 1d0fd42fa3)
The dynamic power consumption of a device is proportional to the
square of voltage (V) and the clock frequency (f). It can be expressed as
Pdyn = dynamic-power-coefficient * V^2 * f.
The coefficient represents the running time dynamic power consumption in
units of mw/MHz/uVolt^2 and can be used in the above formula to
calculate the dynamic power in mW.
Change-Id: Ib208ff2f83ee45911e846f940952d765ae8c974e
Signed-off-by: Punit Agrawal <punit.agrawal@arm.com>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
(cherry picked from commit 3be3f8f36e)
