Get grf offset form DT and optimize hclk_usb_peri clock process logic.
Change-Id: I136970c7052e5d621fd10e5d2b90f0fdac620067
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
The second argument of the mutex_lock_nested() helper is only
evaluated if CONFIG_DEBUG_LOCK_ALLOC is set. Otherwise we
get this build warning for the new regulator_lock_supply
function:
drivers/regulator/core.c: In function 'regulator_lock_supply':
drivers/regulator/core.c:142:6: warning: unused variable 'i' [-Wunused-variable]
To avoid the warning, this restructures the code to make it
both simpler and to move the 'i++' outside of the mutex_lock_nested
call, where it is now always used and the variable is not
flagged as unused.
We had some discussion about changing mutex_lock_nested to an
inline function, which would make the code do the right thing here,
but in the end decided against it, in order to guarantee that
mutex_lock_nested() does not introduced overhead without
CONFIG_DEBUG_LOCK_ALLOC.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Fixes: 9f01cd4a91 ("regulator: core: introduce function to lock regulators and its supplies")
Link: http://permalink.gmane.org/gmane.linux.kernel/2068900
Signed-off-by: Mark Brown <broonie@kernel.org>
(cherry picked from commit fa731ac7ea)
Change-Id: Id700f411f2bcbe0cd49be332f329cd1b03768868
During the initial conversion to the newly introduced combined fractional
dividers+muxes the rk3368 clocks were left out, so convert them now.
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
(cherry picked from git.kernel.org mmind/linux-rockchip.git v4.6-clk/next
commit 7af8a26ce7)
Change-Id: I81e408089ff1095d4735072d3ddb15c3564f6970
The drive strength control of rk3366 is very different from others'.
RK3366 soc adds N and P channel drive strength control, and we assume
they are the same value.
Change-Id: I45896f1483cb0a7550789df3bf84a0460cb21527
Signed-off-by: David Wu <david.wu@rock-chips.com>
Add a clock type for fixed factor clocks. This allows us to define fixed
factor clocks where they appear in the clock hierarchy instead of in the
init function.
The additional factor_gate type, finally allows us to model some last
parts of the clock tree correctly.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
(cherry picked from commit 29a30c269a)
Change-Id: Ie4ec8b9d9199cdbe0be045c2ed4c270029e37949
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Separate the number of CRU and PMUCRU, and modify the date to 2016.
Change-Id: I235fc8a93640e13fb112f45bb3387542b07e1a87
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Without MMC_CAP_ERASE support, we fail to mount partition
with "discard" option since mmc_queue_setup_discard is limited
for checking mmc_can_erase. Without doing mmc_queue_setup_discard,
blk_queue_discard fails to test QUEUE_FLAG_DISCARD flag, so we get
the following log from f2fs(actually similar to other file system):
mounting with "discard" option, but the device does not support discard
Change-Id: Iee781795c9c61153644f0dd5b00dfc2cca6cc721
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
As the TRM says, add the tsadc_q_sel to control the temperature-code
sequence since the rk3228/rk3399 need set this bit (1024 - tsadc_q)
as output.
Fixes: commit
b0d7033 "thermal: rockchip: Support the RK3399 SoCs in thermal driver"
7b02a5e "thermal: rockchip: Support the RK3228 SoCs in thermal driver"
Reported-by: Elaine Zhang <zhangqing@rock-chips.com>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
(cherry picked from git.kernel.org evalenti/linux-soc-thermal fixes
commit 7ea38c6c36)
Change-Id: I9d39b947e197393688ed58bf079e519e7d5a6d9e
This patch renames to be more adapter compatibles since more and more
SoCs are supported in thermal driver.
Reported-by: Huang,Tao <huangtao@rock-chips.com>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
(cherry picked from git.kernel.org evalenti/linux-soc-thermal fixes
commit 952418a34f)
Change-Id: Ia053d6877a16b36e357bd9b427b323703e5a514b
If phy_pm_runtime_get_sync failed but we already
enable regulator, current code return directly without
doing regulator_disable. This patch fix this problem
and cleanup err handle of phy_power_on to be more readable.
Fixes: 3be88125d8 ("phy: core: Support regulator ...")
Cc: <stable@vger.kernel.org> # v3.18+
Cc: Roger Quadros <rogerq@ti.com>
Cc: Axel Lin <axel.lin@ingics.com>
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
(cherry picked from commit b82fcabe21)
Change-Id: I1cb5327d624d88a97096eccaa94924b851dcce27
fixed the WARNING: invalid free of devm_ allocated data
Change-Id: I54514cf53a8a0d1f885fd0a17e7f6db7af1d10f9
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
For gadget driver, usb_ep_caps is a new structrue in usb_ep, and its
attribute will be check in usb_ep_autoconfig method, so we need to do
some initialization work at ep creating.
Meanwhile, the process of android gadget driver have been changed,
correspondingly, udc_start and udc_stop are invoked differently from
before, so dwc_otg_gadget_stop method need to refactor and ajust
the new process.
Change-Id: Id1e20d4c265e0d382b0f36f6e729681f9c94c947
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
This patch to add a generic PHY driver for ROCKCHIP eMMC PHY.
Access the PHY via registers provided by GRF (general register
files) module.
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
(cherry picked from git.kernel.org kishon/linux-phy next
commit 9743f1c935995a55ddd926943ee7b3cfb4718208)
Change-Id: Ia24ccd041392e64efd28868ffccc8da4419bd29f
This patch adds a binding that describes the Rockchip eMMC PHYs
found on Rockchip SoCs eMMC interface.
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
(cherry picked from git.kernel.org kishon/linux-phy next
commit c9a1ddcac5b95a9dbf3d3f71d3be8b157239cce5)
Change-Id: I6913babddbc70c1ad3ea2234d8afac79190852a4
enable PM_ADVANCED_DEBUG by default.
use pd debug get pd tree like this:
cat d/pm_genpd/pm_genpd_summary
Change-Id: I1ca27a7619cc0655c2256918d7b6530b6a637bcf
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
The USB phys on Rockchip SoCs contain their own internal PLLs to create
the 480MHz needed. Additionally this PLL output is also fed back into the
core clock-controller as possible source for clocks like the GPU or others.
Until now this was modelled incorrectly with a "virtual" factor clock in
the clock controller. The one big caveat is that if we turn off the usb phy
via the siddq signal, all analog components get turned off, including the
PLLs. It is therefore possible that a source clock gets disabled without
the clock driver ever knowing, possibly making the system hang.
Therefore register the phy-plls as real clocks that the clock driver can
then reference again normally, making the clock hirarchy finally reflect
the actual hardware.
The phy-ops get converted to simply turning that new clock on and off
which in turn controls the siddq signal of the phy.
Through this the driver gains handling for platform-specific data, to
handle the phy->clock name association.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
(cherry picked from commit b74fe7c761)
Change-Id: Ie05464a9523af86b602d4801cb9b842f65d08670
We need custom handling for these two socs in the driver shortly,
so add the necessary compatible values to binding and driver.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
(cherry picked from commit c2bfc3b888)
Change-Id: I63cf61e12b1f3bb56856accc38949c6cd8c0ce8e
This unclutters the loop in probe a lot and makes current (and future)
error handling easier to read.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
(cherry picked from commit 97dd910109)
Change-Id: I5c2ccfbd42e52b77649f01bca2a86767f27fe32f
This introduces a common struct that holds data belonging to
the umbrella device that contains all the phys and that we
want to use later.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
(cherry picked from commit 5fdbb97dec)
Change-Id: I48dd87b0b39739e0c75d0613e881b2b57e8cb6f2
Currently the phy driver only gets the optional clock reference but
never puts it again, neither during error handling nor on remove.
Fix that by moving the clk_put to a devm-action that gets called at
the right time when all other devm actions are done.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
(cherry picked from commit 75d390fecf)
Change-Id: I976d5a49448febdb7da5b5c35455c708bfc83899
add pd parameters in the dtsi.
support pd for rk3366.
Change-Id: Id8a7c7b84038e4987aea8cb0e9846fbe187af0e9
Signed-off-by: Xiao Feng <xf@rock-chips.com>
According to a description from TRM, add all the power domains.
Change-Id: I65046318da4592b76bfd5ab7c0294e2c5d66d20a
Signed-off-by: Xiao Feng <xf@rock-chips.com>
Modify binding documentation for the power domains
found on Rockchip RK3366 SoCs.
Change-Id: Ib9cd07971303b1205f501a06430811e877870212
Signed-off-by: Xiao Feng <xf@rock-chips.com>
