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Author SHA1 Message Date
cym
d4d25daaff RK3188:ddr_clock select GPLL_2_div if ddr_freq big then 250MHz, 
only use for DPLL bad and ddr_clock must select GPLL(800MHz-1000MHz).
 2013-05-13 16:40:25 +08:00
zzy
d24c73a5fd add SEW290 3G modem 2013-05-13 14:14:02 +08:00
chenxing
37dc752125 rk3188: pm.c: optimize soc_is_rk3188plus flag 2013-05-13 11:24:50 +08:00
lintao
6f3cddc7a4 WIFI: support mt7601u usb wifi 2013-05-13 10:55:14 +08:00
chenxing
36320a82b3 rk: add pll wait lock error dump infomations 2013-05-13 10:20:14 +08:00
chenxing
53ca3ac1f0 rk30xx: add lpj_gpll init to prevent dma halt and sdio error 2013-05-13 10:15:39 +08:00
chenxing
293d4d9cfd rk3188: add lpj_gpll init in clock_data, fix dma halt and sdio error 2013-05-13 09:16:45 +08:00
chenxing
28905e328b rk3066B: compatible with rk3188 plus pll config, fix compile error 2013-05-10 18:06:10 +08:00
cym
dd25dbca60 RK3188 :no matter what CPLL or DPLL is bad,DDR_CLOCK select GPLL 2013-05-10 17:58:21 +08:00
wdc
c9efb91c5e wifi: add rtl8723as 2013-05-10 17:56:18 +08:00
chenxing
7de31a9b90 rk3188: plus: add power on pll 2013-05-10 17:15:15 +08:00
chenxing
eac42ad185 rk: pm_tests: add delayline support 2013-05-10 10:22:28 +08:00
陈金泉
7692ce8ee5 fix codec set init error 2013-05-09 21:16:21 +08:00
wuhao
bccfdc8129 rk616 codec: modify power up and down 2013-05-09 16:11:04 +08:00
yxj
530f5ce6d2 mfd:rk616:vif:fix rk616 set vif 2013-05-09 15:53:27 +08:00
yxj
73ba0c4887 board jettaplus defconfig:add lvds config 2013-05-09 15:43:51 +08:00
yxj
a5374b7c79 rk3188m tb board:config rk616 lvds 2013-05-09 15:43:51 +08:00
chenxing
ead154e242 rk30xx/rk3168/rk3188: dvfs: nandc delayline break lock status to make sure every time relock 2013-05-09 14:37:32 +08:00
陈金泉
7cfe0b4962 add setting codec from parameter 2013-05-09 12:13:26 +08:00
wuhao
04648ce07d rk616 codec: adjust the code 2013-05-09 10:57:29 +08:00
yxj
5e98fe59cc mfd:rk616:vif:disable vif when hdmi remove 2013-05-09 10:41:33 +08:00
yxj
79262c5a6c rk3066b lcdc:fix vif support 2013-05-09 10:41:32 +08:00
Zhaoyifeng
53c37d76fd MTD:MTD MERGE READ AND WRITE FOR ONE REQ(MAX SIZE 1024KB). ZYF 2013-05-09 10:02:49 +08:00
yxj
253d09ce3e board jettaplus:set vcc_io to 3.2v to fix spdif 2013-05-08 21:11:43 +08:00
yxj
88901d4cf4 screen:lcd b101ew05:fix vif support 2013-05-08 21:11:43 +08:00
yxj
1ab06c2108 mfd:rk616:hdmi:modify vif set interface 2013-05-08 21:11:42 +08:00
yxj
da265a3943 rk30 rk3188 lcdc:fix vif support 2013-05-08 21:11:42 +08:00
yxj
38caee79e1 rk screen:fix vif support 2013-05-08 21:11:42 +08:00
yxj
f08ce859f2 mfd:rk616:vif:support hdmi only mode 2013-05-08 21:11:42 +08:00
chenxing
25fefda6f8 rk: pm_test: add maxfreq operation support 2013-05-08 19:32:07 +08:00
wuhao
821d1eb8a5 rk616 codec: optimize the playback, capture processes, to reduce power consumption 2013-05-08 19:06:12 +08:00
陈金泉
53036fa11b fix codec pop noise 2013-05-08 16:50:54 +08:00
黄涛
e6de97756a rk3188: add delayline support again 2013-05-08 16:22:49 +08:00
chm
c8097eb220 vpu_service: add reg_size check on reg_init 2013-05-08 14:18:00 +08:00
陈金泉
39d9ebd17b change for 3188-m codec controls 2013-05-07 21:20:37 +08:00
xxh
c92b2c6f06 1.fix Vodafone K4505 3G dongle USB switch faild 
2.Add more VID PID for option driver
 2013-05-07 20:35:01 +08:00
xxx
217e0253e6 rk3168: uart\sdmmc 48M 2013-05-07 18:02:40 +08:00
yzq
dad427ac34 mfd:rk616 hdmi: use vif rebuild signal for hdmi 1080p 2013-05-07 17:37:00 +08:00
yxj
89a2c8a5b5 mdf:rk616:vif:set mclk to 12M when vif on 2013-05-07 17:26:44 +08:00
xxx
11a106d898 board-rk3168-tb.c use default pll rate 2013-05-07 17:17:31 +08:00
许盛飞
33dee0532c charging-displasy: when mode_normal and mode_charge 2013-05-07 16:42:36 +08:00
yxj
b62130a148 mdf:rk616:vif:add vif set for hdmi 2013-05-07 16:05:50 +08:00
yxj
3a4462b21c lcd b101uano:support rk616 dual lvds 2013-05-07 16:05:50 +08:00
yxj
baaaae0f0c mfd:rk616:vif:fix dual lvds support 2013-05-07 16:05:50 +08:00
xxx
a7bfbf5582 remove pm.c rk3188/clock_data.c pirntk 2013-05-07 14:58:05 +08:00
xxx
9105fbf296 add uart\sdmmc 48M supporting 2013-05-07 14:51:45 +08:00
黄涛
03a01aed0d Revert "rk3188 plus: add delay line support" 
This reverts commit 24903a6bd0.
 2013-05-07 14:14:34 +08:00
yzq
8d0e47e29b rk spdif: support 2013-05-07 12:27:43 +08:00
xxx
54fa2469fb cpll\DPLL is not power dn,if rk_pll_flag!=0 2013-05-07 11:09:49 +08:00
chenxing
24903a6bd0 rk3188 plus: add delay line support 2013-05-07 10:02:28 +08:00