Commit Graph

609852 Commits

Author SHA1 Message Date
Jeffy Chen
e0618aeace input: touchscreen: gt1x: Enable GTP_POWER_CTRL_SLEEP
According to gt1x_generic.h, the GTP_POWER_CTRL_SLEEP is for
"turn off power on suspend" case.

And we're turning off TS's power on suspend actually.

Change-Id: I2a8ec852a96beb01d6e4d6cfd4f3e94ef0185608
Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com>
2018-06-20 10:14:32 +08:00
Werner Johansson
4ff3c391f0 UPSTREAM: drm/dsi: Add Turn On/Shutdown Peripheral command helpers
The MIPI_DSI_TURN_ON_PERIPHERAL and MIPI_DSI_SHUTDOWN_PERIPHERAL packets
are required for some panels, for example the Panasonic VVX10F034N00.

Change-Id: Ib005eb3e464399a9bb83834d31beff146f56116a
Signed-off-by: Werner Johansson <werner.johansson@sonymobile.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
(cherry picked from commit 6e8c9e3376)
2018-06-19 17:17:15 +08:00
Wyon Bi
a9b028db37 drm/rockchip: dsi: fix phy power-on sequence
Fixes: 1df398e95a ("drm/rockchip: dsi: fix phy power-on sequence")
Change-Id: I4924cc4104d4e3be5e8b9b5fd52b1fb8d5cfd023
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
2018-06-19 17:17:04 +08:00
xiaoyao
21dcfd54bc net: wifi: cpyress: fix sleep issue
Change-Id: Ib0dec40fd86e0397a5a17277dfb2aae1489ec189
Signed-off-by: xiaoyao <xiaoyao@rock-chips.com>
2018-06-19 09:34:21 +08:00
zain wang
ad6b6e42a2 mfd: fusb302: Don't ignore UFP_D
Don't ignore UFP_D data, so that we can get
right DP pin cap from DISCOVERY_MODES.

Fix commit 4258959427
mfd: fusb302: add DP UFP_D support

Change-Id: I6a6250d26c1a847c9b75c676b14f47a37bfcc1f9
Signed-off-by: zain wang <wzz@rock-chips.com>
2018-06-19 08:51:10 +08:00
Sugar Zhang
40e877458b ASoC: rockchip: multi_dais: fixup master/slave format
Change-Id: I680035d37144d87bf7f594c4dd0e9222860929ef
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
2018-06-15 17:06:46 +08:00
chenjh
101dc3fea8 firmware: rockchip_sip: compatible 64-bit ATF works with 32-bit kernel
maily compatible for fiq debugger.

Change-Id: I26cb735fa38997d64c7d080b96d04a29d0146b71
Signed-off-by: chenjh <chenjh@rock-chips.com>
2018-06-15 16:47:38 +08:00
Zhen Chen
e8686e176d MALI: bifrost_for_linux: ipa: make poll_temperature_thread freezable
Change-Id: I378dae2ce5d53a32d90df6bcc29950d61d8924cf
Signed-off-by: Zhen Chen <chenzhen@rock-chips.com>
2018-06-15 11:53:29 +08:00
Zhen Chen
d26da80d60 MALI: bifrost: ipa: make poll_temperature_thread freezable
Change-Id: I27343b919271be4618687a2311b6bf54e24cefce
Signed-off-by: Zhen Chen <chenzhen@rock-chips.com>
2018-06-15 11:19:09 +08:00
Elaine Zhang
cd4d3065af clk: rockchip: add support for half divider
The new Rockchip socs have optional half divider,
so we use "branch_half_divider" + "COMPOSITE_NOMUX_HALFDIV \
DIV_HALF \ COMPOSITE_HALFDIV \ CMPOSITE_NOGATE_HALFDIV"
to hook that special divider clock-type into our clock-tree.

Change-Id: I79e3f0e8265ccb6a9839cd83a7a3ee0ca825a020
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
2018-06-15 09:41:09 +08:00
Zhen Chen
e6dda0b9d9 MALI: bifrost_for_linux: add "2EE" in the output of catting sys node "gpuinfo"
Indeed, "2EE" is hardcoded, it's not a good way.
But I could not find a way to get the number of EE(s) at runtime right now.

Change-Id: I15afe580d194c0d8354953fe877ac1d2882826c5
Signed-off-by: Zhen Chen <chenzhen@rock-chips.com>
2018-06-14 20:42:33 +08:00
Zhen Chen
d0cadf1fc3 MALI: bifrost_for_linux: add recognizing "Mali-G31" for sys node "gpuinfo"
Change-Id: I660f3666e35c59d321698cd10151bc5952be1c1e
Signed-off-by: Zhen Chen <chenzhen@rock-chips.com>
2018-06-14 20:42:24 +08:00
Xing Zheng
1ee82d86fa ASoC: rk3308_codec: add property 'rockchip,no-deep-low-power'
Change-Id: I22424e3f5198188c8ff1966894ea10ff1f00ab0f
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
2018-06-14 10:35:04 +08:00
Xing Zheng
91597a83ea ASoC: rk3308_codec: add support low power mode in runtime
We need to close ADC or DAC mclk if they are not working,
it may reduce a bit of power consumption for runtime.
And, power off and close pclk_acodec during suspend. But
the acodec may be needed by VAD during suspend, we can
use the property 'rockchip,no-deep-low-power' to keep
codec during suspend.

The following is a comparison of power consumption before
and after the modification on RK3308 EVB v10:

[default]       VCC_1V8_CODEC(V*mA=mW)  VCC_3V3_CODEC(V*mA=mW)
idle            1.794*0.9=1.614         3.354*2.8=9.3912    // the ADC and DAC mclk are opened
playback 2ch    1.793*7.9=14.1647       3.354*2.8=9.3912    // the ADC and DAC mclk are opened
capture 8ch     1.789*27.8=49.7342      3.324*2.8=9.3072    // the ADC and DAC mclk are opened
suspend         1.8*0.7=1.26            3.356*2.8=9.3968    // the ADC and DAC mclk are opened

[modified]      VCC_1V8_CODEC(V*mA=mW)  VCC_3V3_CODEC(V*mA=mW)
idle            1.794*0.8=1.4352        3.354*2.8=9.3912    // just close ADC and DAC + close ADC / DAC mclk
playback 2ch    1.793*7.8=13.9854       3.354*2.8=9.3912    // open DAC mclk, close ADC mclk
capture 8ch     1.789*27.7=49.5553      3.323*2.8=9.3044    // open ADC mclk, close DAC mclk
suspend         1.799*1=1.799           3.355*0.3=1.0065    // close 2 micbiases, close mclk tx/rx and pclk_acodec

It seems that the light low power (close ADC and DAC mclk) can't
bring us much help to reduce power (only ~1mA@VCC_1V8_CODEC),
but the deep lower power can help us to reduce ~8mW@VCC_3V3_CODEC
during suspend. However, it's that the power is increased
~0.5mW@VCC_1V8_CODEC in deep low power, it needs to EE's to
help us to check this.

Change-Id: I7982b4e20bcb894e1895f772816b2b188bcc314d
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
2018-06-14 10:34:53 +08:00
Yifeng Zhao
a4125a4a82 drivers: rknand: support rk3308
rk3308 has a new nandc, driver need modify to support.

Change-Id: I1b30f5ac106759873cd0a14b6340b49232f5106c
Signed-off-by: Yifeng Zhao <zyf@rock-chips.com>
2018-06-14 09:31:39 +08:00
Dingqiang Lin
f199655beb drivers: rkflash: add rk_sftl_arm_v7_thumb version
1.Add sftl thumb instruction version lib;
2.Add sftl release data.

Change-Id: I5fa09ada94e7f40a317ca621c3eb1c0abd73847d
Signed-off-by: Dingqiang Lin <jon.lin@rock-chips.com>
2018-06-14 09:12:09 +08:00
Dingqiang Lin
ec4385752a drivers: rkflash: remove unused codes
Change-Id: I8938236dfd952342e20ed690bc9b2f6c637027ac
Signed-off-by: Dingqiang Lin <jon.lin@rock-chips.com>
2018-06-13 19:31:18 +08:00
Dingqiang Lin
036e7e07a4 arm64: dts: rockchip: add sfc node for rk3308
Change-Id: Ie45bd51d2f56d296a9eadd1dfea5d2a903f29e6c
Signed-off-by: Dingqiang Lin <jon.lin@rock-chips.com>
2018-06-13 19:26:12 +08:00
Putin Lee
2ed5e10116 video/rockchip: rga2: Fixup some situation rga will flush null page.
Change-Id: Ie803779eced9524baedf2941d771c9c46edd5a77
Signed-off-by: Putin Lee <putin.li@rock-chips.com>
2018-06-13 18:22:23 +08:00
Lihuang
327aa30609 video/rockchip: rga2: Fixup rga2 flush timeout on rk3368.
Change-Id: Ia3c1c83d51c70f9d981bb45dc5c6a8c5e8073995
Signed-off-by: Li Huang <putin.li@rock-chips.com>
2018-06-13 18:21:05 +08:00
Wyon Bi
188c59dc60 drm/rockchip: dsi: enable interrupt function
Change-Id: I5003056c1b7244407310353547f065b13433f3d7
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
2018-06-13 15:24:41 +08:00
Wyon Bi
1df398e95a drm/rockchip: dsi: fix phy power-on sequence
Change-Id: I0ceaedb71776747e8951a75409bcc2521252dd18
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
2018-06-13 15:24:41 +08:00
Wyon Bi
2c659c75a6 drm/rockchip: dsi: export vendor-specific interface
Change-Id: I8156943179589b7edfeaa486322dfd057d470dea
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
2018-06-13 15:24:41 +08:00
Wyon Bi
6d5ebad604 drm/rockchip: dsi: fix loader protect for dual-channel mode
Change-Id: I2d5111269393b1eb77f9fccfa28b20fe366ad7d6
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
2018-06-13 15:24:41 +08:00
Wyon Bi
1e23e1d9ff drm/rockchip: dsi: implement runtime pm to dynamically manage the clock
Change-Id: I7ac757a04b51dded41a9c3f6697bb9390e0e2e5e
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
2018-06-13 15:24:41 +08:00
Wyon Bi
3624c3c987 arm: dts: rockchip: rk3288-th804: Update display clock frequency for panel
Target pixel clock rate for refresh rate @60 Hz
        = (1600 + 35 + 110 + 15) * (2560 + 8 + 12 + 4) * 60
	= 272870400 Hz ~ 272 MHz

Change-Id: Icc26ff98a2d98bdde5093db3dd211846e812069d
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
2018-06-13 14:20:50 +08:00
Finley Xiao
37ee7da560 arm64: dts: rockchip: rk3308: Add cpuinfo device node
Change-Id: If91b4a3945a368ad50914cb0fd0cfce41600d514
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
2018-06-13 14:16:35 +08:00
Finley Xiao
9c203c967a arm64: dts: rockchip: rk3308: Add support to get cpu leakage
Change-Id: I55252c38a349b63bcc893dc913cb43c445bf8c94
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
2018-06-13 14:16:35 +08:00
Finley Xiao
46e31d30f5 arm64: dts: rockchip: rk3308: Add otp device node
Change-Id: Ieceb70736c174410869180e6cf6307715619e8c9
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
2018-06-13 14:16:35 +08:00
Finley Xiao
f5577b7361 nvmem: rockchip-otp: Add support for rk3308-otp
This adds the necessary data for handling efuse on the rk3308.

Change-Id: I0c986e632f8dcc27ac38a887df25241db4b9fa19
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
2018-06-13 14:16:35 +08:00
Finley Xiao
00de83def8 soc: rockchip: cpuinfo: Add ROCKCHIP_OTP dependency
Change-Id: Ifa72e4e977ab66ed6a5e0acbabcfe6f1f8dca6d3
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
2018-06-13 14:16:35 +08:00
Finley Xiao
0c68c12026 nvmem: rockchip-otp: Reset opt phy before access otp
It would be more stable to reset phy before use user interface to
access otp.

Change-Id: Icd5660db15f6da7bad0ef8d01970f88aeca369a2
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
2018-06-13 14:16:35 +08:00
Finley Xiao
263dfde45f arm64: dts: rockchip: px30: Add resets property for otp
Change-Id: Iaba6d95674ae461e9ade4521e955869ff1dcc5c8
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
2018-06-13 14:16:35 +08:00
Zhou weixin
c2c106fc84 arm64: dts: rockchip: add power control for gt1x on px30/rk3326 evb
Change-Id: I40bae62b0d11a7947d6da02aad9c44cf411bb28f
Signed-off-by: Weixin Zhou <zwx@rock-chips.com>
2018-06-13 10:04:33 +08:00
Zhou weixin
420f585082 input: touchscreen: gt1x: fix i2c error when wakeup
Change-Id: I8575330a8f15573c6f11ddeaab1327382d302977
Signed-off-by: Weixin Zhou <zwx@rock-chips.com>
2018-06-13 09:38:24 +08:00
Tao Huang
69830ffc12 ARM: configs: add rk3308_linux_aarch32[_debug]_defconfig
Add two defconfig for rk3308 on ARM.
One for release and one for debug.

Change-Id: I4492f7e28d7e85b1ee139b15371127c9f17053d3
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
2018-06-13 09:01:54 +08:00
Meng Dongyang
c139ec131a UPSTREAM: usb: dwc3: gadget: cope with XferNotReady before usb_ep_queue()
If XferNotReady comes before usb_ep_queue() we will
set our PENDING request flag and wait for a
request. However, originally, we were assuming
usb_ep_queue() would always happen before our first
XferNotReady and that causes a corner case where we
could try to issue ENDTRANSFER command before
STARTTRANSFER.

Let's fix that by tracking endpoints which have been
started.

Change-Id: I8432a70fff0da1b4bc1ea7d86e13d491e89a05bb
Reported-by: Janusz Dziedzic <januszx.dziedzic@intel.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Signed-off-by: Meng Dongyang <daniel.meng@rock-chips.com>
(cherry picked from commit 6cb2e4e3de)
2018-06-12 15:49:56 +08:00
Meng Dongyang
4b36c00606 UPSTREAM: usb: dwc3: gadget: properly check ep cmd
The cmd argument we pass to
dwc3_send_gadget_ep_cmd() could contain extra
arguments embedded. When checking for StartTransfer
command, we need to make sure to match only lower 4
bits which contain the actual command and ignore the
rest.

Change-Id: I08056bf689f8a4ea1bcec242ffab296407d41bc8
Reported-by: Janusz Dziedzic <januszx.dziedzic@intel.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Signed-off-by: Meng Dongyang <daniel.meng@rock-chips.com>
(cherry picked from commit 5999914f22)
2018-06-12 15:49:56 +08:00
ayaka
9eca1c3e2d arm64: dts: rockchip: add support for rockpro64 board
PINE64 Rockpro 64 is a RK3399 development board, it
uses LPDDR4 memory.
http://wiki.pine64.org/index.php/ROCKPro64_Main_Page

CPU, GPU, memory, video codecs, audio codecs and HDMI
are verified and worked.

Change-Id: I6ac953eb6a8a217dc1049fe67752ed075c1a6485
Signed-off-by: ayaka <ayaka@soulik.info>
Signed-off-by: Randy Li <randy.li@rock-chips.com>
2018-06-12 15:48:09 +08:00
Randy Li
57bfc68e70 ARM: dts: rockchip: add serial Flash controller to rk3036
Serial Flash controller is used to control the data
transfer between this SoC and a serial nor or nand
flash device.

Change-Id: Ibe7c8c4a11410287c34c1a7dc5b232b330ee6751
Signed-off-by: Randy Li <randy.li@rock-chips.com>
2018-06-12 15:47:20 +08:00
Dingqiang Lin
b526c9acf3 Documentation: bindings: adjust rockchip nandc compatible naming
Change-Id: I675492b321f6c4a658f0bf40c39bc32d231a5698
Signed-off-by: Dingqiang Lin <jon.lin@rock-chips.com>
2018-06-12 15:46:49 +08:00
Dingqiang Lin
01faef723d drivers: rkflash: fix rkflash ftl error
1.Modify the incompatibility of FTL in kernel 4.4;
2.Add arm v7 sftl lib and arm v8 sftl lib
3.Unified naming format and variable with code in u-boot

Change-Id: I43ec418bb278fc3590fcb73d50ae6f6c9281ecfa
Signed-off-by: Dingqiang Lin <jon.lin@rock-chips.com>
2018-06-12 15:46:32 +08:00
Liang Chen
47e4722af1 arm: dts: adjust opp-table by leakage for rk322x SoCs
Change-Id: Id24f82d037866502596a74f16ee5e414bc64256a
Signed-off-by: Liang Chen <cl@rock-chips.com>
2018-06-12 15:27:02 +08:00
Sugar Zhang
e959f14c5c arm64: dts: rockchip: rk3308-evb-dmic-i2s-v11: enable 6mic + 2loopback
Change-Id: I8e07e546d1a47e7f5f66519662fe90737dda5232
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
2018-06-12 08:42:54 +08:00
Sugar Zhang
e66b0967dc arm64: dts: rockchip: rk3308-evb-dmic-pdm-*.dts: fix playback channel mapping
Change-Id: I28f073d9bfe92cf00b9883f7c02381ef97cd653b
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
2018-06-12 08:42:54 +08:00
Sugar Zhang
1bd65de695 ASoC: rockchip: multi_dais: fixup channel min/max
This patch limit the channel min/max according channel mapping.

Change-Id: Ia66c276e41d1c6b6f8c78c1c8db3c9087b8c9ca8
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
2018-06-12 08:42:54 +08:00
Sugar Zhang
eac82456bb ASoC: rockchip: multi_dais_pcm: drop dma chan if channel map is zero
Change-Id: I00606c0b5f57f6e3d10ab9c41fd51ce8f10e8b35
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
2018-06-12 08:42:54 +08:00
Meng Dongyang
576b831ae1 usb: gadget: uac: correct f_audio_source.c to remove warning
If the CONFIG_USB_CONFIGFS is not define, the 'audio_source_bind_config'
may be unused. Corrcet warning of no previous prototype for
'audio_source_bind_config' by adding judgment of CONFIG_USB_CONFIGFS
macro definition.

Change-Id: I174ae996c1d53e78b76f72cf463bc1efb189675b
Signed-off-by: Meng Dongyang <daniel.meng@rock-chips.com>
2018-06-11 18:18:33 +08:00
Meng Dongyang
cfb692c0ad usb: gadget: uac: stop sending audio when disconnect
The sending process may still work if disconnect from
PC, for the sending function is called in the complete
call back function. So set alt to 0 when disconnect or
reset, and stop follow-up sending in complete function
if alt is 0.

Change-Id: I073f122fe2ce2faf8cf6fb036fb983f9f3325f34
Signed-off-by: Meng Dongyang <daniel.meng@rock-chips.com>
2018-06-11 18:18:27 +08:00
Meng Dongyang
d04e0d982b usb: gadget: uac: support 2 channel of audio source
This patch add support of 2 channel of uac, set min
channel number and max channel number to 2.

Change-Id: Ia3b45d3329ba6819339079b31ff42398464942b5
Signed-off-by: Meng Dongyang <daniel.meng@rock-chips.com>
2018-06-11 18:18:19 +08:00