Commit Graph

1171887 Commits

Author SHA1 Message Date
Konrad Dybcio
0332bd042e drm/msm/adreno: adreno_gpu: Don't set OPP scaling clock w/ GMU
Recently I contributed the switch to OPP API for all Adreno generations.
I did however also skip over the fact that GPUs with a GMU don't specify
a core clock of any kind in the GPU node. While that didn't break
anything, it did introduce unwanted spam in the dmesg:

adreno 5000000.gpu: error -ENOENT: _opp_set_clknames: Couldn't find clock with name: core_clk

Guard the entire logic so that it's not used with GMU-equipped GPUs.

Fixes: 9f251f9340 ("drm/msm/adreno: Use OPP for every GPU generation")
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/530347/
Link: https://lore.kernel.org/r/20230223-topic-gmuwrapper-v6-1-2034115bb60c@linaro.org
Signed-off-by: Rob Clark <robdclark@chromium.org>
2023-04-03 07:38:54 -07:00
Marek Vasut
3e66f493e1 dt-bindings: display: Start the info graphics with HS/VS change
The VS signal change is synchronized to HS signal change, start the
info graphics with that event, instead of having that event occur in
the middle of it.

Scope trace of DPI bus with HS/VS active HIGH looks as follows:
         ________________...__
VS...___/__         __        \______...
HS...___/  \_______/  \__...__/  \___...
        ^                        ^
	|                        |
        |    Used to start here -'
	|
	'--- Start info graphics here

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Sam Ravnborg <sam@ravnborg.org>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20230221200407.16531-1-marex@denx.de
2023-04-03 16:38:16 +02:00
Marek Vasut
2792aed16c drm/bridge: tc358767: Enable DSI burst mode, LPM, non-continuous clock
The TC358767/TC358867/TC9595 are capable of DSI burst mode, which
is more energy efficient than the non-burst modes. Make use of it.

The TC358767/TC358867/TC9595 are capable of DSI non-continuous clock,
since it sources the internal PLL clock from external clock source.
The DSI non-continuous clock further reduces power utilization.

The TC358767/TC358867/TC9595 may use DSI LPM for command transmissions,
make sure this is configured correctly in the DSI mode flags.

Signed-off-by: Marek Vasut <marex@denx.de>
Acked-by: Maxime Ripard <maxime@cerno.tech>
Link: https://patchwork.freedesktop.org/patch/msgid/20221016003632.406468-1-marex@denx.de
2023-04-03 16:38:16 +02:00
Lee Jones
75a252be27 drm/i915/display/intel_wm: Fix a little doc-rot in intel_update_watermarks()
Fixes the following W=1 kernel build warning(s):

 drivers/gpu/drm/i915/display/intel_wm.c:46: warning: Function parameter or member 'i915' not described in 'intel_update_watermarks'
 drivers/gpu/drm/i915/display/intel_wm.c:46: warning: Excess function parameter 'dev_priv' description in 'intel_update_watermarks'

Cc: Jani Nikula <jani.nikula@linux.intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
Cc: David Airlie <airlied@gmail.com>
Cc: Daniel Vetter <daniel@ffwll.ch>
Cc: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
Cc: intel-gfx@lists.freedesktop.org
Cc: dri-devel@lists.freedesktop.org
Signed-off-by: Lee Jones <lee@kernel.org>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230331092607.700644-20-lee@kernel.org
2023-04-03 16:01:02 +03:00
Lee Jones
63c154a044 drm/i915/display/intel_display_power: Fix incorrectly documented function __intel_display_power_put_async()
Fixes the following W=1 kernel build warning(s):

 drivers/gpu/drm/i915/display/intel_display_power.c:712: warning: expecting prototype for intel_display_power_put_async(). Prototype was for __intel_display_power_put_async() instead

Cc: Jani Nikula <jani.nikula@linux.intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
Cc: David Airlie <airlied@gmail.com>
Cc: Daniel Vetter <daniel@ffwll.ch>
Cc: Imre Deak <imre.deak@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Cc: dri-devel@lists.freedesktop.org
Signed-off-by: Lee Jones <lee@kernel.org>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230331092607.700644-18-lee@kernel.org
2023-04-03 16:00:55 +03:00
Lee Jones
98a07b82d8 drm/i915/display/intel_display_debugfs: Fix incorrect param naming for 'intel_connector'
Fixes the following W=1 kernel build warning(s):

 drivers/gpu/drm/i915/display/intel_display_debugfs.c:1668: warning: Function parameter or member 'intel_connector' not described in 'intel_connector_debugfs_add'
 drivers/gpu/drm/i915/display/intel_display_debugfs.c:1668: warning: Excess function parameter 'connector' description in 'intel_connector_debugfs_add'

Cc: Jani Nikula <jani.nikula@linux.intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
Cc: David Airlie <airlied@gmail.com>
Cc: Daniel Vetter <daniel@ffwll.ch>
Cc: intel-gfx@lists.freedesktop.org
Cc: dri-devel@lists.freedesktop.org
Signed-off-by: Lee Jones <lee@kernel.org>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230331092607.700644-5-lee@kernel.org
2023-04-03 16:00:26 +03:00
Simon Ser
41068c8b28 drm/vram-helper: turn on PRIME import/export
We don't populate drm_driver.gem_prime_import_sg_table so only
DMA-BUFs exported from our own device can be imported. We don't
populate drm_gem_object_funcs.get_sg_table so DMA-BUFs cannot be
imported into another device. Still, this is useful to user-space
to share buffers between processes and between API boundaries
(e.g. wlroots hard-requires PRIME import/export support).

v2: expand commit message

Signed-off-by: Simon Ser <contact@emersion.fr>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Cc: Tian Tao <tiantao6@hisilicon.com>
Cc: Maxime Ripard <maxime@cerno.tech>
Cc: Hans de Goede <hdegoede@redhat.com>
Acked-by: Thomas Zimmermann <tzimmermann@suse.de>
Reviewed-by: Christian König <christian.koenig@amd.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230302143502.500661-2-contact@emersion.fr
2023-04-03 14:31:24 +02:00
Simon Ser
207395da5a drm/prime: reject DMA-BUF attach when get_sg_table is missing
drm_gem_map_dma_buf() requires drm_gem_object_funcs.get_sg_table
to be implemented, or else WARNs.

Allow drivers to leave this hook unimplemented to implement purely
local DMA-BUFs (ie, DMA-BUFs which cannot be imported anywhere
else but the device which allocated them). In that case, reject
imports to other devices in drm_gem_map_attach().

v2: new patch

v3: use ENOSYS

Signed-off-by: Simon Ser <contact@emersion.fr>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Cc: Tian Tao <tiantao6@hisilicon.com>
Cc: Maxime Ripard <maxime@cerno.tech>
Cc: Hans de Goede <hdegoede@redhat.com>
Acked-by: Thomas Zimmermann <tzimmermann@suse.de>
Reviewed-by: Christian König <christian.koenig@amd.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230302143502.500661-1-contact@emersion.fr
2023-04-03 14:31:24 +02:00
Francesco Dolcini
f435b7ef3b drm/bridge: lt8912b: Fix DSI Video Mode
LT8912 DSI port supports only Non-Burst mode video operation with Sync
Events and continuous clock on clock lane, correct dsi mode flags
according to that removing MIPI_DSI_MODE_VIDEO_BURST flag.

Cc: <stable@vger.kernel.org>
Fixes: 30e2ae943c ("drm/bridge: Introduce LT8912B DSI to HDMI bridge")
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Reviewed-by: Robert Foss <rfoss@kernel.org>
Signed-off-by: Robert Foss <rfoss@kernel.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20230330093131.424828-1-francesco@dolcini.it
2023-04-03 14:29:28 +02:00
Imre Deak
0f752b2178 drm/i915: Remove the encoder update_prepare()/complete() hooks
The encoder update_prepare()/complete() hooks were added to hold a
TC port link reference for all outputs in the atomic state around the
whole modeset enable sequence - thus locking the ports' TC mode - and
set the TBT/DP-alt PLL type corresponding to the current TC mode.

Since nothing depends on the PLL selection before/after then encoder's
pre_pll_enable/post_pll_disable hooks are called, the above steps can be
moved to these hooks, so do that and remove the
update_prepare()/complete() hooks.

Reviewed-by: Mika Kahola <mika.kahola@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230323142035.1432621-30-imre.deak@intel.com
2023-04-03 11:35:32 +03:00
Imre Deak
450c27fc9e drm/i915: Remove TC PHY disconnect workaround
After the previous patch the workaround for a TC PHY hang issue is not
required any more, remove it.

Reviewed-by: Mika Kahola <mika.kahola@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230323142035.1432621-29-imre.deak@intel.com
2023-04-03 11:35:32 +03:00
Imre Deak
b108bdd0e2 drm/i915: Disable DPLLs before disconnecting the TC PHY
Bspec requires disabling the DPLLs on TC ports before disconnecting the
port's PHY. Add a post_pll_disable encoder hook and move the call to
disconnect the port's PHY from the post_disable hook to the new hook.

Reviewed-by: Mika Kahola <mika.kahola@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230323142035.1432621-28-imre.deak@intel.com
2023-04-03 11:35:31 +03:00
Imre Deak
3acac2d06a drm/i915: Move shared DPLL disabling into CRTC disable hook
The spec requires disabling the PLL on TC ports before disconnecting the
port's PHY. Prepare for that by moving the PLL disabling to the CRTC
disable hook, while disconnecting the PHY will be moved to the
post_pll_disable() encoder hook in the next patch.

v2: Move the call from intel_crtc_disable_noatomic() as well.

Reviewed-by: Mika Kahola <mika.kahola@intel.com> # v1
Signed-off-by: Imre Deak <imre.deak@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230323142035.1432621-27-imre.deak@intel.com
2023-04-03 11:35:31 +03:00
Imre Deak
9796a5b272 drm/i915/adlp/tc: Align the connect/disconnect PHY sequence with bspec
Bspec has updated the TC connect/disconnect sequences, add the required
platform hooks for these.

The difference wrt. the old sequence is the order of taking the PHY
ownership - while holding a port power reference this requires - and
blocking the TC-cold power state.

Bspec: 49294

Reviewed-by: Mika Kahola <mika.kahola@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230323142035.1432621-26-imre.deak@intel.com
2023-04-03 11:35:31 +03:00
Imre Deak
ebcabb8b15 drm/i915/tc: Don't connect the PHY in intel_tc_port_connected()
Connecting the PHY for connector probing - also blocking TC-cold - isn't
required and has some overhead. Taking only the mutex is sufficient, so
do that.

Reviewed-by: Mika Kahola <mika.kahola@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230323142035.1432621-25-imre.deak@intel.com
2023-04-03 11:35:31 +03:00
Imre Deak
8979918af7 drm/i915/tc: Get power ref for reading the HPD live status register
Enable the power required for the HPD live status register access
instead of depending on the caller blocking the TC-cold power state
(during HW readout and connector probing).

A follow up patch will remove connecting/disconnecting the PHY around
connector probing, so querying the HPD status can happen in this case
without TC-cold being blocked.

Reviewed-by: Mika Kahola <mika.kahola@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230323142035.1432621-24-imre.deak@intel.com
2023-04-03 11:35:31 +03:00
Imre Deak
825535f44f drm/i915/adlp/tc: Use the DE HPD ISR register for hotplug detection
The spec says to use the CPU ISR registers for DP-alt/TBT HPD detection
on ADLP, so do that instead of using the related IOM/TCSS registers.

Bspec: 55480, 55482, 49212, 49305

Reviewed-by: Mika Kahola <mika.kahola@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230323142035.1432621-23-imre.deak@intel.com
2023-04-03 11:35:31 +03:00
Imre Deak
c55b73f391 drm/i915/tc: Add TC PHY hook to init the PHY
Add a hook for platform specific PHY initialization. Move the detection
of modular FIAs to the TGL handler, skipping this on ADLP+ where the
FIAs are always modular, not requiring a detection.

Reviewed-by: Mika Kahola <mika.kahola@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230323142035.1432621-22-imre.deak@intel.com
2023-04-03 11:35:31 +03:00
Imre Deak
7e69654635 drm/i915/tc: Add asserts in TC PHY hooks that the required power is on
Add an assert to each TC PHY hook that their required power domain is
enabled.

While at it add a comment describing the domains used on each platform
and TC mode.

v2: Fix non kernel-doc multiline comments. (Jani)

Cc: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Mika Kahola <mika.kahola@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230323142035.1432621-21-imre.deak@intel.com
2023-04-03 11:35:31 +03:00
Imre Deak
16cf693e31 drm/i915/tc: Add TC PHY hook to get the TC-cold blocking power domain
Instead of the corresponding if ladder, add a TC PHY hook to get the
platform and TC mode specific power domain used for blocking the TC-cold
power state.

Reviewed-by: Mika Kahola <mika.kahola@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230323142035.1432621-20-imre.deak@intel.com
2023-04-03 11:35:31 +03:00
Imre Deak
bc5f983a3d drm/i915/tc: Drop tc_cold_block()/unblock()'s power domain parameter
Simplify tc_cold_block()/unblock() by dropping their power domain
parameter. The power domain depends on the current TC mode, which -
after the previous patch - can't change while the PHY is connected,
holding a TC-cold-off power domain reference. Based on this the domain
can be deducted from the current TC mode instead of having to pass this
as a parameter.

Blocking TC-cold for the PHY HW readout happens before the current TC
mode is determined, so here the initial power domain must be still
manually passed.

For debugging still keep track of the domain used for tc_cold_block()
and verify that it remained the same until tc_cold_unblock().

While at it rename tc_cold_get_power_domain() to
tc_phy_cold_off_domain(), reflecting the name of platform specific hook
added in the next patch.

Reviewed-by: Mika Kahola <mika.kahola@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230323142035.1432621-19-imre.deak@intel.com
2023-04-03 11:35:31 +03:00
Imre Deak
430ce0c7d3 drm/i915/tc: Remove redundant wakeref=0 check from unblock_tc_cold()
After the previous patch unblock_tc_cold() will not be called in a
disconnected mode, so the wakeref passed to it will be always non-zero.
Remove the redundant check.

Reviewed-by: Mika Kahola <mika.kahola@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230323142035.1432621-18-imre.deak@intel.com
2023-04-03 11:35:31 +03:00
Imre Deak
976a368b71 drm/i915/tc: Block/unblock TC-cold in the PHY connect/disconnect hooks
Move blocking/unblocking the TC-cold power state to the platform
specific PHY connect / disconnect hooks. This allows for adjusting the
connect/disconnect sequence as required for each platform.

Reviewed-by: Mika Kahola <mika.kahola@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230323142035.1432621-17-imre.deak@intel.com
2023-04-03 11:35:31 +03:00
Imre Deak
e0b1ef58d9 drm/i915/tc: Check TC mode instead of the VBT legacy flag
After the previous patch the TC mode in the connect/disconnect functions
is always in sync with the VBT legacy port flag, so for consistency with
the rest of the function check the TC mode instead of the VBT flag.

Reviewed-by: Mika Kahola <mika.kahola@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230323142035.1432621-16-imre.deak@intel.com
2023-04-03 11:35:31 +03:00
Imre Deak
3b7d566370 drm/i915/tc: Fix up the legacy VBT flag only in disconnected mode
A follow-up patch simplifies the tc_cold_block()/unblock() functions,
dropping the power domain parameter. For this it must be ensured that
the power domain - which depends on the actual TC mode and so the VBT
legacy port flag - can't change while the PHY is in a connected state
and accordingly TC-cold is blocked. Make this so, by fixing up the VBT
legacy flag only in the disconnected TC mode, instead of whenever the
HPD state is retrieved.

Reviewed-by: Mika Kahola <mika.kahola@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230323142035.1432621-15-imre.deak@intel.com
2023-04-03 11:35:30 +03:00
Imre Deak
bd0fdd31c1 drm/i915/tc: Add TC PHY hooks to connect/disconnect the PHY
Add TC PHY hooks to connect/disconnect the PHY. A follow-up patch will
add the ADLP specific hooks for these.

Reviewed-by: Mika Kahola <mika.kahola@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230323142035.1432621-14-imre.deak@intel.com
2023-04-03 11:35:30 +03:00
Imre Deak
712f422ed7 drm/i915/tc: Factor out tc_phy_verify_legacy_or_dp_alt_mode()
Factor out a function verifying the PHY connected state in legacy or
DP-alt mode. This is common to all platforms, which can be reused in
platform specific connect hooks added in follow-up patches.

No functional changes.

Reviewed-by: Mika Kahola <mika.kahola@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230323142035.1432621-13-imre.deak@intel.com
2023-04-03 11:35:30 +03:00
Imre Deak
d1fc4e391f drm/i915/tc: Add generic TC PHY connect/disconnect handlers
Add generic handlers to connect/disconnect a PHY.

Setting the TC mode to the target mode deducted from the HPD state and -
if connecting to this mode fails - falling back to connecting to the
default (TBT) mode are common to all platforms; move the logic for this
from the ICL specific connect / disconnect handlers to the generic ones.

Reviewed-by: Mika Kahola <mika.kahola@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230323142035.1432621-12-imre.deak@intel.com
2023-04-03 11:35:30 +03:00
Imre Deak
ab639f326e drm/i915/tc: Add TC PHY hook to read out the PHY HW state
Add a TC PHY hook to read out the PHY HW state on each platform, move
the common parts to the generic helper.

Reviewed-by: Mika Kahola <mika.kahola@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230323142035.1432621-11-imre.deak@intel.com
2023-04-03 11:35:30 +03:00
Imre Deak
87107261bb drm/i915/tc: Add TC PHY hooks to get the PHY ready/owned state
Add TC PHY hooks to get the PHY ready/owned state on each platform,
replacing the corresponding if ladder.

Reviewed-by: Mika Kahola <mika.kahola@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230323142035.1432621-10-imre.deak@intel.com
2023-04-03 11:35:30 +03:00
Imre Deak
34a658b7e7 drm/i915/tc: Add TC PHY hook to get the PHY HPD live status
Add a table of TC PHY hooks which can be used to call platform specific
TC PHY handlers, replacing the corresponding if ladders.

Add the hook to retrieve the PHY's HPD live status. Move the common part
fixing up the VBT legacy port flag to the generic helper.

Reviewed-by: Mika Kahola <mika.kahola@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230323142035.1432621-9-imre.deak@intel.com
2023-04-03 11:35:30 +03:00
Imre Deak
c587999964 drm/i915/tc: Move the intel_tc_port struct declaration to intel_tc.c
Move the intel_tc_port struct to intel_tc.c for better isolation. This
requires allocating the struct dynamically.

Reviewed-by: Mika Kahola <mika.kahola@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230323142035.1432621-8-imre.deak@intel.com
2023-04-03 11:35:30 +03:00
Imre Deak
711762415d drm/i915/tc: Check for TC PHY explicitly in intel_tc_port_fia_max_lane_count()
Check explicitly if the port passed to
intel_tc_port_fia_max_lane_count() has a TC PHY, instead of relying on
the default TC mode value set for non-TC PHY ports.

Reviewed-by: Mika Kahola <mika.kahola@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230323142035.1432621-7-imre.deak@intel.com
2023-04-03 11:35:30 +03:00
Imre Deak
3eafcddf76 drm/i915/tc: Move TC port fields to a new intel_tc_port struct
Move the TC port specific fields from intel_digital_port to a new
intel_tc_port struct. Pass an intel_tc_port pointer to all static
functions in intel_tc.c keeping dig_port accessible for these via a
pointer stored in the new struct.

The next patch will allocate the intel_tc_port dynamically, allowing
moving the struct definition to intel_tc.c.

Reviewed-by: Mika Kahola <mika.kahola@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230323142035.1432621-6-imre.deak@intel.com
2023-04-03 11:35:30 +03:00
Imre Deak
39feb7b16b drm/i915/tc: Use the tc_phy prefix for all TC PHY functions
For consistency use the tc_phy prefix for all TC PHY functions.

Reviewed-by: Mika Kahola <mika.kahola@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230323142035.1432621-5-imre.deak@intel.com
2023-04-03 11:35:30 +03:00
Imre Deak
89b154091a drm/i915/tc: Rename tc_phy_status_complete() to tc_phy_is_ready()
For consistency rename tc_phy_status_complete() to tc_phy_is_ready()
following the terminology of new platforms.

Reviewed-by: Mika Kahola <mika.kahola@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230323142035.1432621-4-imre.deak@intel.com
2023-04-03 11:35:30 +03:00
Imre Deak
359d36e67d drm/i915/tc: Use the adlp prefix for ADLP TC PHY functions
Use the usual adlp prefix for all ADLP specific TC PHY functions. Other
ADL platforms don't support TC.

Reviewed-by: Mika Kahola <mika.kahola@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230323142035.1432621-3-imre.deak@intel.com
2023-04-03 11:35:30 +03:00
Imre Deak
a33c8f71d3 drm/i915/tc: Group the TC PHY setup/query functions per platform
Arrange the TC PHY HW state setup/query functions into platform
specific and generic groups. This prepares for upcoming patches adding
generic TC PHY handlers and platform specific hooks for these,
replacing the corresponding if ladders.

No functional changes.

v2: Fix non kernel-doc multiline comments. (Jani)

Cc: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Mika Kahola <mika.kahola@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230323142035.1432621-2-imre.deak@intel.com
2023-04-03 11:35:29 +03:00
Daniel Vetter
1138398d71 Merge tag 'amd-drm-next-6.4-2023-03-31' of https://gitlab.freedesktop.org/agd5f/linux into drm-next
amd-drm-next-6.4-2023-03-31:

amdgpu:
- Misc code cleanups
- S4 fixes
- MES fixes
- SR-IOV fixes
- Link DC backlight to connector device rather than PCI device
- W=1 fixes
- ASPM quirk
- RAS fixes
- DC dynamic split fixes and enablement for remaining chips
- Navi1x SMU fix
- Initial NBIO 7.9 support
- Initial GC 9.4.3 support
- Initial GFXHUB 1.2 support
- Initial MMHUB 1.8 support
- DCN 3.1.5 fixes
- Initial DC FAMs infrastructure
- Add support for 6.75Gbps link rates
- Add sysfs nodes for secondary VCN clocks

amdkfd:
- Initial support for GC 9.4.3

radeon:
- Convert to client-based fbdev emulation

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
From: Alex Deucher <alexander.deucher@amd.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230331221955.7896-1-alexander.deucher@amd.com
2023-04-03 10:25:45 +02:00
Daniel Vetter
63758fec65 Merge tag 'drm-misc-next-2023-03-31' of git://anongit.freedesktop.org/drm/drm-misc into drm-next
drm-misc-next for v6.4-rc1:

Cross-subsystem Changes:
- DT bindings update for adding Mali MT81xx devices.
- Assorted DT binding updates.

Core Changes:
- Documentation update to scheduler.

Driver Changes:
- Add support for the same mali devices.
- Add support for speed binning to panfrost.
- Add B133UAN01.0 eDP panel.
- Assorted small fixes to bridge/ps8640, bridge/it6505, panel/magnachip.
- Use of_property_read_bool in ps8622 and ofdrm.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
From: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/36f4efa4-26e9-49df-287e-d193422c990d@linux.intel.com
2023-04-03 09:20:51 +02:00
Swati Sharma
d4d17377e0 drm/i915/dsc: Add debugfs entry to validate DSC output formats
DSC_Output_Format_Sink_Support entry is added to i915_dsc_fec_support_show
to depict if sink supports DSC output formats (RGB/YCbCr420/YCbCr444).
Also, new debugfs entry is created to enforce output format. This is
required because of our driver policy. For ex. if a mode is supported
in both RGB and YCbCr420 output formats by the sink, our policy is to
try RGB first and fall back to YCbCr420, if mode cannot be shown
using RGB. So, to test other output formats like YCbCr420 or YCbCr444,
we need a debugfs entry (force_dsc_output_format) to force this
output format.

v2: -Func name changed to intel_output_format_name() (Jani N)
    -Return forced o/p format from intel_dp_output_format() (Jani N)
v3: -output_format_str[] to remain static (Jani N)

Signed-off-by: Swati Sharma <swati2.sharma@intel.com>
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
Signed-off-by: Uma Shankar <uma.shankar@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230309062855.393087-8-suraj.kandpal@intel.com
2023-04-03 12:41:13 +05:30
Suraj Kandpal
16e7a0db6e drm/i915/vdsc: Check slice design requirement
Add function to check if slice design requirements are being
met as defined in Bspec: 49259 in the section
Slice Design Requirement

--v7
-remove full bspec link [Jani]
-rename intel_dsc_check_slice_design_req to
intel_dsc_slice_dimensions_valid [Jani]

--v8
-fix condition to check if slice width and height are
of two
-fix minimum pixel in slice condition

--v10
-condition should be < rather then >= [Uma]

Cc: Uma Shankar <uma.shankar@intel.com>
Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
Signed-off-by: Uma Shankar <uma.shankar@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230309062855.393087-7-suraj.kandpal@intel.com
2023-04-03 12:41:12 +05:30
Suraj Kandpal
9aeabe1988 drm/i915/dsc: Fill in native_420 field
Now that we have laid the groundwork for YUV420 Enablement
we fill up native_420 field in vdsc_cfg and add appropriate
checks wherever required.

---v2
-adding native_422 field as 0 [Vandita]
-filling in second_line_bpg_offset, second_line_offset_adj
and nsl_bpg_offset in vds_cfg when native_420 is true

---v3
-adding display version check to solve igt issue

--v7
-remove is_pipe_dsc check as its always true for D14 [Jani]

--v10
-keep sink capability check [Jani]
-move from !(x == y  || w == z) to x !=y && w != z [Jani]

--v11
-avoid native_420 computation if not gen14 [Uma]

--v12
-fix state mismatch issue of compressed_bpp

Cc: Uma Shankar <uma.shankar@intel.com>
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
Signed-off-by: Uma Shankar <uma.shankar@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230309062855.393087-6-suraj.kandpal@intel.com
2023-04-03 12:41:11 +05:30
Suraj Kandpal
dd4d6791eb drm/i915/dsc: Enable YCbCr420 for VDSC
Implementation of VDSC for YCbCr420.
Add QP tables for 8,10,12 BPC from rc_tables.h in intel_qp_tables.c
(Derived from C-Model, which is given along with DSC1.2a Spec from Vesa)
intel_lookup_range_min/max_qp functons need to take into account the
output format. Based on that appropriate qp table need to be chosen.
Other rc_parameters need to be set where currently values for 444 format
is hardcoded in calculate_rc_parameters( ).
vdsc_cfg struct needs to be filled with output format information, where
these are hardcoded for 444 format.
Bspec: 49259

Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
Reviewed-by: Vandita Kulkarni <Vandita.kulkarni@intel.com>
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
Signed-off-by: Uma Shankar <uma.shankar@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230309062855.393087-5-suraj.kandpal@intel.com
2023-04-03 12:41:11 +05:30
Suraj Kandpal
ac754358c6 drm/i915/dsc: Adding the new registers for DSC
Adding new DSC register which are introducted MTL onwards

Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
Reviewed-by: Vandita Kulkarni <Vandita.kulkarni@intel.com>
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
Signed-off-by: Uma Shankar <uma.shankar@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230309062855.393087-4-suraj.kandpal@intel.com
2023-04-03 12:41:10 +05:30
Ankit Nautiyal
5011f2915b drm/i915/dp: Check if DSC supports the given output_format
Go with DSC only if the given output_format is supported.

v2: Use drm helper to get DSC format support for sink.

v3: remove drm_dp_dsc_compute_bpp.

Cc: Uma Shankar <uma.shankar@intel.com>
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
Signed-off-by: Uma Shankar <uma.shankar@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230309062855.393087-3-suraj.kandpal@intel.com
2023-04-03 12:41:10 +05:30
Ankit Nautiyal
a389789c0a drm/dp_helper: Add helper to check DSC support with given o/p format
Add helper to check if the DP sink supports DSC with the given
o/p format.

v2: Add documentation for the helper. (Uma Shankar)

v3: /** instead of  /* (Uma Shankar)

Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
Signed-off-by: Uma Shankar <uma.shankar@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230309062855.393087-2-suraj.kandpal@intel.com
2023-04-03 12:41:09 +05:30
Nancy.Lin
d6dc3cdcc8 drm/mediatek: Add ovl_adaptor get format function
1. Add ovl_adaptor get_format and get_num_formats component function.
The two functions are needed for getting the supported format in
mtk_plane_init().
2. Get supported format from the ovl_adaptor's rdma engine - mdp_rdma.

Signed-off-by: Nancy.Lin <nancy.lin@mediatek.com>
Link: https://patchwork.kernel.org/project/linux-mediatek/patch/20230330032614.18837-3-nancy.lin@mediatek.com/
Signed-off-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
2023-04-03 03:06:01 +00:00
Nancy.Lin
df4752441d drm/mediatek: Add mdp_rdma get format function
Add mdp_rdma get_format and get_num_formats function.

Signed-off-by: Nancy.Lin <nancy.lin@mediatek.com>
Link: https://patchwork.kernel.org/project/linux-mediatek/patch/20230330032614.18837-2-nancy.lin@mediatek.com/
Signed-off-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
2023-04-03 03:02:29 +00:00
Erico Nunes
4a66f3da99 drm/lima: add show_fdinfo for drm usage stats
This exposes an accumulated active time per client via the fdinfo
infrastructure per execution engine, following
Documentation/gpu/drm-usage-stats.rst.
In lima, the exposed execution engines are gp and pp.

Signed-off-by: Erico Nunes <nunes.erico@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230312233052.21095-4-nunes.erico@gmail.com
2023-04-02 18:18:37 +08:00