arm64: tegra: Device tree changes for v5.3-rc1
This contains the bulk of the Tegra changes this cycle. It has a bunch
of improvements across almost all boards. These are mostly small and not
too exciting additions.
Most notably perhaps is the continuation of Jetson Nano support, which
is now mostly on feature parity with Jetson TX1.
* tag 'tegra-for-5.3-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: (28 commits)
arm64: tegra: Enable PCIe slots in P2972-0000 board
arm64: tegra: Add P2U and PCIe controller nodes to Tegra194 DT
arm64: tegra: Add PEX DPD states as pinctrl properties
arm64: tegra: Enable ACONNECT, ADMA and AGIC
arm64: tegra: Add ACONNECT, ADMA and AGIC nodes
arm64: tegra: Sort device tree nodes alphabetically
arm64: tegra: Fix Jetson Nano GPU regulator
arm64: tegra: Update Jetson TX1 GPU regulator timings
arm64: tegra: Fix AGIC register range
arm64: tegra: Add INA3221 channel info for Jetson TX2
arm64: tegra: Enable PWM on Jetson Nano
arm64: tegra: Enable CPU sleep on Jetson Nano
arm64: tegra: Add ID EEPROMs on Jetson Nano
arm64: tegra: Add ID EEPROM for Jetson TX2 Developer Kit
arm64: tegra: Add ID EEPROM for Jetson TX2 module
arm64: tegra: Add ID EEPROM for Jetson TX1 Developer Kit
arm64: tegra: Add ID EEPROM for Jetson TX1 module
arm64: tegra: Don't use architected timer for suspend on Tegra210
arm64: tegra: Mark architected timer as always on
arm64: tegra: Add pin control states for I2C on Tegra186
...
Signed-off-by: Olof Johansson <olof@lixom.net>
STM32 DT updates for v5.3, round 1
Highlights:
----------
MPU part:
-Add stm32mp157a-avenger board support:
This board embeds a STM32MP157a SOC with AC package (TFBGA361, 148 ios)
, 1024MB of DDR3 and STPMIC1A pmic . Several connections are available on this boards:
2x Type A (USB 2.0) Host and 1x Micro B (USB 2.0) OTG, ethernet
10/100/1000, WiFi 5 GHz & 2.4GHz, ...
-Add STMFX support en stm32mp157c-ev1 and enable joystick connected on
it.
-Add I2S and SAI support on stm32mp157c.
-Add and enable support of Vivante GPU on stm32mp157 ED1 and DK1 boards
(EV1 and DK2 inherit of it).
-Add camera support:
-Add DCMI support on stm32mp157c SOC
-Enabled OV5640 camera support on stm32mp157c-ev1 board
-Enable hdmi bridge sii9022 & display controller on stm32mp157c-dk1
board.
MCU part:
-Add STMFX support en stm32746g-eval and enable connections on it:
leds and joystick
* tag 'stm32-dt-for-v5.3-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32: (27 commits)
ARM: dts: stm32: replace rgmii mode with rgmii-id on stm32mp15 boards
ARM: dts: stm32: Add Avenger96 devicetree support based on STM32MP157A
dt-bindings: arm: stm32: Document Avenger96 devicetree binding
dt-bindings: arm: stm32: Convert STM32 SoC bindings to DT schema
ARM: dts: stm32: Add missing pinctrl definitions for STM32MP157
ARM: dts: stm32: add sai id registers to stm32mp157c
ARM: dts: stm32: add power supply of rm68200 on stm32mp157c-ev1
ARM: dts: stm32: enable display on stm32mp157c-dk1 board
ARM: dts: stm32: Add I2C 1 config for stm32mp157a-dk1
ARM: dts: stm32: enable OV5640 camera on stm32mp157c-ev1 board
ARM: dts: stm32: add DCMI pins to stm32mp157c
ARM: dts: stm32: add DCMI camera interface support on stm32mp157c
ARM: dts: stm32: enable Vivante GPU support on stm32mp157a-dk1 board
ARM: dts: stm32: enable Vivante GPU support on stm32mp157c-ed1 board
ARM: dts: stm32: Add Vivante GPU support on STM32MP157c
ARM: dts: stm32: add i2s pins muxing on stm32mp157
ARM: dts: stm32: add i2s support on stm32mp157c
ARM: dts: stm32: add sai pins muxing on stm32mp157
ARM: dts: stm32: add sai support on stm32mp157c
ARM: dts: stm32: add jedec compatible for nor flash on stm32mp157c-ev1
...
Signed-off-by: Olof Johansson <olof@lixom.net>
The format of synthesized events is determined by the attribute config.
For the formats for Intel PT power and ptwrite events, create tables and
populate them when the synth_data handler is called. If the tables
remain empty, drop them at the end.
The tables and views, including a combined power_events_view, will
display automatically from the tables menu of the exported
exported-sql-viewer.py script.
Note, currently only Atoms since Gemini Lake have support for ptwrite
and mwait, pwre, exstop and pwrx, but all Intel PT implementations
support cbr.
Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Link: http://lkml.kernel.org/r/20190622093248.581-8-adrian.hunter@intel.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
The format of synthesized events is determined by the attribute config.
For the formats for Intel PT power and ptwrite events, create tables and
populate them when the synth_data handler is called. If the tables
remain empty, drop them at the end.
The tables and views, including a combined power_events_view, will
display automatically from the tables menu of the exported
exported-sql-viewer.py script.
Note, currently only Atoms since Gemini Lake have support for ptwrite
and mwait, pwre, exstop and pwrx, but all Intel PT implementations
support cbr.
Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Link: http://lkml.kernel.org/r/20190622093248.581-7-adrian.hunter@intel.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
The first core-to-bus ratio (CBR) event will not be shown if --itrace
's' option (skip initial number of events) is used, nor if time
intervals are specified that do not include the start of tracing. Change
the logic to record the last CBR value seen by the user, and synthesize
CBR events whenever that changes.
Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Link: http://lkml.kernel.org/r/20190622093248.581-5-adrian.hunter@intel.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
The core-to-bus ratio (CBR) provides the CPU frequency. With branches
enabled, the decoder was outputting CBR changes only when there was a
branch. That loses the correct time of the change if the trace is not in
context (e.g. not tracing kernel space). Change to output the CBR change
immediately.
Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Link: http://lkml.kernel.org/r/20190622093248.581-2-adrian.hunter@intel.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Attempting to profile 1024 or more CPUs with perf causes two errors:
perf record -a
[ perf record: Woken up X times to write data ]
way too many cpu caches..
[ perf record: Captured and wrote X MB perf.data (X samples) ]
perf report -C 1024
Error: failed to set cpu bitmap
Requested CPU 1024 too large. Consider raising MAX_NR_CPUS
Increasing MAX_NR_CPUS from 1024 to 2048 and redefining MAX_CACHES as
MAX_NR_CPUS * 4 returns normal functionality to perf:
perf record -a
[ perf record: Woken up X times to write data ]
[ perf record: Captured and wrote X MB perf.data (X samples) ]
perf report -C 1024
...
Signed-off-by: Kyle Meyer <kyle.meyer@hpe.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Link: http://lkml.kernel.org/r/20190620193630.154025-1-meyerk@stormcage.eag.rdlabs.hpecorp.net
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Commit f08046cb30 ("perf thread-stack: Represent jmps to the start of a
different symbol") had the side-effect of introducing more stack entries
before return from kernel space.
When user space is also traced, those entries are popped before entry to
user space, but when user space is not traced, they get stuck at the
bottom of the stack, making the stack grow progressively larger.
Fix by detecting a return-from-kernel branch type, and popping kernel
addresses from the stack then.
Note, the problem and fix affect the exported Call Graph / Tree but not
the callindent option used by "perf script --call-trace".
Example:
perf-with-kcore record example -e intel_pt//k -- ls
perf-with-kcore script example --itrace=bep -s ~/libexec/perf-core/scripts/python/export-to-sqlite.py example.db branches calls
~/libexec/perf-core/scripts/python/exported-sql-viewer.py example.db
Menu option: Reports -> Context-Sensitive Call Graph
Before: (showing Call Path column only)
Call Path
▶ perf
▼ ls
▼ 12111:12111
▶ setup_new_exec
▶ __task_pid_nr_ns
▶ perf_event_pid_type
▶ perf_event_comm_output
▶ perf_iterate_ctx
▶ perf_iterate_sb
▶ perf_event_comm
▶ __set_task_comm
▶ load_elf_binary
▶ search_binary_handler
▶ __do_execve_file.isra.41
▶ __x64_sys_execve
▶ do_syscall_64
▼ entry_SYSCALL_64_after_hwframe
▼ swapgs_restore_regs_and_return_to_usermode
▼ native_iret
▶ error_entry
▶ do_page_fault
▼ error_exit
▼ retint_user
▶ prepare_exit_to_usermode
▼ native_iret
▶ error_entry
▶ do_page_fault
▼ error_exit
▼ retint_user
▶ prepare_exit_to_usermode
▼ native_iret
▶ error_entry
▶ do_page_fault
▼ error_exit
▼ retint_user
▶ prepare_exit_to_usermode
▶ native_iret
After: (showing Call Path column only)
Call Path
▶ perf
▼ ls
▼ 12111:12111
▶ setup_new_exec
▶ __task_pid_nr_ns
▶ perf_event_pid_type
▶ perf_event_comm_output
▶ perf_iterate_ctx
▶ perf_iterate_sb
▶ perf_event_comm
▶ __set_task_comm
▶ load_elf_binary
▶ search_binary_handler
▶ __do_execve_file.isra.41
▶ __x64_sys_execve
▶ do_syscall_64
▶ entry_SYSCALL_64_after_hwframe
▶ page_fault
▼ entry_SYSCALL_64
▼ do_syscall_64
▶ __x64_sys_brk
▶ __x64_sys_access
▶ __x64_sys_openat
▶ __x64_sys_newfstat
▶ __x64_sys_mmap
▶ __x64_sys_close
▶ __x64_sys_read
▶ __x64_sys_mprotect
▶ __x64_sys_arch_prctl
▶ __x64_sys_munmap
▶ exit_to_usermode_loop
▶ __x64_sys_set_tid_address
▶ __x64_sys_set_robust_list
▶ __x64_sys_rt_sigaction
▶ __x64_sys_rt_sigprocmask
▶ __x64_sys_prlimit64
▶ __x64_sys_statfs
▶ __x64_sys_ioctl
▶ __x64_sys_getdents64
▶ __x64_sys_write
▶ __x64_sys_exit_group
Committer notes:
The first arg to the perf-with-kcore needs to be the same for the
'record' and 'script' lines, otherwise we'll record the perf.data file
and kcore_dir/ files in one directory ('example') to then try to use it
from the 'bep' directory, fix the instructions above it so that both use
'example'.
Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: stable@vger.kernel.org
Fixes: f08046cb30 ("perf thread-stack: Represent jmps to the start of a different symbol")
Link: http://lkml.kernel.org/r/20190619064429.14940-2-adrian.hunter@intel.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Change the include path so that progress.c can find cache.h since it was
previously searching in the wrong directory.
Committer notes:
$ ls -la tools/perf/ui/../cache.h
ls: cannot access 'tools/perf/ui/../cache.h': No such file or directory
So it really should include ../../util/cache.h, or plain cache.h, since
we have -Iutil in INC_FLAGS in tools/perf/Makefile.config
Signed-off-by: Numfor Mbiziwo-Tiapo <nums@google.com>
Cc: Jiri Olsa <jolsa@redhat.com>,
Cc: Luke Mujica <lukemujica@google.com>,
Cc: Stephane Eranian <eranian@google.com>
To: Ian Rogers <irogers@google.com>
Link: https://lkml.kernel.org/n/tip-pud8usyutvd2npg2vpsygncz@git.kernel.org
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
mvebu dt64 for 5.3 (part 1)
For Armada 7K/8K:
- enable AP806 thermal throttling with CPUfreq
- add missing #interrupt-cells property allowing configuring
interrupt for GPIO
On Armada 8040 based board:
- Fix PCI memory window on Mcbin board
- Set SFP power limit on clearfog GT board
- Disable AP I2C on Armada-8040-DB
On Armada 3720 based board espressobin correct the SPI node used for
NOR flash
On Armada 7040 DB board add USB current regulators
* tag 'mvebu-dt64-5.3-1' of git://git.infradead.org/linux-mvebu:
arm64: dts: marvell: add missing #interrupt-cells property
arm64: dts: marvell: armada-7040-db: Add USB current regulators
arm64: dts: armada-3720-espressobin: correct spi node
arm64: dts: marvell: Disable AP I2C on Armada-8040-DB
arm64: dts: marvell: Enable AP806 thermal throttling with CPUfreq
arm64: dts: marvell: Change core numbering in AP806 thermal-node
arm64: dts: marvell: clearfog-gt-8k: set SFP power limit
arm64: dts: marvell: mcbin: enlarge PCI memory window
Signed-off-by: Olof Johansson <olof@lixom.net>
mvebu dt for 5.3 (part 1)
Add LCD support on Netgear RN104
* tag 'mvebu-dt-5.3-1' of git://git.infradead.org/linux-mvebu:
ARM: dts: armada: netgear-rn104: Add LCD to RN104 dts.
Signed-off-by: Olof Johansson <olof@lixom.net>
Renesas ARM64 Based SoC DT Updates for v5.3
* Renesas SoCs
- Revise usb2_phy nodes and phys properties according to updated bindings
- Use ip=on for bootargs
* R-Car Gen 3 and RZ/G2M (r8a774a1) SoCs
- Add dynamic power coefficient
- Create thermal zone to support IPA
* R-Car E3 (r8a77990) and D3 (r8a77995) SoCs
- Point LVDS0 to its companion LVDS1
* R-Car E3 (r8a77990) SoC
- Corresct register range of DU
* R-Car E3 (r8a77990) based Ebisu board
- Remove renesas, no-ether-link property
* R-Car D3 (r8a77995) based Draak board:
- Remove unnecessary index from vin4 port
* RZ/G2M (r8a774a1) based HiHope main and sub-boards:
- Initial support
- Describe CPU capacity and topoligy
- Enable CMT, HDMI, LEDs, PCIe RWDT, SCIF, SDHI, TMU, and USB 2.0 and 3.0
* RZ/G2E (r8a774c0) SoC based EK874 board:
- Clean up CPU compatible strings
- Enable: Bluetooth, HDMI audio and video, TPU, USB 3.0 and WLAN
* tag 'renesas-arm64-dt-for-v5.3' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (53 commits)
arm64: dts: renesas: hihope-common: Remove "label" from LEDs
arm64: dts: renesas: hihope-common: Add HDMI support
arm64: dts: renesas: r8a774a1: Add HDMI encoder instance
arm64: dts: renesas: r8a774a1: Add dynamic power coefficient
arm64: dts: renesas: r8a774a1: Create thermal zone to support IPA
arm64: dts: renesas: r8a774a1: Add CPU capacity-dmips-mhz
arm64: dts: renesas: r8a774a1: Add CPU topology on r8a774a1 SoC
arm64: dts: renesas: hihope-common: Add LEDs support
arm64: dts: renesas: hihope-common: Enable USB3.0
arm64: dts: renesas: hihope-common: Add USB 2.0 support
arm64: dts: renesas: r8a774a1: Fix USB 2.0 clocks
arm64: dts: renesas: r8a774a1: Add TMU device nodes
arm64: dts: renesas: r8a774a1: Add CMT device nodes
arm64: dts: renesas: hihope-common: Add uSD and eMMC
arm64: dts: renesas: r8a77990: Fix register range of display node
arm64: dts: renesas: cat874: Enable usb role switch support
arm64: dts: renesas: cat874: Enable USB3.0 host/peripheral device node
arm64: dts: renesas: r8a7799[05]: Point LVDS0 to its companion LVDS1
arm64: dts: renesas: hihope-common: Add RWDT support
arm64: dts: renesas: hihope-rzg2-ex: Enable PCIe support
...
Signed-off-by: Olof Johansson <olof@lixom.net>
This time we only have a single patch for our command branch between
arm and arm64, a fix for the array syntax raised by our DT schemas.
* tag 'sunxi-h3-h5-for-5.3-201906210812' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
ARM: dts: sunxi: h3/h5: Fix GPIO regulator state array
Signed-off-by: Olof Johansson <olof@lixom.net>
Our usual bunch of arm64 DT changes, this time with:
- Some fixes for the DT schemas that were added during this release
- Wifi support for the H6
- LRADC suppport for the A64
- Some background work on A64 boards, to enable various devices such
as touchscreens, PMIC, audio, wifi, etc.
* tag 'sunxi-dt64-for-5.3-201906210808' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
arm64: dts: allwinner: h6: Add DMA node
arm64: dts: allwinner: a64: Add lradc node
dt-bindings: input: sun4i-lradc-keys: Add A64 compatible
arm64: dts: allwinner: h6: add r_watchog node
arm64: dts: allwinner: h6: add watchdog node
dt-bindings: watchdog: add Allwinner H6 watchdog
arm64: dts: allwinner: a64: Enable audio on Teres-I
arm64: dts: allwinner: a64: bananapi-m64: Enable PMIC USB power supply
arm64: dts: allwinner: axp803: add USB power supply node
arm64: dts: allwinner: a64: Add pinmux for RGB666 LCD
arm64: dts: allwinner: a64: orangepi-win: Add wifi and bluetooth nodes
arm64: dts: allwinner: h6: add PIO VCC bank supplies for Pine H64
arm64: dts: allwinner: a64-oceanic-5205-5inmfd: Enable GT911 CTP
arm64: dts: allwinner: a64-amarula-relic: Add GT5663 CTP node
arm64: dts: allwinner: a64: move I2C pinctrl to dtsi
Signed-off-by: Olof Johansson <olof@lixom.net>
This pull request adds CPUFreq support for DA850 boards in device-tree
boot using the generic CPUFREQ_DT driver.
* tag 'davinci-for-v5.3/dt' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci:
ARM: davinci_all_defconfig: Enable CPUFREQ_DT
ARM: dts: da850-evm: enable cpufreq
ARM: dts: da850-lcdk: enable cpufreq
ARM: dts: da850-lego-ev3: enable cpufreq
ARM: dts: da850: add cpu node and operating points to DT
Signed-off-by: Olof Johansson <olof@lixom.net>
ASPEED device tree updates for 5.3
We have various device tree updates from the OpenBMC project to enable
bits and pieces in existing systems, notably updates to Google's Zaius.
There are some AST2500 machines under development:
* Lenovo Hr630
* IBM Swift
* Facebook YAMP
And some AST2400 machines that have been around but out of tree and have
now joined the party:
* YADRO VESNIN
* Microsoft Olympus
* tag 'aspeed-5.3-devicetree' of git://git.kernel.org/pub/scm/linux/kernel/git/joel/aspeed:
ARM: dts: aspeed: Enable video engine on romulus and wtherspoon
ARM: dts: aspeed: Add Inspur fp5280g2 BMC machine
ARM: dts: aspeed: Add YADRO VESNIN BMC
ARM: dts: aspeed: Add Microsoft Olympus BMC
ARM: dts: aspeed: Adding Lenovo Hr630 BMC
ARM: dts: aspeed: Add Facebook YAMP BMC
ARM: dts: aspeed: swift: Add pca9539 devices
ARM: dts: aspeed: Add Swift BMC machine
ARM: dts: aspeed: cmm: enable ehci host controllers
ARM: dts: aspeed: zaius: fixed I2C bus numbers for pcie slots
ARM: dts: aspeed: zaius: update 12V brick I2C address
ARM: dts: aspeed: zaius: add Infineon and Intersil regulators
ARM: dts: aspeed: quanta-q71: Enable p2a node
ARM: dts: aspeed: Add aspeed-p2a-ctrl node
ARM: dts: aspeed: Add Power9 and Power9 CFAM description
ARM: dts: aspeed: Rename flash-controller nodes
Signed-off-by: Olof Johansson <olof@lixom.net>
Qualcomm Device Tree Changes for v5.3
* Add display support to MSM8974
* Add display, backlight, and touchscreen support to MSM8974 Hammerhead
* Update coresight bindings for MSM8974 and APQ8064
* tag 'qcom-dts-for-5.3' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux:
ARM: dts: qcom: msm8974-hammerhead: add support for display
ARM: dts: msm8974: add display support
ARM: dts: qcom: msm8974-hammerhead: add support for backlight
ARM: dts: qcom: msm8974-hammerhead: add touchscreen support
ARM: dts: qcom-msm8974: Update coresight DT bindings
ARM: dts: qcom-apq8064: Update coresight DT bindings
Signed-off-by: Olof Johansson <olof@lixom.net>
ARM: DT: Hisilicon ARM32 SoCs updates for v5.3
- Updated CoreSight funnel and replicator using new bindings to fix warning
for the hip04.
* tag 'hisi-arm32-dt-for-5.3' of git://github.com/hisilicon/linux-hisi:
ARM: dts: hip04: Update coresight DT bindings
Signed-off-by: Olof Johansson <olof@lixom.net>
ARM64: DT: Hisilicon SoCs DT updates for v5.3
* Hi3660 SoC and related boards:
- Added CoreSight trace components
* Hi6220 SoC and related boards:
- Updated CoreSight funnel and replicator using new bindings to fix warning
* tag 'hisi-arm64-dt-for-5.3' of git://github.com/hisilicon/linux-hisi:
arm64: dts: hi3660: Add CoreSight support
arm64: dts: hi6220: Update coresight DT bindings
Signed-off-by: Olof Johansson <olof@lixom.net>
i.MX fixes for 5.2, round 3:
- A recent testing by Sébastien discovers that the PWM interrupts of
i.MX6UL were wrongly coded in device tree. It's a fix for it.
* tag 'imx-fixes-5.2-3' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
ARM: dts: imx6ul: fix PWM[1-4] interrupts
Signed-off-by: Olof Johansson <olof@lixom.net>
ARM: dts: Amlogic fixes for v5.2-rc
- fix GPU interrupts and operating voltage
* tag 'amlogic-fixes' of https://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic:
ARM: dts: meson8b: fix the operating voltage of the Mali GPU
ARM: dts: meson8b: drop undocumented property from the Mali GPU node
ARM: dts: meson8: fix GPU interrupts and drop an undocumented property
Signed-off-by: Olof Johansson <olof@lixom.net>
W dniu 19.06.2019 o 16:21, Olof Johansson pisze:
> On Mon, Jun 17, 2019 at 06:04:09PM +0200, Marcin Juszkiewicz wrote:
>> Follow x86-64 defconfig on enabling basic LVM support.
>>
>> Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
>
> Do you need this to be =y? If you use LVM, you usually boot with a ramdisk that
> will hold modules.
Right. Forgot to change.
From 63003d0047062949a1231f67e1efdcb96b54323a Mon Sep 17 00:00:00 2001
From: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
Date: Mon, 27 May 2019 20:14:34 +0200
Subject: [PATCH 1/3] arm64 defconfig: enable LVM support
Follow x86-64 defconfig on enabling basic LVM support.
Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
This pull request contain Broadcom ARM-based SoCs Device Tree changes
for 5.3 please pull the following:
- Lukas enables DMA support for the BCM2835 (Raspberry Pi) SPI
controller
- Florian fixes a number of dtc W=1 warnings in the Broadcom DTS files
and provides a fix for devices failing to boot after the removal of
skelton.dtsi (that commit has been submitted as a separate fix)
* tag 'arm-soc/for-5.3/devicetree-v2' of https://github.com/Broadcom/stblinux:
ARM: dts: BCM5301X: Fix most DTC W=1 warnings
ARM: dts: NSP: Fix the bulk of W=1 DTC warnings
ARM: dts: BCM63xx: Fix DTC W=1 warnings
ARM: dts: BCM53573: Fix DTC W=1 warnings
ARM: dts: bcm-mobile: Fix most DTC W=1 warnings
ARM: dts: Cygnus: Fix most DTC W=1 warnings
ARM: dts: Fix BCM7445 DTC warnings
ARM: bcm283x: Enable DMA support for SPI controller
ARM: dts: bcm: Add missing device_type = "memory" property
Signed-off-by: Olof Johansson <olof@lixom.net>
Expose some of internal functions that are required for implementation of
customized regulator couplers.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Right now regulator core supports only one type of regulators coupling,
the "voltage max-spread" which keeps voltages of coupled regulators in a
given range from each other. A more sophisticated coupling may be required
in practice, one example is the NVIDIA Tegra SoCs which besides the
max-spreading have other restrictions that must be adhered. Introduce API
that allow platforms to provide their own customized coupling algorithms.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
The early machine check runs in real mode, so locking is unnecessary.
Worse, the windup does not restore AMR, so this can result in a false
KUAP fault after a recoverable machine check hits inside a user copy
operation.
Fix this similarly to HMI by just avoiding the kuap lock in the
early machine check handler (it will be set by the late handler that
runs in virtual mode if that runs). If the virtual mode handler is
reached, it will lock and restore the AMR.
Fixes: 890274c2dc ("powerpc/64s: Implement KUAP for Radix MMU")
Cc: Russell Currey <ruscur@russell.cc>
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Use 0600 as edcca file permission in mt76x02 debugfs
Fixes: 643749d4a8 ("mt76: mt76x02: disable ED/CCA by default")
Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
Signed-off-by: Felix Fietkau <nbd@nbd.name>
Introduce a knob in mt7603 debugfs in order to enable/disable
energy detection based on CCA thresholds
Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
Signed-off-by: Felix Fietkau <nbd@nbd.name>
Run mt76x02_edcca_init atomically in mt76_edcca_set since it runs
concurrently with calibration work and mt76x2_set_channel.
Moreover perform phy calibration atomically
Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
Signed-off-by: Felix Fietkau <nbd@nbd.name>
This is a preliminary patch to run mt76x02_edcca_init atomically
Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
Signed-off-by: Felix Fietkau <nbd@nbd.name>
Remove mt76x02_edcca_init in mt76x2u_set_channel since it is already
run by mt76x2u_phy_channel_calibrate performing channel calibration
Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
Signed-off-by: Felix Fietkau <nbd@nbd.name>
Remove enable parameter from mt76x02_edcca_init routine signature since
it is always true
Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
Signed-off-by: Felix Fietkau <nbd@nbd.name>
Make mt7615_rx_poll_complete static since it is used just in pci.c
to initialize rx_poll_complete function pointer
Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
Signed-off-by: Felix Fietkau <nbd@nbd.name>
Run __mt76_mcu_send_msg instead of __mt7615_mcu_msg_send and remove
duplicated code.
Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
Signed-off-by: Felix Fietkau <nbd@nbd.name>
Use common function wrapper in mt7615_mcu_exit since the code is shared
with m7603 driver
Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
Signed-off-by: Felix Fietkau <nbd@nbd.name>
Use __mt76_mcu_send_msg wrapper instead of mt7615_mcu_msg_send.
This is a preliminary patch for mt7615-mt7603 mcu code unification
Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
Signed-off-by: Felix Fietkau <nbd@nbd.name>
Use mt76 common signature for mt7615_mcu_msg_send. Move skb allocation
in mt7615_mcu_msg_send and remove duplicated code. Remove
__mt7615_mcu_set_wtbl and __mt7615_mcu_set_sta_rec since now are used
just to send mcu msgs. This is a preliminary patch for mt7615-mt7603 mcu
code unification
Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
Signed-off-by: Felix Fietkau <nbd@nbd.name>
