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Author SHA1 Message Date
Mark Huang
fafe53dcac ARM: rockchip_defconfig: Enable LRU_GEN config 
Signed-off-by: Mark Huang <huangjc@rock-chips.com>
Change-Id: I6846878b6c50555f80b5d65ef1c813b675fec5e7
 2025-06-05 16:02:45 +08:00
Tao Huang
bbeb386c3d Merge commit '438259ec8c6f9b3659cc27d54f01e2a224b1c615' 
* commit '438259ec8c6f9b3659cc27d54f01e2a224b1c615':
  media: rockchip: vicap fixes error use_count for switch device mode
  media: rockchip: vicap fixes error start stream of aov for rv1126b
  arm64: dts: rockchip: rk3562: remove unnecessary references to rkcif_mmu
  arm64: dts: rockchip: rv1126b-evb-cam-csi0: add imx586 support
  ARM: configs: rv1126b-evb: enable imx586
  arm64: dts: rockchip: rk3588-evb7-v11: support usbhost3.0
  iio: imu: inv_icm42670: fix dead lock when resume
  video: rockchip: mpp: rkvenc2: add governor and device for devfreq
  thermal: rockchip: Remove npu thermal for rv1126b
  arm64: dts: rockchip: rv1126b: Remove npu thermal
  video: rockchip: mpp_osal: Add func to get dma iommu mapping
  arm64: dts: rockchip: rv1126b: add opp-510M/600M for npu
  clk: rockchip: clk-pvtpll: add 510M/600M frequency point for rv1126b npu
  arm64: dts: rockchip: rk3528: Remove pcie2x1 SRST_PRESETN_CRU_PCIE reset
  arm64: dts: rockchip: rv1126b-evb1-v10: Adapt the PMU IO states for the sleep mode
  arm64: dts: rockchip: rv1126b-evb3-v10: Add rtc/rockchip_suspend support
  arm64: dts: rockchip: rv1126b: Add label to reserved-memory node
  arm64: dts: rockchip: rv1126b-evb2-v10: Resolve the leakage issue in sleep mode
  media: i2c: sc850sl: add support hw standby

Change-Id: I56bc3ae8f65e08842488163fbe4ab6791b2f5a5a
 2025-05-30 19:40:30 +08:00
Zefa Chen
438259ec8c media: rockchip: vicap fixes error use_count for switch device mode 
Fixes: 4f7e1db593 ("media: rockchip: vicap support use switch device to switch sensor connect to one dphy")
Change-Id: Ieeca97ae618c50e8710c506c24391740092d61b3
Signed-off-by: Zefa Chen <zefa.chen@rock-chips.com>
 2025-05-30 11:36:41 +00:00
Zefa Chen
467befa859 media: rockchip: vicap fixes error start stream of aov for rv1126b 
Change-Id: Ib1406393488ec3c9ca39d942d2e69ed6c06299b7
Signed-off-by: Zefa Chen <zefa.chen@rock-chips.com>
 2025-05-30 11:35:13 +00:00
Zefa Chen
026cc864c0 arm64: dts: rockchip: rk3562: remove unnecessary references to rkcif_mmu 
Change-Id: I29f149b9c22d7eef4144c0b7f10717233416ce99
Signed-off-by: Zefa Chen <zefa.chen@rock-chips.com>
 2025-05-30 11:34:44 +00:00
Yu Zheng
70d8930ab5 arm64: dts: rockchip: rv1126b-evb-cam-csi0: add imx586 support 
Signed-off-by: Yu Zheng <yu.zheng@rock-chips.com>
Change-Id: I7853c95b97ed70bea5c284fa4994c2d01f6d1d3f
 2025-05-30 11:33:58 +00:00
Yu Zheng
8ffb28b34f ARM: configs: rv1126b-evb: enable imx586 
Signed-off-by: Yu Zheng <yu.zheng@rock-chips.com>
Change-Id: I8ddfbf33ca2867209796fcc2154d4ddd770faf43
 2025-05-30 08:52:20 +00:00
Jake Wu
63c77a77de arm64: dts: rockchip: rk3588-evb7-v11: support usbhost3.0 
Change-Id: I7ac5f41798e5333e1473560c0a0355dfb09091cd
Signed-off-by: Jake Wu <jake.wu@rock-chips.com>
 2025-05-30 08:49:56 +00:00
Yu Zheng
75da3224ff iio: imu: inv_icm42670: fix dead lock when resume 
Signed-off-by: Yu Zheng <yu.zheng@rock-chips.com>
Change-Id: I1aae323d4ee49abcff374d80e3611da2f5c7c023
 2025-05-30 08:49:26 +00:00
Liang Chen
27e9662f0c video: rockchip: mpp: rkvenc2: add governor and device for devfreq 
Change-Id: Ie92f2a0795359201a77fac4a3446a7c8e1b8e897
Signed-off-by: Liang Chen <cl@rock-chips.com>
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
 2025-05-30 08:38:45 +00:00
Finley Xiao
c9478f44f8 thermal: rockchip: Remove npu thermal for rv1126b 
Change-Id: Id90719ccc5d67efb173869febacc86962621e159
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
 2025-05-30 08:29:19 +00:00
Finley Xiao
7a4d6cb92d arm64: dts: rockchip: rv1126b: Remove npu thermal 
Change-Id: Ie1e29b9abc8d483df644b82a4f267b72acaa5216
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
 2025-05-30 01:23:19 +00:00
Zorro Liu
a268e0254a drm/rockchip: ebc_dev: release version v7.17 
support get kernel cur display buf from userspace

Change-Id: I6340e571dc228bbd4a22fb7dcaa49b179ab01fff
Signed-off-by: Zorro Liu <lyx@rock-chips.com>
 2025-05-29 17:04:57 +08:00
Yandong Lin
bb98340ac5 video: rockchip: mpp_osal: Add func to get dma iommu mapping 
Change-Id: I9c728c8b8048c16cdf85aa421a1192b11f53500c
Signed-off-by: Yandong Lin <yandong.lin@rock-chips.com>
 2025-05-29 08:40:59 +00:00
Liang Chen
8ec30319e0 arm64: dts: rockchip: rv1126b: add opp-510M/600M for npu 
Change-Id: I710aef8f78019c264409d0eef79d57d31f34b4a4
Signed-off-by: Liang Chen <cl@rock-chips.com>
 2025-05-29 07:39:27 +00:00
Liang Chen
e4c86a01fd clk: rockchip: clk-pvtpll: add 510M/600M frequency point for rv1126b npu 
Change-Id: I2177603835eada713f465175311fcd06ad6fd9cf
Signed-off-by: Liang Chen <cl@rock-chips.com>
 2025-05-29 07:39:23 +00:00
Jon Lin
513192ee16 arm64: dts: rockchip: rk3528: Remove pcie2x1 SRST_PRESETN_CRU_PCIE reset 
This reset needs to be always on, and is always on by default, so it
should not be referenced. Otherwise, once PCIe fails to enumerate the
enumerate successfully, it will be closed, which will affect other
controller that do not reference this.

Change-Id: Ie654c0c071006bd0006039286bd22acaec30df10
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
 2025-05-29 06:38:53 +00:00
Jkand Huang
2418a7d538 arm64: dts: rockchip: rv1126b-evb1-v10: Adapt the PMU IO states for the sleep mode 
Signed-off-by: Jkand Huang <jkand.huang@rock-chips.com>
Change-Id: I505dea64649a0eefb604a8c8f76d6e9ff325982a
 2025-05-29 06:26:53 +00:00
Ziyuan Xu
1f258c4eec arm64: dts: rockchip: rv1126b-evb3-v10: Add rtc/rockchip_suspend support 
Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
Change-Id: I85b04227b0410307f02c81f5522c741cae234504
 2025-05-29 06:26:32 +00:00
Weiwen Chen
0adfff2bee arm64: dts: rockchip: rv1126b: Add label to reserved-memory node 
Signed-off-by: Weiwen Chen <cww@rock-chips.com>
Change-Id: I7d9246f7724f450e9ca59518c952d74d03ed5723
 2025-05-29 06:25:59 +00:00
Jkand Huang
4d942ec2d1 arm64: dts: rockchip: rv1126b-evb2-v10: Resolve the leakage issue in sleep mode 
Signed-off-by: Jkand Huang <jkand.huang@rock-chips.com>
Change-Id: I0babc67fcf01b0a5166d3c26cb6600636e4f3107
 2025-05-29 06:23:35 +00:00
LongChang Ma
b5d1812d54 media: i2c: sc850sl: add support hw standby 
Signed-off-by: LongChang Ma <chad.ma@rock-chips.com>
Change-Id: I54b75f77c8b8a093f04640c402381bea39460006
 2025-05-29 06:23:09 +00:00
Tao Huang
16a057d1a1 Merge commit 'fa17e4b1d3ce6498d7864b3aac1706f1bc1efbc1' 
* commit 'fa17e4b1d3ce6498d7864b3aac1706f1bc1efbc1':
  PCI: disable L0s for CYW989459 Wireless Module
  ARM: configs: rv1126b-fastboot: Enable CONFIG_VIDEO_ROCKCHIP_VPSS
  arm64: dts: rockchip: rk3576-vehicle: add ufs dts support
  arm64: dts: rockchip: rk3576-cpu-swap: add cache info for A53
  arm64: dts: rockchip: rk3576: add cache info for A53/A72

Change-Id: I6c653444ca180d088ada0f62428aac2771600569
 2025-05-28 18:56:02 +08:00
Xu Xuehui
fa17e4b1d3 PCI: disable L0s for CYW989459 Wireless Module 
Change-Id: Ie5eaf0306ac5b571a7d051d8b6c1bee615776c3a
Signed-off-by: Xu Xuehui <xxh@rock-chips.com>
 2025-05-27 19:23:52 +08:00
Weiwen Chen
97098d2d1b ARM: configs: rv1126b-fastboot: Enable CONFIG_VIDEO_ROCKCHIP_VPSS 
Update by:
  make ARCH=arm rv1126b_defconfig
  cp .config tmp.config
  make ARCH=arm rv1126b_defconfig rv1126b-fastboot.config
  make ARCH=arm menuconfig
  ./scripts/diffconfig -m tmp.config .config > arch/arm/configs/rv1126b-fastboot.config

Signed-off-by: Weiwen Chen <cww@rock-chips.com>
Change-Id: Ie2ed04961989df3bb3fae9b601e4db480c53eb12
 2025-05-27 19:23:52 +08:00
Luo Wei
8d69344a2a arm64: dts: rockchip: rk3576-vehicle: add ufs dts support 
Signed-off-by: Luo Wei <lw@rock-chips.com>
Change-Id: Ibf541493488f5c2565dfdddeacf39cae91d8b29a
 2025-05-27 19:23:52 +08:00
Liang Chen
72d459a462 arm64: dts: rockchip: rk3576-cpu-swap: add cache info for A53 
Change-Id: Ib1908adacedb69836159179f8226d6a4e0202550
Signed-off-by: Liang Chen <cl@rock-chips.com>
 2025-05-27 19:23:52 +08:00
Tao Huang
d0b67446d2 Merge commit 'ff148eedd4c9194ebffe9e26d405a75120dd2d74' 
* commit 'ff148eedd4c9194ebffe9e26d405a75120dd2d74':
  video: rockchip: rga3: RGA2 scale mode add default config
  pinctrl: rockchip: refine drive strength levels for RV1126B
  arm64: dts: rockchip: add dedicated pinconf DTSI for RV1126B
  PCI: rockchip: dw: Fix link fail in s2r
  phy: rockchip: inno-hdmi: Subdivide rk3528 phy cfg table
  media: rockchip: vicap support use switch device to switch sensor connect to one dphy

Change-Id: I09b1c70f0ab335f8de29406e546c7f88d8e25fe0
 2025-05-26 19:49:13 +08:00
Liang Chen
424135148b arm64: dts: rockchip: rk3576: add cache info for A53/A72 
Change-Id: I984f5ecc8450186822290846a526ae0929bc9035
Signed-off-by: Liang Chen <cl@rock-chips.com>
 2025-05-26 16:55:17 +08:00
Yu Qiaowei
ff148eedd4 video: rockchip: rga3: RGA2 scale mode add default config 
When the task is not submitted from the librga im2d API, the scale mode
may be default, so additional default configuration is required.

Change-Id: Ie5966308ad1af09a6a7eec489126670dc1085dac
Signed-off-by: Yu Qiaowei <cerf.yu@rock-chips.com>
 2025-05-26 08:29:16 +00:00
Ye Zhang
b7b90f1ca9 pinctrl: rockchip: refine drive strength levels for RV1126B 
This commit has refined the driver strength configuration of the RV1126B
from 6 levels to 23 levels

Signed-off-by: Ye Zhang <ye.zhang@rock-chips.com>
Change-Id: I61cee294cbb194366909acc70dec3d41a0a1e961
 2025-05-26 02:39:29 +00:00
Ye Zhang
4502ce6f66 arm64: dts: rockchip: add dedicated pinconf DTSI for RV1126B 
This commit introduces a chip-specific pinconf DTSI for RV1126B to handle its
extended drive-strength levels. New levels add intermediate level. Below is
the migration guide:

Old Level to New Level Mapping (Same Register Value):
-----------------------------------------------------
| Old Name      | New Name              | Register  |
|---------------|-----------------------|-----------|
| drv_level_0   | drv_level_0_25        | 0x01      |
| drv_level_1   | drv_level_0_75        | 0x03      |
| drv_level_2   | drv_level_1_75        | 0x07      |
| drv_level_3   | drv_level_2_75        | 0x0F      |
| drv_level_4   | drv_level_3_75        | 0x1F      |
| drv_level_5   | drv_level_5_75        | 0x3F      |
-----------------------------------------------------

Signed-off-by: Ye Zhang <ye.zhang@rock-chips.com>
Change-Id: Ic15ba802bdeac765c684d6906047523d914d01b1
 2025-05-26 02:39:29 +00:00
Shawn Lin
cd348ae871 PCI: rockchip: dw: Fix link fail in s2r 
Delaying link training need the irq to help set dly2_done which couldn't
come true in resume due to the noirq phase. If the training is still going
but the EP issues a hot reset request, the LTSSM will be stuck and the
link never be back even if we reset the EP. The only way is to reset the
whole controller, which is unacceptable.

The issue is very difficult to be reproduced but finally we spot the key
point from fifo status of ltssm. From the designe point of view, the only
way to make ltssm from 0x0(DETECT_QUIET) to 0x5(PRE_DETECT_QUIET) is
core_rst_n be active and dly logic taking over client settings.

[816669.085768][ T2707] rk-pcie fe180000.pcie: fifo_status = 0xf0009
[816669.085775][ T2707] rk-pcie fe180000.pcie: fifo_status = 0xe000a
[816669.085783][ T2707] rk-pcie fe180000.pcie: fifo_status = 0xd000b
[816669.085790][ T2707] rk-pcie fe180000.pcie: fifo_status = 0xc000c
[816669.085797][ T2707] rk-pcie fe180000.pcie: fifo_status = 0xb0011
[816669.085804][ T2707] rk-pcie fe180000.pcie: fifo_status = 0xa000d
[816669.085811][ T2707] rk-pcie fe180000.pcie: fifo_status = 0x9000f
[816669.085818][ T2707] rk-pcie fe180000.pcie: fifo_status = 0x8000e
[816669.085826][ T2707] rk-pcie fe180000.pcie: fifo_status = 0x107000d
[816669.085833][ T2707] rk-pcie fe180000.pcie: fifo_status = 0x106000e
[816669.085840][ T2707] rk-pcie fe180000.pcie: fifo_status = 0x5000d
[816669.085847][ T2707] rk-pcie fe180000.pcie: fifo_status = 0x40005
[816669.085854][ T2707] rk-pcie fe180000.pcie: fifo_status = 0x30000
[816669.085861][ T2707] rk-pcie fe180000.pcie: fifo_status = 0x20005
[816669.085868][ T2707] rk-pcie fe180000.pcie: fifo_status = 0x10000

Given dly2_done is slef-clear bit, so we can't set it in advance but have
to disable dly2_en when linking in resume and enable it later.

Fixes: 679557456b ("PCIe: dw: rockchip: Delaying the link training after hot reset")
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Change-Id: I85c24c7d7ea4c5f6718bcbdfbd7bf328d9a7f170
 2025-05-26 02:39:05 +00:00
Algea Cao
98c569358a phy: rockchip: inno-hdmi: Subdivide rk3528 phy cfg table 
Add phy configuration of tmds clk corresponding to 10-bit color
depth at different resolutions (such as 1080p60 10-bit).

Change-Id: I8792d950dca2a51572314359044c2bea437a71a8
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
 2025-05-26 02:35:00 +00:00
Zefa Chen
4f7e1db593 media: rockchip: vicap support use switch device to switch sensor connect to one dphy 
Signed-off-by: Zefa Chen <zefa.chen@rock-chips.com>
Change-Id: I7940fcb2a9dc6cb2506d1e1692da034d2b6a0503
 2025-05-26 02:01:35 +00:00
Tao Huang
1aa8479fb2 Merge commit '3a8b94c5be2ca4a2a9dd5916074e2f466ebcc57f' 
* commit '3a8b94c5be2ca4a2a9dd5916074e2f466ebcc57f':
  arm64: dts: rockchip: rv1126b: Remove dma for i2c0, i2c4 and i2c5
  dt-bindings: i2c: rockchip: add rockchip,rv1126b-i2c
  i2c: rk3x: Add dma feature
  arm64: dts: rockchip: rv1126b-evb: Change clock rates to 24M for fephy
  ethernet: stmmac: dwmac-rk: Correct clock input/output sel for RV1126B
  net: phy: rockchip-fephy: Add param to access group registers
  net: phy: rockchip-fephy: Fix for the correct names
  net: phy: rockchip-fephy: Add 24M clock rate setting
  net: phy: rockchip-fephy: Change off-energy level0 threshold between link up/down

Change-Id: I93555893bf14d5c358c0e583917daeae6295b483
 2025-05-25 17:13:21 +08:00
David Wu
3a8b94c5be arm64: dts: rockchip: rv1126b: Remove dma for i2c0, i2c4 and i2c5 
Change-Id: I02b5f05f72bf91ecadc05e1ae705aaf16629d193
Signed-off-by: David Wu <david.wu@rock-chips.com>
 2025-05-25 06:35:23 +00:00
David Wu
ff069916e8 dt-bindings: i2c: rockchip: add rockchip,rv1126b-i2c 
Change-Id: I4760657a7ff06738ba22461a578da62bb537b97f
Signed-off-by: David Wu <david.wu@rock-chips.com>
 2025-05-25 14:33:48 +08:00
David Wu
37f373979d i2c: rk3x: Add dma feature 
Through testing, it is found that it is better to set the
DMA threshold to 64 bytes, and there will be two more interrupts
after 64 bytes without DMA, which will save time by using DMA,
but for TX, the threshold should be one byte less, because there
will be one more byte of device address.

Signed-off-by: David Wu <david.wu@rock-chips.com>
Change-Id: Iebc3cd81f62d7ee8887319e121a13ed0c27984ad
 2025-05-25 14:30:40 +08:00
David Wu
f58cc2736a arm64: dts: rockchip: rv1126b-evb: Change clock rates to 24M for fephy 
Change-Id: I906b8a3e483f6db790701a10d6a0aa71080948bc
Signed-off-by: David Wu <david.wu@rock-chips.com>
 2025-05-25 06:18:12 +00:00
David Wu
185b03cb0d ethernet: stmmac: dwmac-rk: Correct clock input/output sel for RV1126B 
Change-Id: Ie1bfc0a598827493b23fd5d7c040d8e552adaaff
Signed-off-by: David Wu <david.wu@rock-chips.com>
 2025-05-25 06:18:02 +00:00
David Wu
42db19d682 net: phy: rockchip-fephy: Add param to access group registers 
Signed-off-by: David Wu <david.wu@rock-chips.com>
Change-Id: Ia5a777c66ae71082256cefa37cff151d993c0a0a
 2025-05-23 19:24:05 +08:00
David Wu
9efda1e814 net: phy: rockchip-fephy: Fix for the correct names 
Change-Id: I14f536ff6b817764ad716a26874c1162eacebd73
Signed-off-by: David Wu <david.wu@rock-chips.com>
 2025-05-23 19:18:12 +08:00
David Wu
7a2e9b2ecc net: phy: rockchip-fephy: Add 24M clock rate setting 
Change-Id: Ie1f51e419bddb458e03be1e048260660a63f020a
Signed-off-by: David Wu <david.wu@rock-chips.com>
 2025-05-23 19:18:04 +08:00
David Wu
0c961312c5 net: phy: rockchip-fephy: Change off-energy level0 threshold between link up/down 
Change-Id: I635d8ed3b3afd4a3e271f4071472aa4cd572dda0
Signed-off-by: David Wu <david.wu@rock-chips.com>
 2025-05-23 19:17:53 +08:00
Tao Huang
018771a18c Merge commit '0374714804670f445ac6449d4c0d8b9fbe84590d' 
* commit '0374714804670f445ac6449d4c0d8b9fbe84590d':
  power: supply: rk817_battery: Supports battery aging calibration
  power: supply: rk817_battery: Supporting battery charging with JEITA standards‌
  drm/rockchip: vop2: update cluster fbc xoffset check rule
  arm64: dts: rockchip: rk3576: Add customer demand nvmem cell for opp table
  driver: rknpu: Add opp data for rk3576s
  MALI: bifrost: Add opp data for rk3576s
  cpufreq: rockchip: Add opp data for rk3576s
  media: rockchip: isp: support wrap stream latter for isp35
  arm64: dts: rockchip: rv1126b-pinctrl: update i2c config
  arm64: dts: rockchip: rk3588: Adjust the HDMITX1 DDC M0 IO driver strength
  media: rockchip: vicap add soft reset before start stream
  media: rockchip: vicap free hdr buf after change to online
  media: rockchip: vicap fixes error of sof intr loss
  media: rockchip: vicap fixes image error of last frame before suspend
  arm64: dts: rockchip: rv1126b-evb4: add dsmc node
  arm64: dts: rockchip: rv1126b-evb4: enable sdmmc\gmac\can\sound\rtc\fspi
  media: rockchip: vicap support crop with toisp mode
  media: rockchip: vicap fixes error port parse of sditf

Change-Id: If5201f44dd85fe5db2c61357cfac90a8aca743f1
 2025-05-23 18:53:12 +08:00
Shengfei Xu
0374714804 power: supply: rk817_battery: Supports battery aging calibration 
Change-Id: Ie7866d020fa16b39f3541d2874fc4d2d80977477
Signed-off-by: Shengfei Xu <xsf@rock-chips.com>
 2025-05-23 10:52:49 +00:00
Shengfei Xu
a8c1e9ec9b power: supply: rk817_battery: Supporting battery charging with JEITA standards‌ 
Implementing JEITA charging protocols is critical for enhancing battery
safety and prolonging service life. Based on battery specifications and
operating temperatures, it is necessary to adjust charging voltages and
currents dynamically.

Change-Id: Ieab12e792697373a7b50be9e6813061ce85c1232
Signed-off-by: Shengfei Xu <xsf@rock-chips.com>
 2025-05-23 10:52:49 +00:00
Sandy Huang
859cced710 drm/rockchip: vop2: update cluster fbc xoffset check rule 
cluster fbc xoffset check size is related to fbc block_w.

Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: If091d9d740e22e5f6d192f4085a1b550e826d846
 2025-05-23 10:40:48 +00:00
Finley Xiao
4f3686ee3a arm64: dts: rockchip: rk3576: Add customer demand nvmem cell for opp table 
Change-Id: I1e846b30238e0841b18679d60029e51123f68687
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
 2025-05-23 08:53:17 +00:00