Including modifications under drivers/base/ from the new DDK.
Resolve lots of conflicts.
Change-Id: I69f9ac87d927441d0b92b8dac8b704922aeb6a0a
Signed-off-by: Zhen Chen <chenzhen@rock-chips.com>
Include a new directory include/uapi/gpu/arm/bifrost/,
which includes some header files of bifrost device driver.
In the original part of g6, the path is include/uapi/gpu/arm/midgard/.
I changed the "midgard" to "bifrost", and modified the paths of the header files in .c files.
I resolved some conflicts between modifications form ARM and RK, manually.
In addition, introduce source files of protected_memory_allocator
that might be needed by bifrost_device_driver into build system.
Change-Id: I09d500a0fdbc5da352c81dc4fcfbffb5b7f907f5
Signed-off-by: Zhen Chen <chenzhen@rock-chips.com>
This patch try to fix this issue by caching the dma-buf attachments and
stores the cache list to dtor_data of dma-buf structor. The dma-buf
attach with cache will try to find cached attachment first and return
the valid instance.
This patch also store the deattch operation to dtor of dma-buf structor
by dma_buf_set_destructor.
Change-Id: I4778c3328825f6c04f5d2608994e62fe3478bf1b
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
This reverts part of commit 213457f1ef
("ASoC: rockchip: pcm: Adjust min/max value for pcm config").
Instead, pass module option 'prealloc_buffer_size_kbytes'
to specify it. any details please refer to:
Documentation/sound/alsa-configuration.rst
e.g. 32 kbytes prealloc buffer size:
"snd_soc_core.prealloc_buffer_size_kbytes=32"
Change-Id: I3788620807c4e94d3e9c15ef224b76266722dcc1
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Some application(e.g Kwin) may use it as a default rotation.
We should set it a valid rotation here.
Change-Id: Idef8fa5097b54710e2ead32a197d5d1e6bf78d94
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Sometimes the vop line bandwidth is not high, the vop also report
buf empty err, and the frame bandwidth is high at this time, so change
ddr frequency according to frame bandwidth can fix the error.
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Change-Id: Ia893a07def99aaaa4da421b6d619a8fd3eec9745
sc5239 have logic gain for analog, it can improve the image quality for
raw data.
Signed-off-by: Yiqing Zeng <zack.zeng@rock-chips.com>
Change-Id: I03a17f21d1457aa60a7438b4a4895493e879be28
After testing, if use previous hdmitx pll cfg , rk356x some
chips will appear 297M tmds clock output abnormal. After
signal testing, it was decided to update the vendor
recommended pll cfg.
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
Change-Id: If1ca2f9e5922c9b95b1d90055640daafcacc2301
create independent workqueqe to do auto refresh work
Signed-off-by: Zorro Liu <lyx@rock-chips.com>
Change-Id: I71421e4391fe9c1f85023b08057d75a4e11e9c85
The device must be registered last. If there is an error, the device
should not succeed.
Change-Id: Ie342c8bbf30e8a94822dcb2e0417fe1230e4482a
Signed-off-by: Ding Wei <leo.ding@rock-chips.com>
1. reduce buffer size to 128KB
2. invalidate buffer cache on demand
3. reduce scantimer interval to 100us
Can improve NPU fps from 45 to 95, the main reason is that
most of data packages of NPU less than 1MB, setting buffer
size to 128KB got a well result after testing.
Signed-off-by: Simon Xue <xxm@rock-chips.com>
Change-Id: Ib9e57b95a608110f4ec00c74a84cbe6deb63caf7
When devfreq initially fails, the device can still continue to execute,
but there is no devfreq function.
Change-Id: I2a39a77e0a85cb43854b6adbe0476905abcc9a3b
Signed-off-by: Ding Wei <leo.ding@rock-chips.com>
This reverts commit 75b31192fe.
The original purpose of customized pcm was to config prealloc buffer size
flexibly. but, we can do the same thing by soc-generic-dmaengine-pcm.
And the generic one can generated the better config by querying DMA
capabilities from dmaengine driver rather than the Hard-Coded one.
e.g.
the customized one:
static const struct snd_pcm_hardware snd_rockchip_hardware = {
.info = SNDRV_PCM_INFO_MMAP |
SNDRV_PCM_INFO_MMAP_VALID |
SNDRV_PCM_INFO_PAUSE |
SNDRV_PCM_INFO_RESUME |
SNDRV_PCM_INFO_INTERLEAVED,
...
the generic one:
ret = dma_get_slave_caps(chan, &dma_caps);
if (ret == 0) {
if (dma_caps.cmd_pause && dma_caps.cmd_resume)
hw.info |= SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_RESUME;
if (dma_caps.residue_granularity <= DMA_RESIDUE_GRANULARITY_SEGMENT)
hw.info |= SNDRV_PCM_INFO_BATCH;
...
So, let's revert back to use the generic dmaengine pcm.
Change-Id: I30eee2e8047b69d7311fd6da0cfd2b5872b81e17
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Reviewed-by: John Keeping <john@metanate.com>
Link: https://lore.kernel.org/r/1632792957-80428-1-git-send-email-sugar.zhang@rock-chips.com
Signed-off-by: Mark Brown <broonie@kernel.org>
(cherry picked from commit 5ba8ecf227
git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git for-5.16)
Currently, The fixed 512KB prealloc buffer size is too larger for
tiny memory kernel (such as 16MB memory). This patch adds the module
option "prealloc_buffer_size_kbytes" to specify prealloc buffer size.
It's suitable for cards which use the generic dmaengine pcm driver
with no config.
Change-Id: I76cc278f523d41083ba30b36d801d2839682d158
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Link: https://lore.kernel.org/r/1632394246-59341-1-git-send-email-sugar.zhang@rock-chips.com
Signed-off-by: Mark Brown <broonie@kernel.org>
(cherry picked from commit b0e3b0a707
git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git for-5.16)
Current policy:
If there are two pending config done vp, and one of them is
at critical time zone, wait for the one wich has long time
to vsync.
This may lead a very long wait, for example: VP0 is 3840 x 2160,
VP2 is 1920 x 1080, they are all have pending cfg done bits,
and the vcnt of VP0 is 1367, the vcnt of VP2 is 995, VP2 is
at the critical time zone, we will wait VP0 vsync(almost half frame time)
according to this policy. This lead a very long wait.
The new policy:
If there are two pending config done vp, and one of them is
at critical time zone, compare the left vcnt time of the
two vp:
if (first_vp_left_time > second_vp_left_time) {
if ((first_vp_left_time - second_vp_left_time) > first_vp_safe_time)
wait_vp = second_done_vp;
else
wait_vp = first_done_vp;
} else {
if ((second_vp_left_time - first_vp_left_time) > second_vp_safe_time)
wait_vp = first_done_vp;
else
wait_vp = second_done_vp;
}
Change-Id: I7154ad716841c6c28947ddfecc845c7271cc507a
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
If delayline can't get from DTB or invalid, don't enable delayline.
Signed-off-by: David Wu <david.wu@rock-chips.com>
Change-Id: I9769af42d02c67d2ea3fd24de5def45a1ec1cc17
On some platforms(such as px30), vepu and vdpu shared the
same mmu.So when registering the iommu handle function,
there will be overwriting.Results in the reported device mismatch
when page fault.
Signed-off-by: Yandong Lin <yandong.lin@rock-chips.com>
Change-Id: Id07c7f3088c52fcb987797c689296154c670078c
The symbols is used for rockchip video codec driver,
which located driver/rockchip/video/mpp. When mpp is build
for module, it will be error.
Error message:
ERROR: "device_links_read_unlock"
[drivers/video/rockchip/mpp/rk_vcodec.ko] undefined!
ERROR: "device_links_read_lock" [drivers/video/rockchip/mpp/rk_vcodec.ko] undefined!
make[2]: *** [__modpost] Error 1
make[1]: *** [modules] Error 2
make: *** [kernel.img] Error 2
make: *** Deleting file `kernel.img'`
Change-Id: Ie412341c03ad71d257392a22249b62bedd0be58b
Signed-off-by: Ding Wei <leo.ding@rock-chips.com>
The dwc3 gadget call pm_runtime_get in the __dwc3_gadget_ep_queue()
to increment the device's usage count, and call pm_runtime_put in
the dwc3_gadget_giveback() to decrement the device's usage count
if the request is completed successfully or disconnection happens.
Test on RK3399 IND Type-C interface with HUSB311 (Type-C port
controller chip), if plug out the USB cable, the extcon notifier
from tcpm framework comes earlier than the dwc3 disconnect event.
This cause the dwc3 fails to enter the runtime suspend immediately
in the disconnection process of __dwc3_set_mode().
This patch waits for the dwc3 disconnect event done before doing
pm_runtime_put_sync_suspend. If it takes 1000ms to wait for the
disconnect event timeout, just print warning log and still do
the pm_runtime_put_sync_suspend, and then the dwc3 can also enter
runtime suspend automatically (DWC3_DEFAULT_AUTOSUSPEND_DELAY is
5000ms) after the disconnect event done.
Signed-off-by: William Wu <william.wu@rock-chips.com>
Change-Id: Ie6086d469b5d24f841532992e4e95f0c91c37022
rk817 int pin is connect to sleep pin on ebook hardware design,
cpu unable to pull high sleep pin to shutdown devices,
when pmic occurs interrupt, so we just disable pmic int
on shutdown process to avoid this.
TEST:Press the Power button frequently while shutting down ebook devices
Signed-off-by: Zorro Liu <lyx@rock-chips.com>
Change-Id: I2a3a45be371b78720a94b1380fbb101a5597cfc6
L0 may be detected just in time if Gen1 training is finished.
But if EP supports higher Gen mode, Gen switch just happen
there but we keep on accessing devices, which leads unstable
link state and fail to detect the device finally.
And a bit more time before accessing devices to avoid this risky
case.
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Change-Id: If7eddce430b4590922b5c8f765be8a240b562d92
Try to keep the same as develop-5.10 code for easily
compare files.
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I19bf821f17d06ad9d46d3319e33c2e3c7823fdce
The operation of reading back flash cache after programing is not
universal. At present, only ESMT devices are found to have this anomaly.
Change-Id: I3ec21eebc4aa7b8a259129ed2c036e1168553f27
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
For rk3568, ddr timings adjustment is no longer supported in dmc drive.
Signed-off-by: YouMin Chen <cym@rock-chips.com>
Change-Id: I63f0c5fea8c5acf8e6ef8f44b62968deb7bd823e
Add dmc_fsp node for initialize dmc frequency set point on U-Boot.
Signed-off-by: YouMin Chen <cym@rock-chips.com>
Change-Id: I9fcd1ae498a64b5a4698c42ad05af96740b59e61
Add ddr parameters for initialize dmc frequency set point.
Signed-off-by: YouMin Chen <cym@rock-chips.com>
Change-Id: I3445fa2dbabca5774306cc1052cd3c1d472b6867
