Files
linux/drivers
Lucas Stach 02ef93c4df soc: imx: imx8mp-blk-ctrl: enable global pixclk with HDMI_TX_PHY PD
[ Upstream commit b814eda949 ]

NXP internal information shows that the PHY refclk is gated by the
GLOBAL_TX_PIX_CLK_EN bit, so to allow the PHY PLL to lock without the
LCDIF being already active, tie this bit to the HDMI_TX_PHY power
domain.

Fixes: e3442022f5 ("soc: imx: add i.MX8MP HDMI blk-ctrl")
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
2023-02-01 08:34:03 +01:00
..
2023-01-07 11:11:39 +01:00
2022-09-21 20:33:49 +02:00
2022-12-31 13:33:12 +01:00
2022-12-31 13:32:09 +01:00